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xgupta@archlinux ~/compiler/llvm-project/build/bin (main?) $ cat ~/Downloads/reproducer.mir

xgupta@archlinux ~/compiler/llvm-project/build/bin (main?) $ cat after-pass

--- |

; ModuleID = '/home/xgupta/Downloads/reproducer.mir'

source_filename = "/home/xgupta/Downloads/reproducer.mir"

target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"

target triple = "aarch64-none-linux-gnu"

define dso_local void @tc_main(i32 %segment_index, i32 %num_segments, i16* nocapture %scores, i8* nocapture readonly %arr_segments_ptr) local_unnamed_addr {

entry:

br label %while.body

while.body: ; preds = %if.end8, %entry

%0 = bitcast i8* %arr_segments_ptr to i16*

%1 = load i16, i16* %0, align 2

%conv = sext i16 %1 to i32

%cmp = icmp sgt i16 %1, 0

br i1 %cmp, label %if.then, label %if.else

if.then: ; preds = %while.body

%div = sdiv i32 65535, %conv

%mul = shl nsw i32 %div, 3

br label %if.end8

if.else: ; preds = %while.body

%2 = trunc i32 %conv to i16

%cmp2 = icmp slt i16 %2, 0

br i1 %cmp2, label %if.then4, label %if.end8

if.then4: ; preds = %if.else

%div6 = sdiv i32 65535, %conv

%mul7 = shl nsw i32 %div6, 3

br label %if.end8

if.end8: ; preds = %if.then4, %if.else, %if.then

%ye.0 = phi i32 [ 8, %if.then ], [ %mul7, %if.then4 ], [ 8, %if.else ]

%ys.0 = phi i32 [ %mul, %if.then ], [ 8, %if.then4 ], [ 8, %if.else ]

%add = add nsw i32 %ys.0, %ye.0

%conv9 = trunc i32 %add to i16

store i16 %conv9, i16* %scores, align 2

br label %while.body

}

...

---

name: tc_main

alignment: 2

exposesReturnsTwice: false

legalized: false

regBankSelected: false

selected: false

failedISel: false

tracksRegLiveness: true

hasWinCFI: false

registers:

callsEHReturn: false

callsUnwindInit: false

hasEHCatchret: false

hasEHScopes: false

hasEHFunclets: false

failsVerification: false

tracksDebugUserValues: false

registers:

- { id: 0, class: gpr32, preferred-register: '' }

- { id: 1, class: gpr32all, preferred-register: '' }

- { id: 2, class: gpr32all, preferred-register: '' }

- { id: 3, class: gpr32, preferred-register: '' }

- { id: 4, class: gpr32, preferred-register: '' }

- { id: 5, class: gpr32, preferred-register: '' }

- { id: 6, class: gpr32, preferred-register: '' }

- { id: 7, class: gpr64common, preferred-register: '' }

- { id: 8, class: gpr64common, preferred-register: '' }

- { id: 9, class: gpr32common, preferred-register: '' }

- { id: 10, class: gpr32, preferred-register: '' }

- { id: 11, class: gpr32all, preferred-register: '' }

- { id: 12, class: gpr32, preferred-register: '' }

- { id: 13, class: gpr32all, preferred-register: '' }

- { id: 14, class: gpr32, preferred-register: '' }

- { id: 15, class: gpr32, preferred-register: '' }

- { id: 16, class: gpr32, preferred-register: '' }

- { id: 17, class: gpr32, preferred-register: '' }

- { id: 18, class: gpr32all, preferred-register: '' }

- { id: 19, class: gpr32, preferred-register: '' }

- { id: 20, class: gpr32, preferred-register: '' }

- { id: 21, class: gpr32, preferred-register: '' }

- { id: 22, class: gpr32, preferred-register: '' }

- { id: 23, class: gpr32, preferred-register: '' }

liveins:

- { reg: '$x2', virtual-reg: '%7' }

- { reg: '$x3', virtual-reg: '%8' }

frameInfo:

isFrameAddressTaken: false

isReturnAddressTaken: false

hasStackMap: false

hasPatchPoint: false

stackSize: 0

offsetAdjustment: 0

maxAlignment: 0

maxAlignment: 1

adjustsStack: false

hasCalls: false

stackProtector: ''

functionContext: ''

maxCallFrameSize: 0

cvBytesOfCalleeSavedRegisters: 0

hasOpaqueSPAdjustment: false

hasVAStart: false

hasMustTailInVarArgFunc: false

hasTailCall: false

localFrameSize: 0

savePoint: ''

restorePoint: ''

fixedStack: []

stack: []

callSites: []

debugValueSubstitutions: []

constants: []

machineFunctionInfo: {}

body: |

bb.0.entry:

successors: %bb.1(0x80000000)

liveins: $x2, $x3

%8:gpr64common = COPY $x3

%7:gpr64common = COPY $x2

%19:gpr32 = MOVi32imm 65535

bb.1.while.body:

successors: %bb.2(0x50000000), %bb.3(0x30000000)

%9:gpr32common = LDRSHWui %8, 0 :: (load 2 from %ir.0)

%9:gpr32common = LDRSHWui %8, 0 :: (load (s16) from %ir.0)

%0:gpr32 = COPY %9

%10:gpr32 = SUBSWri %9, 1, 0, implicit-def $nzcv

Bcc 11, %bb.3, implicit $nzcv

B %bb.2

bb.2.if.then:

successors: %bb.5(0x80000000)

%20:gpr32 = SDIVWr %19, %0

%20:gpr32 = SDIVWr %19, %9

%21:gpr32 = nsw UBFMWri killed %20, 29, 28

%22:gpr32 = MOVi32imm 8

%18:gpr32all = COPY %22

%1:gpr32all = COPY %21

B %bb.5

bb.3.if.else:

successors: %bb.4(0x30000000), %bb.5(0x50000000)

%12:gpr32 = MOVi32imm 8

%11:gpr32all = COPY %12

TBZW %0, 31, %bb.5

B %bb.4

bb.4.if.then4:

successors: %bb.5(0x80000000)

%15:gpr32 = SDIVWr %19, %0

%15:gpr32 = SDIVWr %19, %9

%16:gpr32 = nsw UBFMWri killed %15, 29, 28

%17:gpr32 = MOVi32imm 8

%13:gpr32all = COPY %17

%2:gpr32all = COPY %16

bb.5.if.end8:

successors: %bb.1(0x80000000)

%3:gpr32 = PHI %11, %bb.3, %2, %bb.4, %18, %bb.2

%4:gpr32 = PHI %11, %bb.3, %13, %bb.4, %1, %bb.2

%23:gpr32 = nsw ADDWrr %4, %3

STRHHui killed %23, %7, 0 :: (store 2 into %ir.scores)

STRHHui killed %23, %7, 0 :: (store (s16) into %ir.scores)

B %bb.1

...

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Originaltext

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xgupta@archlinux ~/compiler/llvm-project/build/bin (main?) $ cat ~/Downloads/reproducer.mir

--- |

define dso_local void @tc_main(i32 %segment_index, i32 %num_segments, i16* nocapture %scores, i8* nocapture readonly %arr_segments_ptr) local_unnamed_addr {
  entry:
    br label %while.body
  
  while.body:                                       ; preds = %if.end8, %entry
    %0 = bitcast i8* %arr_segments_ptr to i16*
    %1 = load i16, i16* %0, align 2
    %conv = sext i16 %1 to i32
    %cmp = icmp sgt i16 %1, 0
    br i1 %cmp, label %if.then, label %if.else
  
  if.then:                                          ; preds = %while.body
    %div = sdiv i32 65535, %conv
    %mul = shl nsw i32 %div, 3
    br label %if.end8
  
  if.else:                                          ; preds = %while.body
    %2 = trunc i32 %conv to i16
    %cmp2 = icmp slt i16 %2, 0
    br i1 %cmp2, label %if.then4, label %if.end8
  
  if.then4:                                         ; preds = %if.else
    %div6 = sdiv i32 65535, %conv
    %mul7 = shl nsw i32 %div6, 3
    br label %if.end8
  
  if.end8:                                          ; preds = %if.then4, %if.else, %if.then
    %ye.0 = phi i32 [ 8, %if.then ], [ %mul7, %if.then4 ], [ 8, %if.else ]
    %ys.0 = phi i32 [ %mul, %if.then ], [ 8, %if.then4 ], [ 8, %if.else ]
    %add = add nsw i32 %ys.0, %ye.0
    %conv9 = trunc i32 %add to i16
    store i16 %conv9, i16* %scores, align 2
    br label %while.body
  }

...
---
name:            tc_main
alignment:       2
exposesReturnsTwice: false
legalized:       false
regBankSelected: false
selected:        false
failedISel:      false
tracksRegLiveness: true
hasWinCFI:       false
registers:       
  - { id: 0, class: gpr32, preferred-register: '' }
  - { id: 1, class: gpr32all, preferred-register: '' }
  - { id: 2, class: gpr32all, preferred-register: '' }
  - { id: 3, class: gpr32, preferred-register: '' }
  - { id: 4, class: gpr32, preferred-register: '' }
  - { id: 5, class: gpr32, preferred-register: '' }
  - { id: 6, class: gpr32, preferred-register: '' }
  - { id: 7, class: gpr64common, preferred-register: '' }
  - { id: 8, class: gpr64common, preferred-register: '' }
  - { id: 9, class: gpr32common, preferred-register: '' }
  - { id: 10, class: gpr32, preferred-register: '' }
  - { id: 11, class: gpr32all, preferred-register: '' }
  - { id: 12, class: gpr32, preferred-register: '' }
  - { id: 13, class: gpr32all, preferred-register: '' }
  - { id: 14, class: gpr32, preferred-register: '' }
  - { id: 15, class: gpr32, preferred-register: '' }
  - { id: 16, class: gpr32, preferred-register: '' }
  - { id: 17, class: gpr32, preferred-register: '' }
  - { id: 18, class: gpr32all, preferred-register: '' }
  - { id: 19, class: gpr32, preferred-register: '' }
  - { id: 20, class: gpr32, preferred-register: '' }
  - { id: 21, class: gpr32, preferred-register: '' }
  - { id: 22, class: gpr32, preferred-register: '' }
  - { id: 23, class: gpr32, preferred-register: '' }
liveins:         
  - { reg: '$x2', virtual-reg: '%7' }
  - { reg: '$x3', virtual-reg: '%8' }
frameInfo:       
  isFrameAddressTaken: false
  isReturnAddressTaken: false
  hasStackMap:     false
  hasPatchPoint:   false
  stackSize:       0
  offsetAdjustment: 0
  maxAlignment:    0
  adjustsStack:    false
  hasCalls:        false
  stackProtector:  ''
  maxCallFrameSize: 0
  cvBytesOfCalleeSavedRegisters: 0
  hasOpaqueSPAdjustment: false
  hasVAStart:      false
  hasMustTailInVarArgFunc: false
  localFrameSize:  0
  savePoint:       ''
  restorePoint:    ''
fixedStack:      []
stack:           []
constants:       []
machineFunctionInfo: {}
body:             |
  bb.0.entry:
    successors: %bb.1(0x80000000)
    liveins: $x2, $x3
  
    %8:gpr64common = COPY $x3
    %7:gpr64common = COPY $x2
    %19:gpr32 = MOVi32imm 65535
  
  bb.1.while.body:
    successors: %bb.2(0x50000000), %bb.3(0x30000000)
  
    %9:gpr32common = LDRSHWui %8, 0 :: (load 2 from %ir.0)
    %0:gpr32 = COPY %9
    %10:gpr32 = SUBSWri %9, 1, 0, implicit-def $nzcv
    Bcc 11, %bb.3, implicit $nzcv
    B %bb.2
  
  bb.2.if.then:
    successors: %bb.5(0x80000000)
  
    %20:gpr32 = SDIVWr %19, %0
    %21:gpr32 = nsw UBFMWri killed %20, 29, 28
    %22:gpr32 = MOVi32imm 8
    %18:gpr32all = COPY %22
    %1:gpr32all = COPY %21
    B %bb.5
  
  bb.3.if.else:
    successors: %bb.4(0x30000000), %bb.5(0x50000000)
  
    %12:gpr32 = MOVi32imm 8
    %11:gpr32all = COPY %12
    TBZW %0, 31, %bb.5
    B %bb.4
  
  bb.4.if.then4:
    successors: %bb.5(0x80000000)
  
    %15:gpr32 = SDIVWr %19, %0
    %16:gpr32 = nsw UBFMWri killed %15, 29, 28
    %17:gpr32 = MOVi32imm 8
    %13:gpr32all = COPY %17
    %2:gpr32all = COPY %16
  
  bb.5.if.end8:
    successors: %bb.1(0x80000000)
  
    %3:gpr32 = PHI %11, %bb.3, %2, %bb.4, %18, %bb.2
    %4:gpr32 = PHI %11, %bb.3, %13, %bb.4, %1, %bb.2
    %23:gpr32 = nsw ADDWrr %4, %3
    STRHHui killed %23, %7, 0 :: (store 2 into %ir.scores)
    B %bb.1

...

Bearbeitung

Datei öffnen

xgupta@archlinux ~/compiler/llvm-project/build/bin (main?) $ cat after-pass 
--- |
  ; ModuleID = '/home/xgupta/Downloads/reproducer.mir'
  source_filename = "/home/xgupta/Downloads/reproducer.mir"
  target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
  target triple = "aarch64-none-linux-gnu"
  
  define dso_local void @tc_main(i32 %segment_index, i32 %num_segments, i16* nocapture %scores, i8* nocapture readonly %arr_segments_ptr) local_unnamed_addr {
  entry:
    br label %while.body
  
  while.body:                                       ; preds = %if.end8, %entry
    %0 = bitcast i8* %arr_segments_ptr to i16*
    %1 = load i16, i16* %0, align 2
    %conv = sext i16 %1 to i32
    %cmp = icmp sgt i16 %1, 0
    br i1 %cmp, label %if.then, label %if.else
  
  if.then:                                          ; preds = %while.body
    %div = sdiv i32 65535, %conv
    %mul = shl nsw i32 %div, 3
    br label %if.end8
  
  if.else:                                          ; preds = %while.body
    %2 = trunc i32 %conv to i16
    %cmp2 = icmp slt i16 %2, 0
    br i1 %cmp2, label %if.then4, label %if.end8
  
  if.then4:                                         ; preds = %if.else
    %div6 = sdiv i32 65535, %conv
    %mul7 = shl nsw i32 %div6, 3
    br label %if.end8
  
  if.end8:                                          ; preds = %if.then4, %if.else, %if.then
    %ye.0 = phi i32 [ 8, %if.then ], [ %mul7, %if.then4 ], [ 8, %if.else ]
    %ys.0 = phi i32 [ %mul, %if.then ], [ 8, %if.then4 ], [ 8, %if.else ]
    %add = add nsw i32 %ys.0, %ye.0
    %conv9 = trunc i32 %add to i16
    store i16 %conv9, i16* %scores, align 2
    br label %while.body
  }

...
---
name:            tc_main
alignment:       2
exposesReturnsTwice: false
legalized:       false
regBankSelected: false
selected:        false
failedISel:      false
tracksRegLiveness: true
hasWinCFI:       false
callsEHReturn:   false
callsUnwindInit: false
hasEHCatchret:   false
hasEHScopes:     false
hasEHFunclets:   false
failsVerification: false
tracksDebugUserValues: false
registers:
  - { id: 0, class: gpr32, preferred-register: '' }
  - { id: 1, class: gpr32all, preferred-register: '' }
  - { id: 2, class: gpr32all, preferred-register: '' }
  - { id: 3, class: gpr32, preferred-register: '' }
  - { id: 4, class: gpr32, preferred-register: '' }
  - { id: 5, class: gpr32, preferred-register: '' }
  - { id: 6, class: gpr32, preferred-register: '' }
  - { id: 7, class: gpr64common, preferred-register: '' }
  - { id: 8, class: gpr64common, preferred-register: '' }
  - { id: 9, class: gpr32common, preferred-register: '' }
  - { id: 10, class: gpr32, preferred-register: '' }
  - { id: 11, class: gpr32all, preferred-register: '' }
  - { id: 12, class: gpr32, preferred-register: '' }
  - { id: 13, class: gpr32all, preferred-register: '' }
  - { id: 14, class: gpr32, preferred-register: '' }
  - { id: 15, class: gpr32, preferred-register: '' }
  - { id: 16, class: gpr32, preferred-register: '' }
  - { id: 17, class: gpr32, preferred-register: '' }
  - { id: 18, class: gpr32all, preferred-register: '' }
  - { id: 19, class: gpr32, preferred-register: '' }
  - { id: 20, class: gpr32, preferred-register: '' }
  - { id: 21, class: gpr32, preferred-register: '' }
  - { id: 22, class: gpr32, preferred-register: '' }
  - { id: 23, class: gpr32, preferred-register: '' }
liveins:
  - { reg: '$x2', virtual-reg: '%7' }
  - { reg: '$x3', virtual-reg: '%8' }
frameInfo:
  isFrameAddressTaken: false
  isReturnAddressTaken: false
  hasStackMap:     false
  hasPatchPoint:   false
  stackSize:       0
  offsetAdjustment: 0
  maxAlignment:    1
  adjustsStack:    false
  hasCalls:        false
  stackProtector:  ''
  functionContext: ''
  maxCallFrameSize: 0
  cvBytesOfCalleeSavedRegisters: 0
  hasOpaqueSPAdjustment: false
  hasVAStart:      false
  hasMustTailInVarArgFunc: false
  hasTailCall:     false
  localFrameSize:  0
  savePoint:       ''
  restorePoint:    ''
fixedStack:      []
stack:           []
callSites:       []
debugValueSubstitutions: []
constants:       []
machineFunctionInfo: {}
body:             |
  bb.0.entry:
    successors: %bb.1(0x80000000)
    liveins: $x2, $x3
  
    %8:gpr64common = COPY $x3
    %7:gpr64common = COPY $x2
    %19:gpr32 = MOVi32imm 65535
  
  bb.1.while.body:
    successors: %bb.2(0x50000000), %bb.3(0x30000000)
  
    %9:gpr32common = LDRSHWui %8, 0 :: (load (s16) from %ir.0)
    %0:gpr32 = COPY %9
    %10:gpr32 = SUBSWri %9, 1, 0, implicit-def $nzcv
    Bcc 11, %bb.3, implicit $nzcv
    B %bb.2
  
  bb.2.if.then:
    successors: %bb.5(0x80000000)
  
    %20:gpr32 = SDIVWr %19, %9
    %21:gpr32 = nsw UBFMWri killed %20, 29, 28
    %22:gpr32 = MOVi32imm 8
    %18:gpr32all = COPY %22
    %1:gpr32all = COPY %21
    B %bb.5
  
  bb.3.if.else:
    successors: %bb.4(0x30000000), %bb.5(0x50000000)
  
    %12:gpr32 = MOVi32imm 8
    %11:gpr32all = COPY %12
    TBZW %0, 31, %bb.5
    B %bb.4
  
  bb.4.if.then4:
    successors: %bb.5(0x80000000)
  
    %15:gpr32 = SDIVWr %19, %9
    %16:gpr32 = nsw UBFMWri killed %15, 29, 28
    %17:gpr32 = MOVi32imm 8
    %13:gpr32all = COPY %17
    %2:gpr32all = COPY %16
  
  bb.5.if.end8:
    successors: %bb.1(0x80000000)
  
    %3:gpr32 = PHI %11, %bb.3, %2, %bb.4, %18, %bb.2
    %4:gpr32 = PHI %11, %bb.3, %13, %bb.4, %1, %bb.2
    %23:gpr32 = nsw ADDWrr %4, %3
    STRHHui killed %23, %7, 0 :: (store (s16) into %ir.scores)
    B %bb.1

...