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; ModuleID = 'lib.6aa176524913215c-cgu.0'

source_filename = "lib.6aa176524913215c-cgu.0"

target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"

target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree noinline norecurse nosync nounwind nonlazybind memory(argmem: readwrite) uwtable

define void @f_index(ptr noalias noundef nonnull align 4 captures(none) %data.0, i64 noundef %data.1) unnamed_addr #0 {

define void @f_index(ptr noalias noundef nonnull align 4 captures(none) %data.0, i64 noundef range(i64 0, 2305843009213693952) %data.1) unnamed_addr #0 {

start:

%_62.not = icmp eq i64 %data.1, 0

br i1 %_62.not, label %bb4, label %bb2.preheader

bb2.preheader: ; preds = %start

%min.iters.check = icmp ult i64 %data.1, 8

%min.iters.check = icmp samesign ult i64 %data.1, 8

br i1 %min.iters.check, label %bb2.preheader5, label %vector.ph

vector.ph: ; preds = %bb2.preheader

%n.vec = and i64 %data.1, -8

%n.vec = and i64 %data.1, 2305843009213693944

br label %vector.body

vector.body: ; preds = %vector.body, %vector.ph

%index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]

%0 = getelementptr inbounds nuw i32, ptr %data.0, i64 %index

%1 = getelementptr inbounds nuw i8, ptr %0, i64 16

%wide.load = load <4 x i32>, ptr %0, align 4

%wide.load4 = load <4 x i32>, ptr %1, align 4

%2 = add <4 x i32> %wide.load, splat (i32 1)

%3 = add <4 x i32> %wide.load4, splat (i32 1)

store <4 x i32> %2, ptr %0, align 4

store <4 x i32> %3, ptr %1, align 4

%index.next = add nuw i64 %index, 8

%4 = icmp eq i64 %index.next, %n.vec

br i1 %4, label %middle.block, label %vector.body, !llvm.loop !3

middle.block: ; preds = %vector.body

%cmp.n = icmp eq i64 %data.1, %n.vec

br i1 %cmp.n, label %bb4, label %bb2.preheader5

bb2.preheader5: ; preds = %bb2.preheader, %middle.block

%iter.sroa.0.03.ph = phi i64 [ 0, %bb2.preheader ], [ %n.vec, %middle.block ]

br label %bb2

bb4: ; preds = %bb2, %middle.block, %start

ret void

bb2: ; preds = %bb2.preheader5, %bb2

%iter.sroa.0.03 = phi i64 [ %5, %bb2 ], [ %iter.sroa.0.03.ph, %bb2.preheader5 ]

%5 = add nuw i64 %iter.sroa.0.03, 1

%5 = add nuw nsw i64 %iter.sroa.0.03, 1

%6 = getelementptr inbounds nuw i32, ptr %data.0, i64 %iter.sroa.0.03

%7 = load i32, ptr %6, align 4, !noundef !6

%8 = add i32 %7, 1

store i32 %8, ptr %6, align 4

%exitcond.not = icmp eq i64 %5, %data.1

br i1 %exitcond.not, label %bb4, label %bb2, !llvm.loop !7

}

attributes #0 = { nofree noinline norecurse nosync nounwind nonlazybind memory(argmem: readwrite) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" }

!llvm.module.flags = !{!0, !1}

!llvm.ident = !{!2}

!0 = !{i32 8, !"PIC Level", i32 2}

!1 = !{i32 2, !"RtLibUseGOT", i32 1}

!2 = !{!"rustc version 1.95.0-dev"}

!3 = distinct !{!3, !4, !5}

!4 = !{!"llvm.loop.isvectorized", i32 1}

!5 = !{!"llvm.loop.unroll.runtime.disable"}

!6 = !{}

!7 = distinct !{!7, !5, !4}

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; ModuleID = 'lib.6aa176524913215c-cgu.0'
source_filename = "lib.6aa176524913215c-cgu.0"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree noinline norecurse nosync nounwind nonlazybind memory(argmem: readwrite) uwtable
define void @f_index(ptr noalias noundef nonnull align 4 captures(none) %data.0, i64 noundef %data.1) unnamed_addr #0 {
start:
  %_62.not = icmp eq i64 %data.1, 0
  br i1 %_62.not, label %bb4, label %bb2.preheader

bb2.preheader:                                    ; preds = %start
  %min.iters.check = icmp ult i64 %data.1, 8
  br i1 %min.iters.check, label %bb2.preheader5, label %vector.ph

vector.ph:                                        ; preds = %bb2.preheader
  %n.vec = and i64 %data.1, -8
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %0 = getelementptr inbounds nuw i32, ptr %data.0, i64 %index
  %1 = getelementptr inbounds nuw i8, ptr %0, i64 16
  %wide.load = load <4 x i32>, ptr %0, align 4
  %wide.load4 = load <4 x i32>, ptr %1, align 4
  %2 = add <4 x i32> %wide.load, splat (i32 1)
  %3 = add <4 x i32> %wide.load4, splat (i32 1)
  store <4 x i32> %2, ptr %0, align 4
  store <4 x i32> %3, ptr %1, align 4
  %index.next = add nuw i64 %index, 8
  %4 = icmp eq i64 %index.next, %n.vec
  br i1 %4, label %middle.block, label %vector.body, !llvm.loop !3

middle.block:                                     ; preds = %vector.body
  %cmp.n = icmp eq i64 %data.1, %n.vec
  br i1 %cmp.n, label %bb4, label %bb2.preheader5

bb2.preheader5:                                   ; preds = %bb2.preheader, %middle.block
  %iter.sroa.0.03.ph = phi i64 [ 0, %bb2.preheader ], [ %n.vec, %middle.block ]
  br label %bb2

bb4:                                              ; preds = %bb2, %middle.block, %start
  ret void

bb2:                                              ; preds = %bb2.preheader5, %bb2
  %iter.sroa.0.03 = phi i64 [ %5, %bb2 ], [ %iter.sroa.0.03.ph, %bb2.preheader5 ]
  %5 = add nuw i64 %iter.sroa.0.03, 1
  %6 = getelementptr inbounds nuw i32, ptr %data.0, i64 %iter.sroa.0.03
  %7 = load i32, ptr %6, align 4, !noundef !6
  %8 = add i32 %7, 1
  store i32 %8, ptr %6, align 4
  %exitcond.not = icmp eq i64 %5, %data.1
  br i1 %exitcond.not, label %bb4, label %bb2, !llvm.loop !7
}

attributes #0 = { nofree noinline norecurse nosync nounwind nonlazybind memory(argmem: readwrite) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" }

!llvm.module.flags = !{!0, !1}
!llvm.ident = !{!2}

!0 = !{i32 8, !"PIC Level", i32 2}
!1 = !{i32 2, !"RtLibUseGOT", i32 1}
!2 = !{!"rustc version 1.95.0-dev"}
!3 = distinct !{!3, !4, !5}
!4 = !{!"llvm.loop.isvectorized", i32 1}
!5 = !{!"llvm.loop.unroll.runtime.disable"}
!6 = !{}
!7 = distinct !{!7, !5, !4}

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; Function Attrs: nofree noinline norecurse nosync nounwind nonlazybind memory(argmem: readwrite) uwtable
define void @f_index(ptr noalias noundef nonnull align 4 captures(none) %data.0, i64 noundef range(i64 0, 2305843009213693952) %data.1) unnamed_addr #0 {
start:
  %_62.not = icmp eq i64 %data.1, 0
  br i1 %_62.not, label %bb4, label %bb2.preheader

bb2.preheader:                                    ; preds = %start
  %min.iters.check = icmp samesign ult i64 %data.1, 8
  br i1 %min.iters.check, label %bb2.preheader5, label %vector.ph

vector.ph:                                        ; preds = %bb2.preheader
  %n.vec = and i64 %data.1, 2305843009213693944
  br label %vector.body

middle.block:                                     ; preds = %vector.body
  %cmp.n = icmp eq i64 %data.1, %n.vec
  br i1 %cmp.n, label %bb4, label %bb2.preheader5

bb2.preheader5:                                   ; preds = %bb2.preheader, %middle.block
  %iter.sroa.0.03.ph = phi i64 [ 0, %bb2.preheader ], [ %n.vec, %middle.block ]
  br label %bb2

bb4:                                              ; preds = %bb2, %middle.block, %start
  ret void

bb2:                                              ; preds = %bb2.preheader5, %bb2
  %iter.sroa.0.03 = phi i64 [ %5, %bb2 ], [ %iter.sroa.0.03.ph, %bb2.preheader5 ]
  %5 = add nuw nsw i64 %iter.sroa.0.03, 1
  %6 = getelementptr inbounds nuw i32, ptr %data.0, i64 %iter.sroa.0.03
  %7 = load i32, ptr %6, align 4, !noundef !6
  %8 = add i32 %7, 1
  store i32 %8, ptr %6, align 4
  %exitcond.not = icmp eq i64 %5, %data.1
  br i1 %exitcond.not, label %bb4, label %bb2, !llvm.loop !7
}

attributes #0 = { nofree noinline norecurse nosync nounwind nonlazybind memory(argmem: readwrite) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" }

!llvm.module.flags = !{!0, !1}
!llvm.ident = !{!2}

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