Xavier-Orin-pcie-diff
74 lines
pcie@14160000 {
pcie@14100000 {
status = "okay";
status = "okay";
nvidia,disable-power-down;
vddio-pex-ctl-supply = <&vdd_1v8_ao>;
nvidia,pex-wake = <&tegra_main_gpio TEGRA194_MAIN_GPIO(L, 2)
phys = <&p2u_hsio_3>;
GPIO_ACTIVE_HIGH>;
phy-names = "p2u-0";
vddio-pex-ctl-supply = <&p3668_spmic_sd3>;
};
nvidia,disable-aspm-states = <0xf>;
nvidia,enable-power-down;
nvidia,max-speed = <3>;
max-link-speed = <3>;
num-lanes = <1>;
#if TEGRA_PCIE_VERSION >= DT_VERSION_2
phys = <&p2u_hsio_11>;
phy-names = "p2u-0";
#else
phys = <&p2u_11>;
phy-names = "pcie-p2u-0";
#endif
};
tegra234.dtsi:
tegra194.dtsi:
pcie@14100000 {
compatible = "nvidia,tegra234-pcie";
power-domains = <&bpmp TEGRA234_POWER_DOMAIN_PCIEX1A>;
reg = <0x00 0x14100000 0x0 0x00020000>, /* appl registers (128K) */
<0x00 0x30000000 0x0 0x00040000>, /* configuration space (256K) */
<0x00 0x30040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
<0x00 0x30080000 0x0 0x00040000>; /* DBI reg space (256K) */
reg-names = "appl", "config", "atu_dma", "dbi";
pcie@14160000 {
nvidia,disable-power-down;
compatible = "nvidia,tegra194-pcie";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX4A>;
reg = <0x00 0x14160000 0x0 0x00020000>, /* appl registers (128K) */
<0x00 0x36000000 0x0 0x00040000>, /* configuration space (256K) */
<0x00 0x36040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
<0x00 0x36080000 0x0 0x00040000>; /* DBI reg space (256K) */
reg-names = "appl", "config", "atu_dma", "dbi";
status = "disabled";
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
num-lanes = <1>;
num-viewport = <8>;
linux,pci-domain = <1>;
#address-cells = <3>;
clocks = <&bpmp TEGRA234_CLK_PEX0_C1_CORE>;
#size-cells = <2>;
clock-names = "core";
device_type = "pci";
num-lanes = <4>;
num-viewport = <8>;
linux,pci-domain = <4>;
clocks = <&bpmp TEGRA194_CLK_PEX0_CORE_4>;
resets = <&bpmp TEGRA234_RESET_PEX0_CORE_1_APB>,
clock-names = "core";
<&bpmp TEGRA234_RESET_PEX0_CORE_1>;
reset-names = "apb", "core";
resets = <&bpmp TEGRA194_RESET_PEX0_CORE_4_APB>,
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
<&bpmp TEGRA194_RESET_PEX0_CORE_4>;
<GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
reset-names = "apb", "core";
interrupt-names = "intr", "msi";
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
#interrupt-cells = <1>;
<GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
interrupt-map-mask = <0 0 0 0>;
interrupt-names = "intr", "msi";
interrupt-map = <0 0 0 0 &gic GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
nvidia,bpmp = <&bpmp 1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
nvidia,bpmp = <&bpmp 4>;
nvidia,aspm-cmrt-us = <60>;
nvidia,aspm-pwr-on-t-us = <20>;
nvidia,aspm-l0s-entrance-latency-us = <3>;
nvidia,aspm-cmrt-us = <60>;
bus-range = <0x0 0xff>;
nvidia,aspm-pwr-on-t-us = <20>;
nvidia,aspm-l0s-entrance-latency-us = <3>;
bus-range = <0x0 0xff>;
ranges = <0x43000000 0x20 0x80000000 0x20 0x80000000 0x0 0x28000000>, /* prefetchable memory (640 MB) */
<0x02000000 0x0 0x40000000 0x20 0xa8000000 0x0 0x08000000>, /* non-prefetchable memory (128 MB) */
<0x01000000 0x0 0x30100000 0x00 0x30100000 0x0 0x00100000>; /* downstream I/O (1 MB) */
ranges = <0x43000000 0x14 0x00000000 0x14 0x00000000 0x3 0x40000000>, /* prefetchable memory (13 GiB) */
interconnects = <&mc TEGRA234_MEMORY_CLIENT_PCIE1R &emc>,
<0x02000000 0x0 0x40000000 0x17 0x40000000 0x0 0xbfff0000>, /* non-prefetchable memory (3 GiB - 64 KiB) */
<&mc TEGRA234_MEMORY_CLIENT_PCIE1W &emc>;
<0x01000000 0x0 0x00000000 0x17 0xffff0000 0x0 0x00010000>; /* downstream I/O (64 KiB) */
interconnect-names = "dma-mem", "write";
iommus = <&smmu_niso1 TEGRA234_SID_PCIE1>;
iommu-map = <0x0 &smmu_niso1 TEGRA234_SID_PCIE1 0x1000>;
iommu-map-mask = <0x0>;
dma-coherent;
interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE4R &emc>,
status = "disabled";
<&mc TEGRA194_MEMORY_CLIENT_PCIE4W &emc>;
};
interconnect-names = "read", "write";
};