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*************** Starting PHASE Optimize index checks

Looking for array size assertions for: $300

ArrSize for lengthVN:300 = 0

[RangeCheck::GetRangeWorker] BB02 N006 ( 4, 4) [000643] -A--------- * COMMA int $369

N004 ( 3, 3) [000641] DA--------- +--* STORE_LCL_VAR int V20 cse2 d:1 $VN.Void

N003 ( 3, 3) [000013] -----+----- | \--* ADD int $369

N001 ( 1, 1) [000011] -----+----- | +--* LCL_VAR int V02 loc0 u:2 $444

N002 ( 1, 1) [000012] -----+----- | \--* CNS_INT int 1 $c1

N005 ( 1, 1) [000642] ----------- \--* LCL_VAR int V20 cse2 u:1 $369

{

[RangeCheck::GetRangeWorker] BB02 N005 ( 1, 1) [000642] ----------- * LCL_VAR int V20 cse2 u:1 $369

{

----------------------------------------------------

N004 ( 3, 3) [000641] DA--------- * STORE_LCL_VAR int V20 cse2 d:1 $VN.Void

N003 ( 3, 3) [000013] -----+----- \--* ADD int $369

N001 ( 1, 1) [000011] -----+----- +--* LCL_VAR int V02 loc0 u:2 $444

N002 ( 1, 1) [000012] -----+----- \--* CNS_INT int 1 $c1

----------------------------------------------------

[RangeCheck::GetRangeWorker] BB02 N003 ( 3, 3) [000013] -----+----- * ADD int $369

N001 ( 1, 1) [000011] -----+----- +--* LCL_VAR int V02 loc0 u:2 $444

N002 ( 1, 1) [000012] -----+----- \--* CNS_INT int 1 $c1

{

[RangeCheck::GetRangeWorker] BB02 N001 ( 1, 1) [000011] -----+----- * LCL_VAR int V02 loc0 u:2 $444

{

----------------------------------------------------

N004 ( 0, 0) [000580] DA--------- * STORE_LCL_VAR int V02 loc0 d:2 $VN.Void

N003 ( 0, 0) [000579] ----------- \--* PHI int $444

N001 ( 0, 0) [000622] ----------- pred BB06 +--* PHI_ARG int V02 loc0 u:3

N002 ( 0, 0) [000603] ----------- pred BB26 \--* PHI_ARG int V02 loc0 u:1 $c0

----------------------------------------------------

[RangeCheck::GetRangeWorker] BB07 N003 ( 0, 0) [000579] ----------- * PHI int $444

N001 ( 0, 0) [000622] ----------- pred BB06 +--* PHI_ARG int V02 loc0 u:3

N002 ( 0, 0) [000603] ----------- pred BB26 \--* PHI_ARG int V02 loc0 u:1 $c0

{

[RangeCheck::GetRangeWorker] BB07 N001 ( 0, 0) [000622] ----------- * PHI_ARG int V02 loc0 u:3

{

----------------------------------------------------

N002 ( 1, 3) [000059] DA---+----- * STORE_LCL_VAR int V02 loc0 d:3 $VN.Void

N001 ( 1, 1) [000645] ----------- \--* LCL_VAR int V20 cse2 u:1 $369

----------------------------------------------------

[RangeCheck::GetRangeWorker] BB06 N001 ( 1, 1) [000645] ----------- * LCL_VAR int V20 cse2 u:1 $369

{

----------------------------------------------------

N004 ( 3, 3) [000641] DA--------- * STORE_LCL_VAR int V20 cse2 d:1 $VN.Void

N003 ( 3, 3) [000013] -----+----- \--* ADD int $369

N001 ( 1, 1) [000011] -----+----- +--* LCL_VAR int V02 loc0 u:2 $444

N002 ( 1, 1) [000012] -----+----- \--* CNS_INT int 1 $c1

----------------------------------------------------

[RangeCheck::GetRangeWorker] BB02 N003 ( 3, 3) [000013] -----+----- * ADD int $369

N001 ( 1, 1) [000011] -----+----- +--* LCL_VAR int V02 loc0 u:2 $444

N002 ( 1, 1) [000012] -----+----- \--* CNS_INT int 1 $c1

{

Merging assertions from pred edges of BB02 for op [000011] $444

Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT {MemOpaque:NotInLoop}ADD {IntCns -1}} is not {IntCns 0}, index = #27

Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<Unknown, $300 + -2>] into [<Dependent, $300 + -2>]

[RangeCheck::GetRangeWorker] BB02 N002 ( 1, 1) [000012] -----+----- * CNS_INT int 1 $c1

{

Computed Range [000012] => <1, 1>

}

Merging assertions from pred edges of BB02 for op [000012] $c1

BinOp add ranges <Dependent, $300 + -2> <1, 1> = <Dependent, $300 + -1>

Computed Range [000013] => <Dependent, $300 + -1>

}

Merge assertions from BB06: #02 #03 #27 for definition [000641]

ArrBnds Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03

Tightening pRange: [<Dependent, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]

done merging

Merging assertions from pred edges of BB06 for op [000645] $369

ArrBnds Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03

Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]

Computed Range [000645] => <0, $300 + -1>

}

Merge assertions from BB07: #02 for definition [000059]

done merging

Merging assertions from pred edges of BB07 for op [000622] $ffffffff

Merge assertions created by BB06 for BB07

#02 #03 #26 #27

ArrBnds Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03

Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]

Computed Range [000622] => <0, $300 + -1>

}

Merging assertions from pred edges of BB07 for op [000622] $ffffffff

Merge assertions created by BB06 for BB07

#02 #03 #26 #27

ArrBnds Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03

Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]

Merging ranges <Undef, Undef> <0, $300 + -1>:<0, $300 + -1>

[RangeCheck::GetRangeWorker] BB07 N002 ( 0, 0) [000603] ----------- * PHI_ARG int V02 loc0 u:1 $c0

{

Computed Range [000603] => <0, 0>

}

Merging assertions from pred edges of BB07 for op [000603] $c0

Merge assertions created by BB26 for BB07

#02

Merging ranges <0, $300 + -1> <0, 0>:<0, Unknown>

Computed Range [000579] => <0, Unknown>

}

Merge assertions from BB02: #02 #27 for definition [000580]

Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT {MemOpaque:NotInLoop}ADD {IntCns -1}} is not {IntCns 0}, index = #27

Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]

done merging

Merging assertions from pred edges of BB02 for op [000011] $444

Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT {MemOpaque:NotInLoop}ADD {IntCns -1}} is not {IntCns 0}, index = #27

Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]

Computed Range [000011] => <0, $300 + -2>

}

Merging assertions from pred edges of BB02 for op [000011] $444

Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT {MemOpaque:NotInLoop}ADD {IntCns -1}} is not {IntCns 0}, index = #27

Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]

BinOp add ranges <0, $300 + -2> <1, 1> = <1, $300 + -1>

Computed Range [000013] => <1, $300 + -1>

}

Merge assertions from BB02: #02 #27 for definition [000641]

done merging

Merging assertions from pred edges of BB02 for op [000642] $369

Computed Range [000642] => <1, $300 + -1>

}

Computed Range [000643] => <1, $300 + -1>

}

Does overflow [000643]?

Does overflow [000642]?

Merging assertions from pred edges of BB02 for op [000642] $369

Does overflow [000013]?

Does overflow [000011]?

Merging assertions from pred edges of BB02 for op [000011] $444

Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT {MemOpaque:NotInLoop}ADD {IntCns -1}} is not {IntCns 0}, index = #27

Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]

Does overflow [000579]?

Does overflow [000622]?

Merging assertions from pred edges of BB07 for op [000622] $ffffffff

Merge assertions created by BB06 for BB07

#02 #03 #26 #27

ArrBnds Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03

Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]

Does overflow [000645]?

Merging assertions from pred edges of BB06 for op [000645] $369

ArrBnds Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03

Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]

Does overflow [000013]?

Does overflow [000012]?

[000012] does not overflow

Checking bin op overflow ADD <0, $300 + -2> <1, 1>

[000013] does not overflow

[000645] does not overflow

[000622] does not overflow

Does overflow [000603]?

[000603] does not overflow

[000579] does not overflow

[000011] does not overflow

Checking bin op overflow ADD <0, $300 + -2> <1, 1>

[000013] does not overflow

[000642] does not overflow

[000643] does not overflow

Range value <1, $300 + -1>

[RangeCheck::Widen] BB02,

[000643]

<1, $300 + -1> BetweenBounds <0, [000019]>

$300 upper bound is: {MemOpaque:NotInLoop}

Array size is: 0

[RangeCheck::OptimizeRangeCheck] Between bounds

Before optRemoveRangeCheck:

N016 ( 15, 18) [000027] -A-XG+----- * COMMA int <l:$36d, c:$36c>

N008 ( 9, 12) [000020] -A-XG+----- +--* BOUNDS_CHECK_Rng void <l:$552, c:$551>

N006 ( 4, 4) [000643] -A--------- | +--* COMMA int $369

N004 ( 3, 3) [000641] DA--------- | | +--* STORE_LCL_VAR int V20 cse2 d:1 $VN.Void

N003 ( 3, 3) [000013] -----+----- | | | \--* ADD int $369

N001 ( 1, 1) [000011] -----+----- | | | +--* LCL_VAR int V02 loc0 u:2 $444

N002 ( 1, 1) [000012] -----+----- | | | \--* CNS_INT int 1 $c1

N005 ( 1, 1) [000642] ----------- | | \--* LCL_VAR int V20 cse2 u:1 $369

N007 ( 1, 1) [000019] -----+----- | \--* LCL_VAR int V16 tmp11 u:1 <l:$2c0, c:$300>

N015 ( 6, 6) [000226] ---XG+----- \--* IND int <l:$36b, c:$36a>

N014 ( 4, 5) [000026] ----G+-N--- \--* ADD byref <l:$291, c:$292>

N009 ( 1, 1) [000025] -----+----- +--* LCL_VAR byref V15 tmp10 u:2 <l:$200, c:$101>

N013 ( 3, 4) [000023] -----+-N--- \--* LSH long $416

N011 ( 2, 3) [000021] -----+---U- +--* CAST long <- uint $415

N010 ( 1, 1) [000644] ----------- | \--* LCL_VAR int V20 cse2 u:1 $369

N012 ( 1, 1) [000022] -----+----- \--* CNS_INT long 2 $242

After optRemoveRangeCheck for [000027]:

N017 ( 15, 18) [000029] DA-XG+----- * STORE_LCL_VAR int V03 loc1 d:1 <l:$558, c:$557>

N016 ( 15, 18) [000027] -A-XG+-N--- \--* COMMA int <l:$36d, c:$36c>

N004 ( 3, 3) [000641] DA--------- +--* STORE_LCL_VAR int V20 cse2 d:1 $VN.Void

N003 ( 3, 3) [000013] -----+----- | \--* ADD int $369

N001 ( 1, 1) [000011] -----+----- | +--* LCL_VAR int V02 loc0 u:2 $444

N002 ( 1, 1) [000012] -----+----- | \--* CNS_INT int 1 $c1

N015 ( 6, 6) [000226] ---XG+----- \--* IND int <l:$36b, c:$36a>

N014 ( 4, 5) [000026] ----G+-N--- \--* ADD byref <l:$291, c:$292>

N009 ( 1, 1) [000025] -----+----- +--* LCL_VAR byref V15 tmp10 u:2 <l:$200, c:$101>

N013 ( 3, 4) [000023] -----+-N--- \--* LSH long $416

N011 ( 2, 3) [000021] -----+---U- +--* CAST long <- uint $415

N010 ( 1, 1) [000644] ----------- | \--* LCL_VAR int V20 cse2 u:1 $369

N012 ( 1, 1) [000022] -----+----- \--* CNS_INT long 2 $242

Looking for array size assertions for: $300

ArrSize for lengthVN:300 = 0

[RangeCheck::GetRangeWorker] BB03 N006 ( 4, 4) [000639] -A--------- * COMMA int $59e

N004 ( 3, 3) [000637] DA--------- +--* STORE_LCL_VAR int V19 cse1 d:1 $VN.Void

N003 ( 3, 3) [000085] ----------- | \--* ADD int $59e

N001 ( 1, 1) [000083] ----------- | +--* LCL_VAR int V04 loc2 u:2 $448

N002 ( 1, 1) [000084] ----------- | \--* CNS_INT int 1 $c1

N005 ( 1, 1) [000638] ----------- \--* LCL_VAR int V19 cse1 u:1 $59e

{

[RangeCheck::GetRangeWorker] BB03 N005 ( 1, 1) [000638] ----------- * LCL_VAR int V19 cse1 u:1 $59e

{

----------------------------------------------------

N004 ( 3, 3) [000637] DA--------- * STORE_LCL_VAR int V19 cse1 d:1 $VN.Void

N003 ( 3, 3) [000085] ----------- \--* ADD int $59e

N001 ( 1, 1) [000083] ----------- +--* LCL_VAR int V04 loc2 u:2 $448

N002 ( 1, 1) [000084] ----------- \--* CNS_INT int 1 $c1

----------------------------------------------------

[RangeCheck::GetRangeWorker] BB03 N003 ( 3, 3) [000085] ----------- * ADD int $59e

N001 ( 1, 1) [000083] ----------- +--* LCL_VAR int V04 loc2 u:2 $448

N002 ( 1, 1) [000084] ----------- \--* CNS_INT int 1 $c1

{

[RangeCheck::GetRangeWorker] BB03 N001 ( 1, 1) [000083] ----------- * LCL_VAR int V04 loc2 u:2 $448

{

----------------------------------------------------

N004 ( 0, 0) [000582] DA--------- * STORE_LCL_VAR int V04 loc2 d:2 $VN.Void

N003 ( 0, 0) [000581] ----------- \--* PHI int $448

N001 ( 0, 0) [000611] ----------- pred BB03 +--* PHI_ARG int V04 loc2 u:3

N002 ( 0, 0) [000604] ----------- pred BB46 \--* PHI_ARG int V04 loc2 u:1 $444

----------------------------------------------------

[RangeCheck::GetRangeWorker] BB04 N003 ( 0, 0) [000581] ----------- * PHI int $448

N001 ( 0, 0) [000611] ----------- pred BB03 +--* PHI_ARG int V04 loc2 u:3

N002 ( 0, 0) [000604] ----------- pred BB46 \--* PHI_ARG int V04 loc2 u:1 $444

{

[RangeCheck::GetRangeWorker] BB04 N001 ( 0, 0) [000611] ----------- * PHI_ARG int V04 loc2 u:3

{

----------------------------------------------------

N004 ( 3, 3) [000119] DA---+----- * STORE_LCL_VAR int V04 loc2 d:3 $VN.Void

N003 ( 3, 3) [000118] -----+----- \--* ADD int $5a3

N001 ( 1, 1) [000116] -----+----- +--* LCL_VAR int V04 loc2 u:2 (last use) $448

N002 ( 1, 1) [000117] -----+----- \--* CNS_INT int -1 $c2

----------------------------------------------------

[RangeCheck::GetRangeWorker] BB03 N003 ( 3, 3) [000118] -----+----- * ADD int $5a3

N001 ( 1, 1) [000116] -----+----- +--* LCL_VAR int V04 loc2 u:2 (last use) $448

N002 ( 1, 1) [000117] -----+----- \--* CNS_INT int -1 $c2

{

[RangeCheck::GetRangeWorker] BB03 N001 ( 1, 1) [000116] -----+----- * LCL_VAR int V04 loc2 u:2 (last use) $448

{

----------------------------------------------------

N004 ( 0, 0) [000582] DA--------- * STORE_LCL_VAR int V04 loc2 d:2 $VN.Void

N003 ( 0, 0) [000581] ----------- \--* PHI int $448

N001 ( 0, 0) [000611] ----------- pred BB03 +--* PHI_ARG int V04 loc2 u:3

N002 ( 0, 0) [000604] ----------- pred BB46 \--* PHI_ARG int V04 loc2 u:1 $444

----------------------------------------------------

[RangeCheck::GetRangeWorker] BB04 N003 ( 0, 0) [000581] ----------- * PHI int $448

N001 ( 0, 0) [000611] ----------- pred BB03 +--* PHI_ARG int V04 loc2 u:3

N002 ( 0, 0) [000604] ----------- pred BB46 \--* PHI_ARG int V04 loc2 u:1 $444

{

PhiArg [000611] is already being computed

Merging assertions from pred edges of BB04 for op [000611] $ffffffff

Merge assertions created by BB03 for BB04

#02 #03 #04 #05 #07 #08 #09 #10 #13 #27

Merging ranges <Undef, Undef> <Dependent, Dependent>:<Dependent, Dependent>

[RangeCheck::GetRangeWorker] BB04 N002 ( 0, 0) [000604] ----------- * PHI_ARG int V04 loc2 u:1 $444

{

----------------------------------------------------

N002 ( 1, 3) [000031] DA---+----- * STORE_LCL_VAR int V04 loc2 d:1 $VN.Void

N001 ( 1, 1) [000030] -----+----- \--* LCL_VAR int V02 loc0 u:2 $444

----------------------------------------------------

[RangeCheck::GetRangeWorker] BB02 N001 ( 1, 1) [000030] -----+----- * LCL_VAR int V02 loc0 u:2 $444

{

----------------------------------------------------

N004 ( 0, 0) [000580] DA--------- * STORE_LCL_VAR int V02 loc0 d:2 $VN.Void

N003 ( 0, 0) [000579] ----------- \--* PHI int $444

N001 ( 0, 0) [000622] ----------- pred BB06 +--* PHI_ARG int V02 loc0 u:3

N002 ( 0, 0) [000603] ----------- pred BB26 \--* PHI_ARG int V02 loc0 u:1 $c0

----------------------------------------------------

[RangeCheck::GetRangeWorker] BB07 N003 ( 0, 0) [000579] ----------- * PHI int $444

N001 ( 0, 0) [000622] ----------- pred BB06 +--* PHI_ARG int V02 loc0 u:3

N002 ( 0, 0) [000603] ----------- pred BB26 \--* PHI_ARG int V02 loc0 u:1 $c0

{

[RangeCheck::GetRangeWorker] BB07 N001 ( 0, 0) [000622] ----------- * PHI_ARG int V02 loc0 u:3

{

----------------------------------------------------

N002 ( 1, 3) [000059] DA---+----- * STORE_LCL_VAR int V02 loc0 d:3 $VN.Void

N001 ( 1, 1) [000645] ----------- \--* LCL_VAR int V20 cse2 u:1 $369

----------------------------------------------------

[RangeCheck::GetRangeWorker] BB06 N001 ( 1, 1) [000645] ----------- * LCL_VAR int V20 cse2 u:1 $369

{

----------------------------------------------------

N004 ( 3, 3) [000641] DA--------- * STORE_LCL_VAR int V20 cse2 d:1 $VN.Void

N003 ( 3, 3) [000013] -----+----- \--* ADD int $369

N001 ( 1, 1) [000011] -----+----- +--* LCL_VAR int V02 loc0 u:2 $444

N002 ( 1, 1) [000012] -----+----- \--* CNS_INT int 1 $c1

----------------------------------------------------

[RangeCheck::GetRangeWorker] BB02 N003 ( 3, 3) [000013] -----+----- * ADD int $369

N001 ( 1, 1) [000011] -----+----- +--* LCL_VAR int V02 loc0 u:2 $444

N002 ( 1, 1) [000012] -----+----- \--* CNS_INT int 1 $c1

{

[RangeCheck::GetRangeWorker] BB02 N001 ( 1, 1) [000011] -----+----- * LCL_VAR int V02 loc0 u:2 $444

{

----------------------------------------------------

N004 ( 0, 0) [000580] DA--------- * STORE_LCL_VAR int V02 loc0 d:2 $VN.Void

N003 ( 0, 0) [000579] ----------- \--* PHI int $444

N001 ( 0, 0) [000622] ----------- pred BB06 +--* PHI_ARG int V02 loc0 u:3

N002 ( 0, 0) [000603] ----------- pred BB26 \--* PHI_ARG int V02 loc0 u:1 $c0

----------------------------------------------------

[RangeCheck::GetRangeWorker] BB07 N003 ( 0, 0) [000579] ----------- * PHI int $444

N001 ( 0, 0) [000622] ----------- pred BB06 +--* PHI_ARG int V02 loc0 u:3

N002 ( 0, 0) [000603] ----------- pred BB26 \--* PHI_ARG int V02 loc0 u:1 $c0

{

PhiArg [000622] is already being computed

Merging assertions from pred edges of BB07 for op [000622] $ffffffff

Merge assertions created by BB06 for BB07

#02 #03 #26 #27

ArrBnds Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03

Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]

Merging ranges <Undef, Undef> <0, $300 + -1>:<0, $300 + -1>

[RangeCheck::GetRangeWorker] BB07 N002 ( 0, 0) [000603] ----------- * PHI_ARG int V02 loc0 u:1 $c0

{

Computed Range [000603] => <0, 0>

}

Merging assertions from pred edges of BB07 for op [000603] $c0

Merge assertions created by BB26 for BB07

#02

Merging ranges <0, $300 + -1> <0, 0>:<0, Unknown>

Computed Range [000579] => <0, Unknown>

}

Merge assertions from BB02: #02 #27 for definition [000580]

Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT {MemOpaque:NotInLoop}ADD {IntCns -1}} is not {IntCns 0}, index = #27

Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]

done merging

Merging assertions from pred edges of BB02 for op [000011] $444

Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT {MemOpaque:NotInLoop}ADD {IntCns -1}} is not {IntCns 0}, index = #27

Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>

Diffs guardadas

Texto original

Abrir archivo

*************** Starting PHASE Optimize index checks
Looking for array size assertions for: $300
ArrSize for lengthVN:300 = 0
[RangeCheck::GetRangeWorker] BB02 N006 (  4,  4) [000643] -A---------                         *  COMMA     int    $369
N004 (  3,  3) [000641] DA---------                         +--*  STORE_LCL_VAR int    V20 cse2         d:1 $VN.Void
N003 (  3,  3) [000013] -----+-----                         |  \--*  ADD       int    $369
N001 (  1,  1) [000011] -----+-----                         |     +--*  LCL_VAR   int    V02 loc0         u:2 $444
N002 (  1,  1) [000012] -----+-----                         |     \--*  CNS_INT   int    1 $c1
N005 (  1,  1) [000642] -----------                         \--*  LCL_VAR   int    V20 cse2         u:1 $369
{
   [RangeCheck::GetRangeWorker] BB02 N005 (  1,  1) [000642] -----------                         *  LCL_VAR   int    V20 cse2         u:1 $369
   {
----------------------------------------------------
N004 (  3,  3) [000641] DA---------                         *  STORE_LCL_VAR int    V20 cse2         d:1 $VN.Void
N003 (  3,  3) [000013] -----+-----                         \--*  ADD       int    $369
N001 (  1,  1) [000011] -----+-----                            +--*  LCL_VAR   int    V02 loc0         u:2 $444
N002 (  1,  1) [000012] -----+-----                            \--*  CNS_INT   int    1 $c1
----------------------------------------------------
      [RangeCheck::GetRangeWorker] BB02 N003 (  3,  3) [000013] -----+-----                         *  ADD       int    $369
N001 (  1,  1) [000011] -----+-----                         +--*  LCL_VAR   int    V02 loc0         u:2 $444
N002 (  1,  1) [000012] -----+-----                         \--*  CNS_INT   int    1 $c1
      {
         [RangeCheck::GetRangeWorker] BB02 N001 (  1,  1) [000011] -----+-----                         *  LCL_VAR   int    V02 loc0         u:2 $444
         {
----------------------------------------------------
N004 (  0,  0) [000580] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:2 $VN.Void
N003 (  0,  0) [000579] -----------                         \--*  PHI       int    $444
N001 (  0,  0) [000622] ----------- pred BB06                  +--*  PHI_ARG   int    V02 loc0         u:3
N002 (  0,  0) [000603] ----------- pred BB26                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0
----------------------------------------------------
            [RangeCheck::GetRangeWorker] BB07 N003 (  0,  0) [000579] -----------                         *  PHI       int    $444
N001 (  0,  0) [000622] ----------- pred BB06               +--*  PHI_ARG   int    V02 loc0         u:3
N002 (  0,  0) [000603] ----------- pred BB26               \--*  PHI_ARG   int    V02 loc0         u:1 $c0
            {
               [RangeCheck::GetRangeWorker] BB07 N001 (  0,  0) [000622] -----------                         *  PHI_ARG   int    V02 loc0         u:3
               {
----------------------------------------------------
N002 (  1,  3) [000059] DA---+-----                         *  STORE_LCL_VAR int    V02 loc0         d:3 $VN.Void
N001 (  1,  1) [000645] -----------                         \--*  LCL_VAR   int    V20 cse2         u:1 $369
----------------------------------------------------
                  [RangeCheck::GetRangeWorker] BB06 N001 (  1,  1) [000645] -----------                         *  LCL_VAR   int    V20 cse2         u:1 $369
                  {
----------------------------------------------------
N004 (  3,  3) [000641] DA---------                         *  STORE_LCL_VAR int    V20 cse2         d:1 $VN.Void
N003 (  3,  3) [000013] -----+-----                         \--*  ADD       int    $369
N001 (  1,  1) [000011] -----+-----                            +--*  LCL_VAR   int    V02 loc0         u:2 $444
N002 (  1,  1) [000012] -----+-----                            \--*  CNS_INT   int    1 $c1
----------------------------------------------------
                     [RangeCheck::GetRangeWorker] BB02 N003 (  3,  3) [000013] -----+-----                         *  ADD       int    $369
N001 (  1,  1) [000011] -----+-----                         +--*  LCL_VAR   int    V02 loc0         u:2 $444
N002 (  1,  1) [000012] -----+-----                         \--*  CNS_INT   int    1 $c1
                     {
Merging assertions from pred edges of BB02 for op [000011] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<Unknown, $300 + -2>] into [<Dependent, $300 + -2>]
                        [RangeCheck::GetRangeWorker] BB02 N002 (  1,  1) [000012] -----+-----                         *  CNS_INT   int    1 $c1
                        {
                           Computed Range [000012] => <1, 1>
                        }
Merging assertions from pred edges of BB02 for op [000012] $c1
BinOp add ranges <Dependent, $300 + -2> <1, 1> = <Dependent, $300 + -1>
                        Computed Range [000013] => <Dependent, $300 + -1>
                     }
Merge assertions from BB06: #02 #03 #27 for definition [000641]
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<Dependent, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
done merging
Merging assertions from pred edges of BB06 for op [000645] $369
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
                     Computed Range [000645] => <0, $300 + -1>
                  }
Merge assertions from BB07: #02 for definition [000059]
done merging
Merging assertions from pred edges of BB07 for op [000622] $ffffffff
Merge assertions created by BB06 for BB07
#02 #03 #26 #27
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
                  Computed Range [000622] => <0, $300 + -1>
               }
Merging assertions from pred edges of BB07 for op [000622] $ffffffff
Merge assertions created by BB06 for BB07
#02 #03 #26 #27
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Merging ranges <Undef, Undef> <0, $300 + -1>:<0, $300 + -1>
               [RangeCheck::GetRangeWorker] BB07 N002 (  0,  0) [000603] -----------                         *  PHI_ARG   int    V02 loc0         u:1 $c0
               {
                  Computed Range [000603] => <0, 0>
               }
Merging assertions from pred edges of BB07 for op [000603] $c0
Merge assertions created by BB26 for BB07
#02
Merging ranges <0, $300 + -1> <0, 0>:<0, Unknown>
               Computed Range [000579] => <0, Unknown>
            }
Merge assertions from BB02: #02 #27 for definition [000580]
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB02 for op [000011] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
            Computed Range [000011] => <0, $300 + -2>
         }
Merging assertions from pred edges of BB02 for op [000011] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
BinOp add ranges <0, $300 + -2> <1, 1> = <1, $300 + -1>
         Computed Range [000013] => <1, $300 + -1>
      }
Merge assertions from BB02: #02 #27 for definition [000641]
done merging
Merging assertions from pred edges of BB02 for op [000642] $369
      Computed Range [000642] => <1, $300 + -1>
   }
   Computed Range [000643] => <1, $300 + -1>
}
Does overflow [000643]?
Does overflow [000642]?
Merging assertions from pred edges of BB02 for op [000642] $369
Does overflow [000013]?
Does overflow [000011]?
Merging assertions from pred edges of BB02 for op [000011] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000579]?
Does overflow [000622]?
Merging assertions from pred edges of BB07 for op [000622] $ffffffff
Merge assertions created by BB06 for BB07
#02 #03 #26 #27
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Does overflow [000645]?
Merging assertions from pred edges of BB06 for op [000645] $369
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Does overflow [000013]?
Does overflow [000012]?
[000012] does not overflow
Checking bin op overflow ADD <0, $300 + -2> <1, 1>
[000013] does not overflow
[000645] does not overflow
[000622] does not overflow
Does overflow [000603]?
[000603] does not overflow
[000579] does not overflow
[000011] does not overflow
Checking bin op overflow ADD <0, $300 + -2> <1, 1>
[000013] does not overflow
[000642] does not overflow
[000643] does not overflow
Range value <1, $300 + -1>
[RangeCheck::Widen] BB02, 
[000643]
<1, $300 + -1> BetweenBounds <0, [000019]>
$300 upper bound is:  {MemOpaque:NotInLoop}
Array size is: 0
[RangeCheck::OptimizeRangeCheck] Between bounds
Before optRemoveRangeCheck:
N016 ( 15, 18) [000027] -A-XG+-----                         *  COMMA     int    <l:$36d, c:$36c>
N008 (  9, 12) [000020] -A-XG+-----                         +--*  BOUNDS_CHECK_Rng void   <l:$552, c:$551>
N006 (  4,  4) [000643] -A---------                         |  +--*  COMMA     int    $369
N004 (  3,  3) [000641] DA---------                         |  |  +--*  STORE_LCL_VAR int    V20 cse2         d:1 $VN.Void
N003 (  3,  3) [000013] -----+-----                         |  |  |  \--*  ADD       int    $369
N001 (  1,  1) [000011] -----+-----                         |  |  |     +--*  LCL_VAR   int    V02 loc0         u:2 $444
N002 (  1,  1) [000012] -----+-----                         |  |  |     \--*  CNS_INT   int    1 $c1
N005 (  1,  1) [000642] -----------                         |  |  \--*  LCL_VAR   int    V20 cse2         u:1 $369
N007 (  1,  1) [000019] -----+-----                         |  \--*  LCL_VAR   int    V16 tmp11        u:1 <l:$2c0, c:$300>
N015 (  6,  6) [000226] ---XG+-----                         \--*  IND       int    <l:$36b, c:$36a>
N014 (  4,  5) [000026] ----G+-N---                            \--*  ADD       byref  <l:$291, c:$292>
N009 (  1,  1) [000025] -----+-----                               +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N013 (  3,  4) [000023] -----+-N---                               \--*  LSH       long   $416
N011 (  2,  3) [000021] -----+---U-                                  +--*  CAST      long <- uint $415
N010 (  1,  1) [000644] -----------                                  |  \--*  LCL_VAR   int    V20 cse2         u:1 $369
N012 (  1,  1) [000022] -----+-----                                  \--*  CNS_INT   long   2 $242
After optRemoveRangeCheck for [000027]:
N017 ( 15, 18) [000029] DA-XG+-----                         *  STORE_LCL_VAR int    V03 loc1         d:1 <l:$558, c:$557>
N016 ( 15, 18) [000027] -A-XG+-N---                         \--*  COMMA     int    <l:$36d, c:$36c>
N004 (  3,  3) [000641] DA---------                            +--*  STORE_LCL_VAR int    V20 cse2         d:1 $VN.Void
N003 (  3,  3) [000013] -----+-----                            |  \--*  ADD       int    $369
N001 (  1,  1) [000011] -----+-----                            |     +--*  LCL_VAR   int    V02 loc0         u:2 $444
N002 (  1,  1) [000012] -----+-----                            |     \--*  CNS_INT   int    1 $c1
N015 (  6,  6) [000226] ---XG+-----                            \--*  IND       int    <l:$36b, c:$36a>
N014 (  4,  5) [000026] ----G+-N---                               \--*  ADD       byref  <l:$291, c:$292>
N009 (  1,  1) [000025] -----+-----                                  +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N013 (  3,  4) [000023] -----+-N---                                  \--*  LSH       long   $416
N011 (  2,  3) [000021] -----+---U-                                     +--*  CAST      long <- uint $415
N010 (  1,  1) [000644] -----------                                     |  \--*  LCL_VAR   int    V20 cse2         u:1 $369
N012 (  1,  1) [000022] -----+-----                                     \--*  CNS_INT   long   2 $242
Looking for array size assertions for: $300
ArrSize for lengthVN:300 = 0
[RangeCheck::GetRangeWorker] BB03 N006 (  4,  4) [000639] -A---------                         *  COMMA     int    $59e
N004 (  3,  3) [000637] DA---------                         +--*  STORE_LCL_VAR int    V19 cse1         d:1 $VN.Void
N003 (  3,  3) [000085] -----------                         |  \--*  ADD       int    $59e
N001 (  1,  1) [000083] -----------                         |     +--*  LCL_VAR   int    V04 loc2         u:2 $448
N002 (  1,  1) [000084] -----------                         |     \--*  CNS_INT   int    1 $c1
N005 (  1,  1) [000638] -----------                         \--*  LCL_VAR   int    V19 cse1         u:1 $59e
{
   [RangeCheck::GetRangeWorker] BB03 N005 (  1,  1) [000638] -----------                         *  LCL_VAR   int    V19 cse1         u:1 $59e
   {
----------------------------------------------------
N004 (  3,  3) [000637] DA---------                         *  STORE_LCL_VAR int    V19 cse1         d:1 $VN.Void
N003 (  3,  3) [000085] -----------                         \--*  ADD       int    $59e
N001 (  1,  1) [000083] -----------                            +--*  LCL_VAR   int    V04 loc2         u:2 $448
N002 (  1,  1) [000084] -----------                            \--*  CNS_INT   int    1 $c1
----------------------------------------------------
      [RangeCheck::GetRangeWorker] BB03 N003 (  3,  3) [000085] -----------                         *  ADD       int    $59e
N001 (  1,  1) [000083] -----------                         +--*  LCL_VAR   int    V04 loc2         u:2 $448
N002 (  1,  1) [000084] -----------                         \--*  CNS_INT   int    1 $c1
      {
         [RangeCheck::GetRangeWorker] BB03 N001 (  1,  1) [000083] -----------                         *  LCL_VAR   int    V04 loc2         u:2 $448
         {
----------------------------------------------------
N004 (  0,  0) [000582] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:2 $VN.Void
N003 (  0,  0) [000581] -----------                         \--*  PHI       int    $448
N001 (  0,  0) [000611] ----------- pred BB03                  +--*  PHI_ARG   int    V04 loc2         u:3
N002 (  0,  0) [000604] ----------- pred BB46                  \--*  PHI_ARG   int    V04 loc2         u:1 $444
----------------------------------------------------
            [RangeCheck::GetRangeWorker] BB04 N003 (  0,  0) [000581] -----------                         *  PHI       int    $448
N001 (  0,  0) [000611] ----------- pred BB03               +--*  PHI_ARG   int    V04 loc2         u:3
N002 (  0,  0) [000604] ----------- pred BB46               \--*  PHI_ARG   int    V04 loc2         u:1 $444
            {
               [RangeCheck::GetRangeWorker] BB04 N001 (  0,  0) [000611] -----------                         *  PHI_ARG   int    V04 loc2         u:3
               {
----------------------------------------------------
N004 (  3,  3) [000119] DA---+-----                         *  STORE_LCL_VAR int    V04 loc2         d:3 $VN.Void
N003 (  3,  3) [000118] -----+-----                         \--*  ADD       int    $5a3
N001 (  1,  1) [000116] -----+-----                            +--*  LCL_VAR   int    V04 loc2         u:2 (last use) $448
N002 (  1,  1) [000117] -----+-----                            \--*  CNS_INT   int    -1 $c2
----------------------------------------------------
                  [RangeCheck::GetRangeWorker] BB03 N003 (  3,  3) [000118] -----+-----                         *  ADD       int    $5a3
N001 (  1,  1) [000116] -----+-----                         +--*  LCL_VAR   int    V04 loc2         u:2 (last use) $448
N002 (  1,  1) [000117] -----+-----                         \--*  CNS_INT   int    -1 $c2
                  {
                     [RangeCheck::GetRangeWorker] BB03 N001 (  1,  1) [000116] -----+-----                         *  LCL_VAR   int    V04 loc2         u:2 (last use) $448
                     {
----------------------------------------------------
N004 (  0,  0) [000582] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:2 $VN.Void
N003 (  0,  0) [000581] -----------                         \--*  PHI       int    $448
N001 (  0,  0) [000611] ----------- pred BB03                  +--*  PHI_ARG   int    V04 loc2         u:3
N002 (  0,  0) [000604] ----------- pred BB46                  \--*  PHI_ARG   int    V04 loc2         u:1 $444
----------------------------------------------------
                        [RangeCheck::GetRangeWorker] BB04 N003 (  0,  0) [000581] -----------                         *  PHI       int    $448
N001 (  0,  0) [000611] ----------- pred BB03               +--*  PHI_ARG   int    V04 loc2         u:3
N002 (  0,  0) [000604] ----------- pred BB46               \--*  PHI_ARG   int    V04 loc2         u:1 $444
                        {
PhiArg [000611] is already being computed
Merging assertions from pred edges of BB04 for op [000611] $ffffffff
Merge assertions created by BB03 for BB04
#02 #03 #04 #05 #07 #08 #09 #10 #13 #27
Merging ranges <Undef, Undef> <Dependent, Dependent>:<Dependent, Dependent>
                           [RangeCheck::GetRangeWorker] BB04 N002 (  0,  0) [000604] -----------                         *  PHI_ARG   int    V04 loc2         u:1 $444
                           {
----------------------------------------------------
N002 (  1,  3) [000031] DA---+-----                         *  STORE_LCL_VAR int    V04 loc2         d:1 $VN.Void
N001 (  1,  1) [000030] -----+-----                         \--*  LCL_VAR   int    V02 loc0         u:2 $444
----------------------------------------------------
                              [RangeCheck::GetRangeWorker] BB02 N001 (  1,  1) [000030] -----+-----                         *  LCL_VAR   int    V02 loc0         u:2 $444
                              {
----------------------------------------------------
N004 (  0,  0) [000580] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:2 $VN.Void
N003 (  0,  0) [000579] -----------                         \--*  PHI       int    $444
N001 (  0,  0) [000622] ----------- pred BB06                  +--*  PHI_ARG   int    V02 loc0         u:3
N002 (  0,  0) [000603] ----------- pred BB26                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0
----------------------------------------------------
                                 [RangeCheck::GetRangeWorker] BB07 N003 (  0,  0) [000579] -----------                         *  PHI       int    $444
N001 (  0,  0) [000622] ----------- pred BB06               +--*  PHI_ARG   int    V02 loc0         u:3
N002 (  0,  0) [000603] ----------- pred BB26               \--*  PHI_ARG   int    V02 loc0         u:1 $c0
                                 {
                                    [RangeCheck::GetRangeWorker] BB07 N001 (  0,  0) [000622] -----------                         *  PHI_ARG   int    V02 loc0         u:3
                                    {
----------------------------------------------------
N002 (  1,  3) [000059] DA---+-----                         *  STORE_LCL_VAR int    V02 loc0         d:3 $VN.Void
N001 (  1,  1) [000645] -----------                         \--*  LCL_VAR   int    V20 cse2         u:1 $369
----------------------------------------------------
                                       [RangeCheck::GetRangeWorker] BB06 N001 (  1,  1) [000645] -----------                         *  LCL_VAR   int    V20 cse2         u:1 $369
                                       {
----------------------------------------------------
N004 (  3,  3) [000641] DA---------                         *  STORE_LCL_VAR int    V20 cse2         d:1 $VN.Void
N003 (  3,  3) [000013] -----+-----                         \--*  ADD       int    $369
N001 (  1,  1) [000011] -----+-----                            +--*  LCL_VAR   int    V02 loc0         u:2 $444
N002 (  1,  1) [000012] -----+-----                            \--*  CNS_INT   int    1 $c1
----------------------------------------------------
                                          [RangeCheck::GetRangeWorker] BB02 N003 (  3,  3) [000013] -----+-----                         *  ADD       int    $369
N001 (  1,  1) [000011] -----+-----                         +--*  LCL_VAR   int    V02 loc0         u:2 $444
N002 (  1,  1) [000012] -----+-----                         \--*  CNS_INT   int    1 $c1
                                          {
                                             [RangeCheck::GetRangeWorker] BB02 N001 (  1,  1) [000011] -----+-----                         *  LCL_VAR   int    V02 loc0         u:2 $444
                                             {
----------------------------------------------------
N004 (  0,  0) [000580] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:2 $VN.Void
N003 (  0,  0) [000579] -----------                         \--*  PHI       int    $444
N001 (  0,  0) [000622] ----------- pred BB06                  +--*  PHI_ARG   int    V02 loc0         u:3
N002 (  0,  0) [000603] ----------- pred BB26                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0
----------------------------------------------------
                                                [RangeCheck::GetRangeWorker] BB07 N003 (  0,  0) [000579] -----------                         *  PHI       int    $444
N001 (  0,  0) [000622] ----------- pred BB06               +--*  PHI_ARG   int    V02 loc0         u:3
N002 (  0,  0) [000603] ----------- pred BB26               \--*  PHI_ARG   int    V02 loc0         u:1 $c0
                                                {
PhiArg [000622] is already being computed
Merging assertions from pred edges of BB07 for op [000622] $ffffffff
Merge assertions created by BB06 for BB07
#02 #03 #26 #27
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Merging ranges <Undef, Undef> <0, $300 + -1>:<0, $300 + -1>
                                                   [RangeCheck::GetRangeWorker] BB07 N002 (  0,  0) [000603] -----------                         *  PHI_ARG   int    V02 loc0         u:1 $c0
                                                   {
                                                      Computed Range [000603] => <0, 0>
                                                   }
Merging assertions from pred edges of BB07 for op [000603] $c0
Merge assertions created by BB26 for BB07
#02
Merging ranges <0, $300 + -1> <0, 0>:<0, Unknown>
                                                   Computed Range [000579] => <0, Unknown>
                                                }
Merge assertions from BB02: #02 #27 for definition [000580]
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB02 for op [000011] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                                Computed Range [000011] => <0, $300 + -2>
                                             }
Merging assertions from pred edges of BB02 for op [000011] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                             [RangeCheck::GetRangeWorker] BB02 N002 (  1,  1) [000012] -----+-----                         *  CNS_INT   int    1 $c1
                                             {
                                                Computed Range [000012] => <1, 1>
                                             }
Merging assertions from pred edges of BB02 for op [000012] $c1
BinOp add ranges <0, $300 + -2> <1, 1> = <1, $300 + -1>
                                             Computed Range [000013] => <1, $300 + -1>
                                          }
Merge assertions from BB06: #02 #03 #27 for definition [000641]
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
done merging
Merging assertions from pred edges of BB06 for op [000645] $369
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
                                          Computed Range [000645] => <1, $300 + -1>
                                       }
Merge assertions from BB07: #02 for definition [000059]
done merging
Merging assertions from pred edges of BB07 for op [000622] $ffffffff
Merge assertions created by BB06 for BB07
#02 #03 #26 #27
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
                                       Computed Range [000622] => <1, $300 + -1>
                                    }
Merging assertions from pred edges of BB07 for op [000622] $ffffffff
Merge assertions created by BB06 for BB07
#02 #03 #26 #27
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
Merging ranges <Undef, Undef> <1, $300 + -1>:<1, $300 + -1>
                                    [RangeCheck::GetRangeWorker] BB07 N002 (  0,  0) [000603] -----------                         *  PHI_ARG   int    V02 loc0         u:1 $c0
                                    {
                                       Cached Range [000603] => <0, 0>
                                    }
Merging assertions from pred edges of BB07 for op [000603] $c0
Merge assertions created by BB26 for BB07
#02
Merging ranges <1, $300 + -1> <0, 0>:<0, Unknown>
                                    Computed Range [000579] => <0, Unknown>
                                 }
Merge assertions from BB02: #02 #27 for definition [000580]
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB02 for op [000030] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                 Computed Range [000030] => <0, $300 + -2>
                              }
Merge assertions from BB04: #02 #03 #27 for definition [000031]
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB04 for op [000604] $444
Merge assertions created by BB46 for BB04
#02 #03 #27
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                              Computed Range [000604] => <0, $300 + -2>
                           }
Merging assertions from pred edges of BB04 for op [000604] $444
Merge assertions created by BB46 for BB04
#02 #03 #27
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Merging ranges <Dependent, Dependent> <0, $300 + -2>:<Dependent, Dependent>
                           Computed Range [000581] => <Dependent, Dependent>
                        }
Merge assertions from BB03: #02 #03 #05 #07 #08 #09 #10 #13 #27 for definition [000582]
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
done merging
Merging assertions from pred edges of BB03 for op [000116] $448
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
                        Computed Range [000116] => <0, $300 + -1>
                     }
Merging assertions from pred edges of BB03 for op [000116] $448
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
                     [RangeCheck::GetRangeWorker] BB03 N002 (  1,  1) [000117] -----+-----                         *  CNS_INT   int    -1 $c2
                     {
                        Computed Range [000117] => <-1, -1>
                     }
Merging assertions from pred edges of BB03 for op [000117] $c2
BinOp add ranges <0, $300 + -1> <-1, -1> = <-1, $300 + -2>
                     Computed Range [000118] => <-1, $300 + -2>
                  }
Merge assertions from BB04: #02 #03 #27 for definition [000119]
done merging
Merging assertions from pred edges of BB04 for op [000611] $ffffffff
Merge assertions created by BB03 for BB04
#02 #03 #04 #05 #07 #08 #09 #10 #13 #27
                  Computed Range [000611] => <-1, $300 + -2>
               }
Merging assertions from pred edges of BB04 for op [000611] $ffffffff
Merge assertions created by BB03 for BB04
#02 #03 #04 #05 #07 #08 #09 #10 #13 #27
Merging ranges <Undef, Undef> <-1, $300 + -2>:<-1, $300 + -2>
               [RangeCheck::GetRangeWorker] BB04 N002 (  0,  0) [000604] -----------                         *  PHI_ARG   int    V04 loc2         u:1 $444
               {
                  Cached Range [000604] => <0, $300 + -2>
               }
Merging assertions from pred edges of BB04 for op [000604] $444
Merge assertions created by BB46 for BB04
#02 #03 #27
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Merging ranges <-1, $300 + -2> <0, $300 + -2>:<-1, $300 + -2>
               Computed Range [000581] => <-1, $300 + -2>
            }
Merge assertions from BB03: #02 #03 #05 #07 #08 #09 #10 #13 #27 for definition [000582]
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<-1, $300 + -2>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -2>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB03 for op [000083] $448
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -2>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -2>]
            Computed Range [000083] => <0, $300 + -2>
         }
Merging assertions from pred edges of BB03 for op [000083] $448
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -2>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -2>]
         [RangeCheck::GetRangeWorker] BB03 N002 (  1,  1) [000084] -----------                         *  CNS_INT   int    1 $c1
         {
            Computed Range [000084] => <1, 1>
         }
Merging assertions from pred edges of BB03 for op [000084] $c1
BinOp add ranges <0, $300 + -2> <1, 1> = <1, $300 + -1>
         Computed Range [000085] => <1, $300 + -1>
      }
Merge assertions from BB03: #02 #03 #05 #07 #08 #09 #10 #13 #27 for definition [000637]
done merging
Merging assertions from pred edges of BB03 for op [000638] $59e
      Computed Range [000638] => <1, $300 + -1>
   }
   Computed Range [000639] => <1, $300 + -1>
}
Does overflow [000639]?
Does overflow [000638]?
Merging assertions from pred edges of BB03 for op [000638] $59e
Does overflow [000085]?
Does overflow [000083]?
Merging assertions from pred edges of BB03 for op [000083] $448
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Does overflow [000581]?
Does overflow [000611]?
Merging assertions from pred edges of BB04 for op [000611] $ffffffff
Merge assertions created by BB03 for BB04
#02 #03 #04 #05 #07 #08 #09 #10 #13 #27
Does overflow [000118]?
Does overflow [000116]?
Merging assertions from pred edges of BB03 for op [000116] $448
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Does overflow [000581]?
Does overflow [000604]?
Merging assertions from pred edges of BB04 for op [000604] $444
Merge assertions created by BB46 for BB04
#02 #03 #27
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000030]?
Merging assertions from pred edges of BB02 for op [000030] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000579]?
Does overflow [000622]?
Merging assertions from pred edges of BB07 for op [000622] $ffffffff
Merge assertions created by BB06 for BB07
#02 #03 #26 #27
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Does overflow [000645]?
Merging assertions from pred edges of BB06 for op [000645] $369
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Does overflow [000013]?
Does overflow [000011]?
Merging assertions from pred edges of BB02 for op [000011] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000579]?
Does overflow [000603]?
[000603] does not overflow
[000579] does not overflow
[000011] does not overflow
Does overflow [000012]?
[000012] does not overflow
Checking bin op overflow ADD <0, $300 + -2> <1, 1>
[000013] does not overflow
[000645] does not overflow
[000622] does not overflow
[000579] does not overflow
[000030] does not overflow
[000604] does not overflow
[000581] does not overflow
[000116] does not overflow
Does overflow [000117]?
[000117] does not overflow
Checking bin op overflow ADD <0, $300 + -1> <-1, -1>
[000118] does not overflow
[000611] does not overflow
[000581] does not overflow
[000083] does not overflow
Does overflow [000084]?
[000084] does not overflow
Checking bin op overflow ADD <0, $300 + -2> <1, 1>
[000085] does not overflow
[000638] does not overflow
[000639] does not overflow
Range value <1, $300 + -1>
[RangeCheck::Widen] BB03, 
[000639]
<1, $300 + -1> BetweenBounds <0, [000091]>
$300 upper bound is:  {MemOpaque:NotInLoop}
Array size is: 0
[RangeCheck::OptimizeRangeCheck] Between bounds
Before optRemoveRangeCheck:
N015 ( 12, 16) [000099] -A-XGO-----                         *  COMMA     byref  <l:$2aa, c:$2a9>
N008 (  9, 12) [000092] -A-XGO-----                         +--*  BOUNDS_CHECK_Rng void   <l:$600, c:$5ff>
N006 (  4,  4) [000639] -A---------                         |  +--*  COMMA     int    $59e
N004 (  3,  3) [000637] DA---------                         |  |  +--*  STORE_LCL_VAR int    V19 cse1         d:1 $VN.Void
N003 (  3,  3) [000085] -----------                         |  |  |  \--*  ADD       int    $59e
N001 (  1,  1) [000083] -----------                         |  |  |     +--*  LCL_VAR   int    V04 loc2         u:2 $448
N002 (  1,  1) [000084] -----------                         |  |  |     \--*  CNS_INT   int    1 $c1
N005 (  1,  1) [000638] -----------                         |  |  \--*  LCL_VAR   int    V19 cse1         u:1 $59e
N007 (  1,  1) [000091] -----------                         |  \--*  LCL_VAR   int    V16 tmp11        u:1 <l:$2c0, c:$300>
N014 (  4,  5) [000098] ----GO-N---                         \--*  ADD       byref  <l:$2a7, c:$2a8>
N009 (  1,  1) [000097] -----------                            +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N013 (  3,  4) [000095] -------N---                            \--*  LSH       long   $433
N011 (  2,  3) [000093] ---------U-                               +--*  CAST      long <- uint $432
N010 (  1,  1) [000640] -----------                               |  \--*  LCL_VAR   int    V19 cse1         u:1 $59e
N012 (  1,  1) [000094] -----------                               \--*  CNS_INT   long   2 $242
After optRemoveRangeCheck for [000099]:
N023 ( 22, 25) [000115] -A-XGO-----                         *  STOREIND  int    <l:$60e, c:$60b>
N015 ( 12, 16) [000099] -A--GO-N---                         +--*  COMMA     byref  <l:$2aa, c:$2a9>
N004 (  3,  3) [000637] DA---------                         |  +--*  STORE_LCL_VAR int    V19 cse1         d:1 $VN.Void
N003 (  3,  3) [000085] -----------                         |  |  \--*  ADD       int    $59e
N001 (  1,  1) [000083] -----------                         |  |     +--*  LCL_VAR   int    V04 loc2         u:2 $448
N002 (  1,  1) [000084] -----------                         |  |     \--*  CNS_INT   int    1 $c1
N014 (  4,  5) [000098] ----GO-N---                         |  \--*  ADD       byref  <l:$2a7, c:$2a8>
N009 (  1,  1) [000097] -----------                         |     +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N013 (  3,  4) [000095] -------N---                         |     \--*  LSH       long   $433
N011 (  2,  3) [000093] ---------U-                         |        +--*  CAST      long <- uint $432
N010 (  1,  1) [000640] -----------                         |        |  \--*  LCL_VAR   int    V19 cse1         u:1 $59e
N012 (  1,  1) [000094] -----------                         |        \--*  CNS_INT   long   2 $242
N022 (  6,  6) [000256] ---XGO-N---                         \--*  IND       int    <l:$5a0, c:$59f>
N021 (  4,  5) [000112] ----GO-N---                            \--*  ADD       byref  <l:$29f, c:$2a0>
N016 (  1,  1) [000111] -----------                               +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N020 (  3,  4) [000109] -------N---                               \--*  LSH       long   $42a
N018 (  2,  3) [000107] ---------U-                                  +--*  CAST      long <- uint $429
N017 (  1,  1) [000102] -----------                                  |  \--*  LCL_VAR   int    V04 loc2         u:2 $448
N019 (  1,  1) [000108] -----------                                  \--*  CNS_INT   long   2 $242
Looking for array size assertions for: $300
ArrSize for lengthVN:300 = 0
[RangeCheck::GetRangeWorker] BB05 N001 (  1,  1) [000063] -----+-----                         *  LCL_VAR   int    V04 loc2         u:2 $448
{
----------------------------------------------------
N004 (  0,  0) [000582] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:2 $VN.Void
N003 (  0,  0) [000581] -----------                         \--*  PHI       int    $448
N001 (  0,  0) [000611] ----------- pred BB03                  +--*  PHI_ARG   int    V04 loc2         u:3
N002 (  0,  0) [000604] ----------- pred BB46                  \--*  PHI_ARG   int    V04 loc2         u:1 $444
----------------------------------------------------
   [RangeCheck::GetRangeWorker] BB04 N003 (  0,  0) [000581] -----------                         *  PHI       int    $448
N001 (  0,  0) [000611] ----------- pred BB03               +--*  PHI_ARG   int    V04 loc2         u:3
N002 (  0,  0) [000604] ----------- pred BB46               \--*  PHI_ARG   int    V04 loc2         u:1 $444
   {
      [RangeCheck::GetRangeWorker] BB04 N001 (  0,  0) [000611] -----------                         *  PHI_ARG   int    V04 loc2         u:3
      {
----------------------------------------------------
N004 (  3,  3) [000119] DA---+-----                         *  STORE_LCL_VAR int    V04 loc2         d:3 $VN.Void
N003 (  3,  3) [000118] -----+-----                         \--*  ADD       int    $5a3
N001 (  1,  1) [000116] -----+-----                            +--*  LCL_VAR   int    V04 loc2         u:2 (last use) $448
N002 (  1,  1) [000117] -----+-----                            \--*  CNS_INT   int    -1 $c2
----------------------------------------------------
         [RangeCheck::GetRangeWorker] BB03 N003 (  3,  3) [000118] -----+-----                         *  ADD       int    $5a3
N001 (  1,  1) [000116] -----+-----                         +--*  LCL_VAR   int    V04 loc2         u:2 (last use) $448
N002 (  1,  1) [000117] -----+-----                         \--*  CNS_INT   int    -1 $c2
         {
            [RangeCheck::GetRangeWorker] BB03 N001 (  1,  1) [000116] -----+-----                         *  LCL_VAR   int    V04 loc2         u:2 (last use) $448
            {
----------------------------------------------------
N004 (  0,  0) [000582] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:2 $VN.Void
N003 (  0,  0) [000581] -----------                         \--*  PHI       int    $448
N001 (  0,  0) [000611] ----------- pred BB03                  +--*  PHI_ARG   int    V04 loc2         u:3
N002 (  0,  0) [000604] ----------- pred BB46                  \--*  PHI_ARG   int    V04 loc2         u:1 $444
----------------------------------------------------
               [RangeCheck::GetRangeWorker] BB04 N003 (  0,  0) [000581] -----------                         *  PHI       int    $448
N001 (  0,  0) [000611] ----------- pred BB03               +--*  PHI_ARG   int    V04 loc2         u:3
N002 (  0,  0) [000604] ----------- pred BB46               \--*  PHI_ARG   int    V04 loc2         u:1 $444
               {
PhiArg [000611] is already being computed
Merging assertions from pred edges of BB04 for op [000611] $ffffffff
Merge assertions created by BB03 for BB04
#02 #03 #04 #05 #07 #08 #09 #10 #13 #27
Merging ranges <Undef, Undef> <Dependent, Dependent>:<Dependent, Dependent>
                  [RangeCheck::GetRangeWorker] BB04 N002 (  0,  0) [000604] -----------                         *  PHI_ARG   int    V04 loc2         u:1 $444
                  {
----------------------------------------------------
N002 (  1,  3) [000031] DA---+-----                         *  STORE_LCL_VAR int    V04 loc2         d:1 $VN.Void
N001 (  1,  1) [000030] -----+-----                         \--*  LCL_VAR   int    V02 loc0         u:2 $444
----------------------------------------------------
                     [RangeCheck::GetRangeWorker] BB02 N001 (  1,  1) [000030] -----+-----                         *  LCL_VAR   int    V02 loc0         u:2 $444
                     {
----------------------------------------------------
N004 (  0,  0) [000580] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:2 $VN.Void
N003 (  0,  0) [000579] -----------                         \--*  PHI       int    $444
N001 (  0,  0) [000622] ----------- pred BB06                  +--*  PHI_ARG   int    V02 loc0         u:3
N002 (  0,  0) [000603] ----------- pred BB26                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0
----------------------------------------------------
                        [RangeCheck::GetRangeWorker] BB07 N003 (  0,  0) [000579] -----------                         *  PHI       int    $444
N001 (  0,  0) [000622] ----------- pred BB06               +--*  PHI_ARG   int    V02 loc0         u:3
N002 (  0,  0) [000603] ----------- pred BB26               \--*  PHI_ARG   int    V02 loc0         u:1 $c0
                        {
                           [RangeCheck::GetRangeWorker] BB07 N001 (  0,  0) [000622] -----------                         *  PHI_ARG   int    V02 loc0         u:3
                           {
----------------------------------------------------
N002 (  1,  3) [000059] DA---+-----                         *  STORE_LCL_VAR int    V02 loc0         d:3 $VN.Void
N001 (  1,  1) [000645] -----------                         \--*  LCL_VAR   int    V20 cse2         u:1 $369
----------------------------------------------------
                              [RangeCheck::GetRangeWorker] BB06 N001 (  1,  1) [000645] -----------                         *  LCL_VAR   int    V20 cse2         u:1 $369
                              {
----------------------------------------------------
N004 (  3,  3) [000641] DA---------                         *  STORE_LCL_VAR int    V20 cse2         d:1 $VN.Void
N003 (  3,  3) [000013] -----+-----                         \--*  ADD       int    $369
N001 (  1,  1) [000011] -----+-----                            +--*  LCL_VAR   int    V02 loc0         u:2 $444
N002 (  1,  1) [000012] -----+-----                            \--*  CNS_INT   int    1 $c1
----------------------------------------------------
                                 [RangeCheck::GetRangeWorker] BB02 N003 (  3,  3) [000013] -----+-----                         *  ADD       int    $369
N001 (  1,  1) [000011] -----+-----                         +--*  LCL_VAR   int    V02 loc0         u:2 $444
N002 (  1,  1) [000012] -----+-----                         \--*  CNS_INT   int    1 $c1
                                 {
                                    [RangeCheck::GetRangeWorker] BB02 N001 (  1,  1) [000011] -----+-----                         *  LCL_VAR   int    V02 loc0         u:2 $444
                                    {
----------------------------------------------------
N004 (  0,  0) [000580] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:2 $VN.Void
N003 (  0,  0) [000579] -----------                         \--*  PHI       int    $444
N001 (  0,  0) [000622] ----------- pred BB06                  +--*  PHI_ARG   int    V02 loc0         u:3
N002 (  0,  0) [000603] ----------- pred BB26                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0
----------------------------------------------------
                                       [RangeCheck::GetRangeWorker] BB07 N003 (  0,  0) [000579] -----------                         *  PHI       int    $444
N001 (  0,  0) [000622] ----------- pred BB06               +--*  PHI_ARG   int    V02 loc0         u:3
N002 (  0,  0) [000603] ----------- pred BB26               \--*  PHI_ARG   int    V02 loc0         u:1 $c0
                                       {
PhiArg [000622] is already being computed
Merging assertions from pred edges of BB07 for op [000622] $ffffffff
Merge assertions created by BB06 for BB07
#02 #03 #26 #27
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Merging ranges <Undef, Undef> <0, $300 + -1>:<0, $300 + -1>
                                          [RangeCheck::GetRangeWorker] BB07 N002 (  0,  0) [000603] -----------                         *  PHI_ARG   int    V02 loc0         u:1 $c0
                                          {
                                             Computed Range [000603] => <0, 0>
                                          }
Merging assertions from pred edges of BB07 for op [000603] $c0
Merge assertions created by BB26 for BB07
#02
Merging ranges <0, $300 + -1> <0, 0>:<0, Unknown>
                                          Computed Range [000579] => <0, Unknown>
                                       }
Merge assertions from BB02: #02 #27 for definition [000580]
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB02 for op [000011] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                       Computed Range [000011] => <0, $300 + -2>
                                    }
Merging assertions from pred edges of BB02 for op [000011] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                    [RangeCheck::GetRangeWorker] BB02 N002 (  1,  1) [000012] -----+-----                         *  CNS_INT   int    1 $c1
                                    {
                                       Computed Range [000012] => <1, 1>
                                    }
Merging assertions from pred edges of BB02 for op [000012] $c1
BinOp add ranges <0, $300 + -2> <1, 1> = <1, $300 + -1>
                                    Computed Range [000013] => <1, $300 + -1>
                                 }
Merge assertions from BB06: #02 #03 #27 for definition [000641]
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
done merging
Merging assertions from pred edges of BB06 for op [000645] $369
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
                                 Computed Range [000645] => <1, $300 + -1>
                              }
Merge assertions from BB07: #02 for definition [000059]
done merging
Merging assertions from pred edges of BB07 for op [000622] $ffffffff
Merge assertions created by BB06 for BB07
#02 #03 #26 #27
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
                              Computed Range [000622] => <1, $300 + -1>
                           }
Merging assertions from pred edges of BB07 for op [000622] $ffffffff
Merge assertions created by BB06 for BB07
#02 #03 #26 #27
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
Merging ranges <Undef, Undef> <1, $300 + -1>:<1, $300 + -1>
                           [RangeCheck::GetRangeWorker] BB07 N002 (  0,  0) [000603] -----------                         *  PHI_ARG   int    V02 loc0         u:1 $c0
                           {
                              Cached Range [000603] => <0, 0>
                           }
Merging assertions from pred edges of BB07 for op [000603] $c0
Merge assertions created by BB26 for BB07
#02
Merging ranges <1, $300 + -1> <0, 0>:<0, Unknown>
                           Computed Range [000579] => <0, Unknown>
                        }
Merge assertions from BB02: #02 #27 for definition [000580]
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB02 for op [000030] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                        Computed Range [000030] => <0, $300 + -2>
                     }
Merge assertions from BB04: #02 #03 #27 for definition [000031]
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB04 for op [000604] $444
Merge assertions created by BB46 for BB04
#02 #03 #27
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                     Computed Range [000604] => <0, $300 + -2>
                  }
Merging assertions from pred edges of BB04 for op [000604] $444
Merge assertions created by BB46 for BB04
#02 #03 #27
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Merging ranges <Dependent, Dependent> <0, $300 + -2>:<Dependent, Dependent>
                  Computed Range [000581] => <Dependent, Dependent>
               }
Merge assertions from BB03: #02 #03 #05 #07 #08 #09 #10 #13 #27 for definition [000582]
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
done merging
Merging assertions from pred edges of BB03 for op [000116] $448
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
               Computed Range [000116] => <0, $300 + -1>
            }
Merging assertions from pred edges of BB03 for op [000116] $448
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
            [RangeCheck::GetRangeWorker] BB03 N002 (  1,  1) [000117] -----+-----                         *  CNS_INT   int    -1 $c2
            {
               Computed Range [000117] => <-1, -1>
            }
Merging assertions from pred edges of BB03 for op [000117] $c2
BinOp add ranges <0, $300 + -1> <-1, -1> = <-1, $300 + -2>
            Computed Range [000118] => <-1, $300 + -2>
         }
Merge assertions from BB04: #02 #03 #27 for definition [000119]
done merging
Merging assertions from pred edges of BB04 for op [000611] $ffffffff
Merge assertions created by BB03 for BB04
#02 #03 #04 #05 #07 #08 #09 #10 #13 #27
         Computed Range [000611] => <-1, $300 + -2>
      }
Merging assertions from pred edges of BB04 for op [000611] $ffffffff
Merge assertions created by BB03 for BB04
#02 #03 #04 #05 #07 #08 #09 #10 #13 #27
Merging ranges <Undef, Undef> <-1, $300 + -2>:<-1, $300 + -2>
      [RangeCheck::GetRangeWorker] BB04 N002 (  0,  0) [000604] -----------                         *  PHI_ARG   int    V04 loc2         u:1 $444
      {
         Cached Range [000604] => <0, $300 + -2>
      }
Merging assertions from pred edges of BB04 for op [000604] $444
Merge assertions created by BB46 for BB04
#02 #03 #27
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Merging ranges <-1, $300 + -2> <0, $300 + -2>:<-1, $300 + -2>
      Computed Range [000581] => <-1, $300 + -2>
   }
Merge assertions from BB05: #02 #03 #07 #27 for definition [000582]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<-1, $300 + -2>] with assertedRange: [<0, Unknown>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB05 for op [000063] $448
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<0, Unknown>] into [<0, $300 + -2>]
   Computed Range [000063] => <0, $300 + -2>
}
Does overflow [000063]?
Merging assertions from pred edges of BB05 for op [000063] $448
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, Unknown>] into [<0, Unknown>]
Does overflow [000581]?
Does overflow [000611]?
Merging assertions from pred edges of BB04 for op [000611] $ffffffff
Merge assertions created by BB03 for BB04
#02 #03 #04 #05 #07 #08 #09 #10 #13 #27
Does overflow [000118]?
Does overflow [000116]?
Merging assertions from pred edges of BB03 for op [000116] $448
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Does overflow [000581]?
Does overflow [000604]?
Merging assertions from pred edges of BB04 for op [000604] $444
Merge assertions created by BB46 for BB04
#02 #03 #27
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000030]?
Merging assertions from pred edges of BB02 for op [000030] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000579]?
Does overflow [000622]?
Merging assertions from pred edges of BB07 for op [000622] $ffffffff
Merge assertions created by BB06 for BB07
#02 #03 #26 #27
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Does overflow [000645]?
Merging assertions from pred edges of BB06 for op [000645] $369
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Does overflow [000013]?
Does overflow [000011]?
Merging assertions from pred edges of BB02 for op [000011] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000579]?
Does overflow [000603]?
[000603] does not overflow
[000579] does not overflow
[000011] does not overflow
Does overflow [000012]?
[000012] does not overflow
Checking bin op overflow ADD <0, $300 + -2> <1, 1>
[000013] does not overflow
[000645] does not overflow
[000622] does not overflow
[000579] does not overflow
[000030] does not overflow
[000604] does not overflow
[000581] does not overflow
[000116] does not overflow
Does overflow [000117]?
[000117] does not overflow
Checking bin op overflow ADD <0, $300 + -1> <-1, -1>
[000118] does not overflow
[000611] does not overflow
[000581] does not overflow
[000063] does not overflow
Range value <0, $300 + -2>
[RangeCheck::Widen] BB05, 
[000063]
<0, $300 + -2> BetweenBounds <0, [000067]>
$300 upper bound is:  {MemOpaque:NotInLoop}
Array size is: 0
[RangeCheck::OptimizeRangeCheck] Between bounds
Before optRemoveRangeCheck:
N011 ( 12, 15) [000075] ---XG+-----                         *  COMMA     int    <l:$58d, c:$58c>
N003 (  6,  9) [000068] ---XG+-----                         +--*  BOUNDS_CHECK_Rng void   <l:$5d9, c:$5d8>
N001 (  1,  1) [000063] -----+-----                         |  +--*  LCL_VAR   int    V04 loc2         u:2 $448
N002 (  1,  1) [000067] -----+-----                         |  \--*  LCL_VAR   int    V16 tmp11        u:1 <l:$2c0, c:$300>
N010 (  6,  6) [000227] ---XG+-----                         \--*  IND       int    <l:$58b, c:$58a>
N009 (  4,  5) [000074] ----G+-N---                            \--*  ADD       byref  <l:$29f, c:$2a0>
N004 (  1,  1) [000073] -----+-----                               +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N008 (  3,  4) [000071] -----+-N---                               \--*  LSH       long   $42a
N006 (  2,  3) [000069] -----+---U-                                  +--*  CAST      long <- uint $429
N005 (  1,  1) [000064] -----+-----                                  |  \--*  LCL_VAR   int    V04 loc2         u:2 $448
N007 (  1,  1) [000070] -----+-----                                  \--*  CNS_INT   long   2 $242
After optRemoveRangeCheck for [000075]:
N012 ( 12, 15) [000122] DA-XG+-----                         *  STORE_LCL_VAR int    V07 tmp2         d:1 <l:$5df, c:$5de>
N011 ( 12, 15) [000075] ---XG+-N---                         \--*  COMMA     int    <l:$58d, c:$58c>
N003 (  6,  9) [000068] -----+-----                            +--*  NOP       void  
N010 (  6,  6) [000227] ---XG+-----                            \--*  IND       int    <l:$58b, c:$58a>
N009 (  4,  5) [000074] ----G+-N---                               \--*  ADD       byref  <l:$29f, c:$2a0>
N004 (  1,  1) [000073] -----+-----                                  +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N008 (  3,  4) [000071] -----+-N---                                  \--*  LSH       long   $42a
N006 (  2,  3) [000069] -----+---U-                                     +--*  CAST      long <- uint $429
N005 (  1,  1) [000064] -----+-----                                     |  \--*  LCL_VAR   int    V04 loc2         u:2 $448
N007 (  1,  1) [000070] -----+-----                                     \--*  CNS_INT   long   2 $242
Looking for array size assertions for: $314
ArrSize for lengthVN:314 = 0
[RangeCheck::GetRangeWorker] BB10 N001 (  1,  1) [000138] -----+-----                         *  LCL_VAR   int    V03 loc1         u:1 <l:$2c4, c:$309>
{
----------------------------------------------------
N013 (  9,  9) [000029] DA-XG+-----                         *  STORE_LCL_VAR int    V03 loc1         d:1 <l:$558, c:$557>
N012 (  9,  9) [000027] -A-XG+-N---                         \--*  COMMA     int    <l:$36d, c:$36c>
N004 (  3,  3) [000641] DA---------                            +--*  STORE_LCL_VAR int    V20 cse2         d:1 $VN.Void
N003 (  3,  3) [000013] -----+-----                            |  \--*  ADD       int    $369
N001 (  1,  1) [000011] -----+-----                            |     +--*  LCL_VAR   int    V02 loc0         u:2 $444
N002 (  1,  1) [000012] -----+-----                            |     \--*  CNS_INT   int    1 $c1
N011 (  6,  6) [000226] ---XG+-----                            \--*  IND       int    <l:$36b, c:$36a>
N010 (  4,  5) [000026] ----G+-N---                               \--*  ADD       byref  <l:$291, c:$292>
N005 (  1,  1) [000025] -----+-----                                  +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N009 (  3,  4) [000023] -----+-N---                                  \--*  LSH       long   $416
N007 (  2,  3) [000021] -----+---U-                                     +--*  CAST      long <- uint $415
N006 (  1,  1) [000644] -----------                                     |  \--*  LCL_VAR   int    V20 cse2         u:1 $369
N008 (  1,  1) [000022] -----+-----                                     \--*  CNS_INT   long   2 $242
----------------------------------------------------
   [RangeCheck::GetRangeWorker] BB02 N012 (  9,  9) [000027] -A-XG+-N---                         *  COMMA     int    <l:$36d, c:$36c>
N004 (  3,  3) [000641] DA---------                         +--*  STORE_LCL_VAR int    V20 cse2         d:1 $VN.Void
N003 (  3,  3) [000013] -----+-----                         |  \--*  ADD       int    $369
N001 (  1,  1) [000011] -----+-----                         |     +--*  LCL_VAR   int    V02 loc0         u:2 $444
N002 (  1,  1) [000012] -----+-----                         |     \--*  CNS_INT   int    1 $c1
N011 (  6,  6) [000226] ---XG+-----                         \--*  IND       int    <l:$36b, c:$36a>
N010 (  4,  5) [000026] ----G+-N---                            \--*  ADD       byref  <l:$291, c:$292>
N005 (  1,  1) [000025] -----+-----                               +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N009 (  3,  4) [000023] -----+-N---                               \--*  LSH       long   $416
N007 (  2,  3) [000021] -----+---U-                                  +--*  CAST      long <- uint $415
N006 (  1,  1) [000644] -----------                                  |  \--*  LCL_VAR   int    V20 cse2         u:1 $369
N008 (  1,  1) [000022] -----+-----                                  \--*  CNS_INT   long   2 $242
   {
      [RangeCheck::GetRangeWorker] BB02 N011 (  6,  6) [000226] ---XG+-----                         *  IND       int    <l:$36b, c:$36a>
N010 (  4,  5) [000026] ----G+-N---                         \--*  ADD       byref  <l:$291, c:$292>
N005 (  1,  1) [000025] -----+-----                            +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N009 (  3,  4) [000023] -----+-N---                            \--*  LSH       long   $416
N007 (  2,  3) [000021] -----+---U-                               +--*  CAST      long <- uint $415
N006 (  1,  1) [000644] -----------                               |  \--*  LCL_VAR   int    V20 cse2         u:1 $369
N008 (  1,  1) [000022] -----+-----                               \--*  CNS_INT   long   2 $242
      {
         Computed Range [000226] => <Unknown, Unknown>
      }
      Computed Range [000027] => <Unknown, Unknown>
   }
Merge assertions from BB10: #02 #03 #05 #07 #27 for definition [000029]
done merging
Merging assertions from pred edges of BB10 for op [000138] $309
   Computed Range [000138] => <Unknown, Unknown>
}
Range is completely unknown.
Failed to get range
Looking for array size assertions for: $314
ArrSize for lengthVN:314 = 0
[RangeCheck::GetRangeWorker] BB10 N001 (  1,  1) [000139] -----+-----                         *  LCL_VAR   int    V07 tmp2         u:1 <l:$2c7, c:$311>
{
----------------------------------------------------
N010 (  6,  6) [000122] DA-XG+-----                         *  STORE_LCL_VAR int    V07 tmp2         d:1 <l:$5df, c:$5de>
N009 (  6,  6) [000075] ---XG+-N---                         \--*  COMMA     int    <l:$58d, c:$58c>
N001 (  0,  0) [000068] -----+-----                            +--*  NOP       void  
N008 (  6,  6) [000227] ---XG+-----                            \--*  IND       int    <l:$58b, c:$58a>
N007 (  4,  5) [000074] ----G+-N---                               \--*  ADD       byref  <l:$29f, c:$2a0>
N002 (  1,  1) [000073] -----+-----                                  +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N006 (  3,  4) [000071] -----+-N---                                  \--*  LSH       long   $42a
N004 (  2,  3) [000069] -----+---U-                                     +--*  CAST      long <- uint $429
N003 (  1,  1) [000064] -----+-----                                     |  \--*  LCL_VAR   int    V04 loc2         u:2 $448
N005 (  1,  1) [000070] -----+-----                                     \--*  CNS_INT   long   2 $242
----------------------------------------------------
   [RangeCheck::GetRangeWorker] BB05 N009 (  6,  6) [000075] ---XG+-N---                         *  COMMA     int    <l:$58d, c:$58c>
N001 (  0,  0) [000068] -----+-----                         +--*  NOP       void  
N008 (  6,  6) [000227] ---XG+-----                         \--*  IND       int    <l:$58b, c:$58a>
N007 (  4,  5) [000074] ----G+-N---                            \--*  ADD       byref  <l:$29f, c:$2a0>
N002 (  1,  1) [000073] -----+-----                               +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N006 (  3,  4) [000071] -----+-N---                               \--*  LSH       long   $42a
N004 (  2,  3) [000069] -----+---U-                                  +--*  CAST      long <- uint $429
N003 (  1,  1) [000064] -----+-----                                  |  \--*  LCL_VAR   int    V04 loc2         u:2 $448
N005 (  1,  1) [000070] -----+-----                                  \--*  CNS_INT   long   2 $242
   {
      [RangeCheck::GetRangeWorker] BB05 N008 (  6,  6) [000227] ---XG+-----                         *  IND       int    <l:$58b, c:$58a>
N007 (  4,  5) [000074] ----G+-N---                         \--*  ADD       byref  <l:$29f, c:$2a0>
N002 (  1,  1) [000073] -----+-----                            +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N006 (  3,  4) [000071] -----+-N---                            \--*  LSH       long   $42a
N004 (  2,  3) [000069] -----+---U-                               +--*  CAST      long <- uint $429
N003 (  1,  1) [000064] -----+-----                               |  \--*  LCL_VAR   int    V04 loc2         u:2 $448
N005 (  1,  1) [000070] -----+-----                               \--*  CNS_INT   long   2 $242
      {
         Computed Range [000227] => <Unknown, Unknown>
      }
      Computed Range [000075] => <Unknown, Unknown>
   }
Merge assertions from BB10: #02 #03 #05 #07 #27 for definition [000122]
done merging
Merging assertions from pred edges of BB10 for op [000139] $311
   Computed Range [000139] => <Unknown, Unknown>
}
Range is completely unknown.
Failed to get range
Looking for array size assertions for: $300
ArrSize for lengthVN:300 = 0
[RangeCheck::GetRangeWorker] BB06 N006 (  4,  4) [000648] -A---------                         *  COMMA     int    $5a4
N004 (  3,  3) [000646] DA---------                         +--*  STORE_LCL_VAR int    V21 cse3         d:1 $VN.Void
N003 (  3,  3) [000039] -----+-----                         |  \--*  ADD       int    $5a4
N001 (  1,  1) [000037] -----+-----                         |     +--*  LCL_VAR   int    V04 loc2         u:6 $44b
N002 (  1,  1) [000038] -----+-----                         |     \--*  CNS_INT   int    1 $c1
N005 (  1,  1) [000647] -----------                         \--*  LCL_VAR   int    V21 cse3         u:1 $5a4
{
   [RangeCheck::GetRangeWorker] BB06 N005 (  1,  1) [000647] -----------                         *  LCL_VAR   int    V21 cse3         u:1 $5a4
   {
----------------------------------------------------
N004 (  3,  3) [000646] DA---------                         *  STORE_LCL_VAR int    V21 cse3         d:1 $VN.Void
N003 (  3,  3) [000039] -----+-----                         \--*  ADD       int    $5a4
N001 (  1,  1) [000037] -----+-----                            +--*  LCL_VAR   int    V04 loc2         u:6 $44b
N002 (  1,  1) [000038] -----+-----                            \--*  CNS_INT   int    1 $c1
----------------------------------------------------
      [RangeCheck::GetRangeWorker] BB06 N003 (  3,  3) [000039] -----+-----                         *  ADD       int    $5a4
N001 (  1,  1) [000037] -----+-----                         +--*  LCL_VAR   int    V04 loc2         u:6 $44b
N002 (  1,  1) [000038] -----+-----                         \--*  CNS_INT   int    1 $c1
      {
         [RangeCheck::GetRangeWorker] BB06 N001 (  1,  1) [000037] -----+-----                         *  LCL_VAR   int    V04 loc2         u:6 $44b
         {
----------------------------------------------------
N004 (  0,  0) [000584] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:6 $VN.Void
N003 (  0,  0) [000583] -----------                         \--*  PHI       int    $44b
N001 (  0,  0) [000621] ----------- pred BB64                  +--*  PHI_ARG   int    V04 loc2         u:4 $445
N002 (  0,  0) [000612] ----------- pred BB63                  \--*  PHI_ARG   int    V04 loc2         u:2 $448
----------------------------------------------------
            [RangeCheck::GetRangeWorker] BB06 N003 (  0,  0) [000583] -----------                         *  PHI       int    $44b
N001 (  0,  0) [000621] ----------- pred BB64               +--*  PHI_ARG   int    V04 loc2         u:4 $445
N002 (  0,  0) [000612] ----------- pred BB63               \--*  PHI_ARG   int    V04 loc2         u:2 $448
            {
               [RangeCheck::GetRangeWorker] BB06 N001 (  0,  0) [000621] -----------                         *  PHI_ARG   int    V04 loc2         u:4 $445
               {
----------------------------------------------------
N004 (  0,  0) [000590] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:4 $VN.Void
N003 (  0,  0) [000589] -----------                         \--*  PHI       int    $445
N001 (  0,  0) [000620] ----------- pred BB60                  +--*  PHI_ARG   int    V04 loc2         u:5
N002 (  0,  0) [000613] ----------- pred BB47                  \--*  PHI_ARG   int    V04 loc2         u:1 $444
----------------------------------------------------
                  [RangeCheck::GetRangeWorker] BB48 N003 (  0,  0) [000589] -----------                         *  PHI       int    $445
N001 (  0,  0) [000620] ----------- pred BB60               +--*  PHI_ARG   int    V04 loc2         u:5
N002 (  0,  0) [000613] ----------- pred BB47               \--*  PHI_ARG   int    V04 loc2         u:1 $444
                  {
                     [RangeCheck::GetRangeWorker] BB48 N001 (  0,  0) [000620] -----------                         *  PHI_ARG   int    V04 loc2         u:5
                     {
----------------------------------------------------
N004 (  3,  3) [000564] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:5 $VN.Void
N003 (  3,  3) [000565] -----------                         \--*  ADD       int    $588
N001 (  1,  1) [000566] -----------                            +--*  LCL_VAR   int    V04 loc2         u:4 (last use) $445
N002 (  1,  1) [000567] -----------                            \--*  CNS_INT   int    -1 $c2
----------------------------------------------------
                        [RangeCheck::GetRangeWorker] BB60 N003 (  3,  3) [000565] -----------                         *  ADD       int    $588
N001 (  1,  1) [000566] -----------                         +--*  LCL_VAR   int    V04 loc2         u:4 (last use) $445
N002 (  1,  1) [000567] -----------                         \--*  CNS_INT   int    -1 $c2
                        {
                           [RangeCheck::GetRangeWorker] BB60 N001 (  1,  1) [000566] -----------                         *  LCL_VAR   int    V04 loc2         u:4 (last use) $445
                           {
----------------------------------------------------
N004 (  0,  0) [000590] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:4 $VN.Void
N003 (  0,  0) [000589] -----------                         \--*  PHI       int    $445
N001 (  0,  0) [000620] ----------- pred BB60                  +--*  PHI_ARG   int    V04 loc2         u:5
N002 (  0,  0) [000613] ----------- pred BB47                  \--*  PHI_ARG   int    V04 loc2         u:1 $444
----------------------------------------------------
                              [RangeCheck::GetRangeWorker] BB48 N003 (  0,  0) [000589] -----------                         *  PHI       int    $445
N001 (  0,  0) [000620] ----------- pred BB60               +--*  PHI_ARG   int    V04 loc2         u:5
N002 (  0,  0) [000613] ----------- pred BB47               \--*  PHI_ARG   int    V04 loc2         u:1 $444
                              {
PhiArg [000620] is already being computed
Merging assertions from pred edges of BB48 for op [000620] $ffffffff
Merge assertions created by BB60 for BB48
#01 #02 #03 #04 #05 #06 #07 #08 #09 #10 #11 #12 #13 #14 #15 #16 #17 #18 #19 #20 #21 #22 #23 #24 #25 #26 #27 #28 #29 #30 #31 #32 #33 #34 #35 #36 #37 #38 #39 #40 #41 #42
Merging ranges <Undef, Undef> <Dependent, Dependent>:<Dependent, Dependent>
                                 [RangeCheck::GetRangeWorker] BB48 N002 (  0,  0) [000613] -----------                         *  PHI_ARG   int    V04 loc2         u:1 $444
                                 {
----------------------------------------------------
N002 (  1,  3) [000031] DA---+-----                         *  STORE_LCL_VAR int    V04 loc2         d:1 $VN.Void
N001 (  1,  1) [000030] -----+-----                         \--*  LCL_VAR   int    V02 loc0         u:2 $444
----------------------------------------------------
                                    [RangeCheck::GetRangeWorker] BB02 N001 (  1,  1) [000030] -----+-----                         *  LCL_VAR   int    V02 loc0         u:2 $444
                                    {
----------------------------------------------------
N004 (  0,  0) [000580] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:2 $VN.Void
N003 (  0,  0) [000579] -----------                         \--*  PHI       int    $444
N001 (  0,  0) [000622] ----------- pred BB06                  +--*  PHI_ARG   int    V02 loc0         u:3
N002 (  0,  0) [000603] ----------- pred BB26                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0
----------------------------------------------------
                                       [RangeCheck::GetRangeWorker] BB07 N003 (  0,  0) [000579] -----------                         *  PHI       int    $444
N001 (  0,  0) [000622] ----------- pred BB06               +--*  PHI_ARG   int    V02 loc0         u:3
N002 (  0,  0) [000603] ----------- pred BB26               \--*  PHI_ARG   int    V02 loc0         u:1 $c0
                                       {
                                          [RangeCheck::GetRangeWorker] BB07 N001 (  0,  0) [000622] -----------                         *  PHI_ARG   int    V02 loc0         u:3
                                          {
----------------------------------------------------
N002 (  1,  3) [000059] DA---+-----                         *  STORE_LCL_VAR int    V02 loc0         d:3 $VN.Void
N001 (  1,  1) [000645] -----------                         \--*  LCL_VAR   int    V20 cse2         u:1 $369
----------------------------------------------------
                                             [RangeCheck::GetRangeWorker] BB06 N001 (  1,  1) [000645] -----------                         *  LCL_VAR   int    V20 cse2         u:1 $369
                                             {
----------------------------------------------------
N004 (  3,  3) [000641] DA---------                         *  STORE_LCL_VAR int    V20 cse2         d:1 $VN.Void
N003 (  3,  3) [000013] -----+-----                         \--*  ADD       int    $369
N001 (  1,  1) [000011] -----+-----                            +--*  LCL_VAR   int    V02 loc0         u:2 $444
N002 (  1,  1) [000012] -----+-----                            \--*  CNS_INT   int    1 $c1
----------------------------------------------------
                                                [RangeCheck::GetRangeWorker] BB02 N003 (  3,  3) [000013] -----+-----                         *  ADD       int    $369
N001 (  1,  1) [000011] -----+-----                         +--*  LCL_VAR   int    V02 loc0         u:2 $444
N002 (  1,  1) [000012] -----+-----                         \--*  CNS_INT   int    1 $c1
                                                {
                                                   [RangeCheck::GetRangeWorker] BB02 N001 (  1,  1) [000011] -----+-----                         *  LCL_VAR   int    V02 loc0         u:2 $444
                                                   {
----------------------------------------------------
N004 (  0,  0) [000580] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:2 $VN.Void
N003 (  0,  0) [000579] -----------                         \--*  PHI       int    $444
N001 (  0,  0) [000622] ----------- pred BB06                  +--*  PHI_ARG   int    V02 loc0         u:3
N002 (  0,  0) [000603] ----------- pred BB26                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0
----------------------------------------------------
                                                      [RangeCheck::GetRangeWorker] BB07 N003 (  0,  0) [000579] -----------                         *  PHI       int    $444
N001 (  0,  0) [000622] ----------- pred BB06               +--*  PHI_ARG   int    V02 loc0         u:3
N002 (  0,  0) [000603] ----------- pred BB26               \--*  PHI_ARG   int    V02 loc0         u:1 $c0
                                                      {
PhiArg [000622] is already being computed
Merging assertions from pred edges of BB07 for op [000622] $ffffffff
Merge assertions created by BB06 for BB07
#02 #03 #26 #27
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Merging ranges <Undef, Undef> <0, $300 + -1>:<0, $300 + -1>
                                                         [RangeCheck::GetRangeWorker] BB07 N002 (  0,  0) [000603] -----------                         *  PHI_ARG   int    V02 loc0         u:1 $c0
                                                         {
                                                            Computed Range [000603] => <0, 0>
                                                         }
Merging assertions from pred edges of BB07 for op [000603] $c0
Merge assertions created by BB26 for BB07
#02
Merging ranges <0, $300 + -1> <0, 0>:<0, Unknown>
                                                         Computed Range [000579] => <0, Unknown>
                                                      }
Merge assertions from BB02: #02 #27 for definition [000580]
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB02 for op [000011] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                                      Computed Range [000011] => <0, $300 + -2>
                                                   }
Merging assertions from pred edges of BB02 for op [000011] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                                   [RangeCheck::GetRangeWorker] BB02 N002 (  1,  1) [000012] -----+-----                         *  CNS_INT   int    1 $c1
                                                   {
                                                      Computed Range [000012] => <1, 1>
                                                   }
Merging assertions from pred edges of BB02 for op [000012] $c1
BinOp add ranges <0, $300 + -2> <1, 1> = <1, $300 + -1>
                                                   Computed Range [000013] => <1, $300 + -1>
                                                }
Merge assertions from BB06: #02 #03 #27 for definition [000641]
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
done merging
Merging assertions from pred edges of BB06 for op [000645] $369
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
                                                Computed Range [000645] => <1, $300 + -1>
                                             }
Merge assertions from BB07: #02 for definition [000059]
done merging
Merging assertions from pred edges of BB07 for op [000622] $ffffffff
Merge assertions created by BB06 for BB07
#02 #03 #26 #27
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
                                             Computed Range [000622] => <1, $300 + -1>
                                          }
Merging assertions from pred edges of BB07 for op [000622] $ffffffff
Merge assertions created by BB06 for BB07
#02 #03 #26 #27
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
Merging ranges <Undef, Undef> <1, $300 + -1>:<1, $300 + -1>
                                          [RangeCheck::GetRangeWorker] BB07 N002 (  0,  0) [000603] -----------                         *  PHI_ARG   int    V02 loc0         u:1 $c0
                                          {
                                             Cached Range [000603] => <0, 0>
                                          }
Merging assertions from pred edges of BB07 for op [000603] $c0
Merge assertions created by BB26 for BB07
#02
Merging ranges <1, $300 + -1> <0, 0>:<0, Unknown>
                                          Computed Range [000579] => <0, Unknown>
                                       }
Merge assertions from BB02: #02 #27 for definition [000580]
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB02 for op [000030] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                       Computed Range [000030] => <0, $300 + -2>
                                    }
Merge assertions from BB48: #01 #02 #03 #04 #05 #06 #07 #08 #09 #10 #11 #12 #13 #14 #15 #16 #17 #18 #19 #20 #21 #22 #23 #24 #25 #26 #27 #28 #29 #30 #31 #32 #33 #34 #35 #36 #37 #38 #39 #40 #41 #42 for definition [000031]
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is  {IntCns 0}, index = #28
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<$300 + -1, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB48 for op [000613] $444
Merge assertions created by BB47 for BB48
#01 #02 #03 #04 #05 #06 #07 #08 #09 #10 #11 #12 #13 #14 #15 #16 #17 #18 #19 #20 #21 #22 #23 #24 #25 #26 #27 #28 #29 #30 #31 #32 #33 #34 #35 #36 #37 #38 #39 #40 #41 #42
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is  {IntCns 0}, index = #28
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<$300 + -1, $300 + -2>] into [<0, $300 + -2>]
                                    Computed Range [000613] => <0, $300 + -2>
                                 }
Merging assertions from pred edges of BB48 for op [000613] $444
Merge assertions created by BB47 for BB48
#01 #02 #03 #04 #05 #06 #07 #08 #09 #10 #11 #12 #13 #14 #15 #16 #17 #18 #19 #20 #21 #22 #23 #24 #25 #26 #27 #28 #29 #30 #31 #32 #33 #34 #35 #36 #37 #38 #39 #40 #41 #42
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is  {IntCns 0}, index = #28
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<$300 + -1, $300 + -2>] into [<0, $300 + -2>]
Merging ranges <Dependent, Dependent> <0, $300 + -2>:<Dependent, Dependent>
                                 Computed Range [000589] => <Dependent, Dependent>
                              }
Merge assertions from BB60: #01 #02 #03 #04 #05 #06 #07 #08 #09 #10 #11 #12 #13 #14 #15 #16 #17 #18 #19 #20 #21 #22 #23 #24 #25 #26 #27 #28 #29 #30 #31 #32 #33 #34 #35 #36 #37 #38 #39 #40 #41 #42 for definition [000590]
Constant Assertion: ($36e,$c0) Const_Loop_Bnd {LT($445, $c0)} is not  {IntCns 0}, index = #15
Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<Unknown, -1>] into [<Dependent, -1>]
Constant Assertion: ($36e,$c0) Const_Loop_Bnd {LT($445, $c0)} is  {IntCns 0}, index = #16
Tightening pRange: [<Dependent, -1>] with assertedRange: [<0, -1>] into [<0, -1>]
ArrBnds  Assertion: ($0,$0) [idx: $445 {PhiDef(V04 d:4, u:5, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #17
Tightening pRange: [<0, -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
done merging
Merging assertions from pred edges of BB60 for op [000566] $445
Constant Assertion: ($36e,$c0) Const_Loop_Bnd {LT($445, $c0)} is not  {IntCns 0}, index = #15
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<Unknown, -1>] into [<0, $300 + -1>]
Constant Assertion: ($36e,$c0) Const_Loop_Bnd {LT($445, $c0)} is  {IntCns 0}, index = #16
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, -1>] into [<0, $300 + -1>]
ArrBnds  Assertion: ($0,$0) [idx: $445 {PhiDef(V04 d:4, u:5, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #17
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
                              Computed Range [000566] => <0, $300 + -1>
                           }
Merging assertions from pred edges of BB60 for op [000566] $445
Constant Assertion: ($36e,$c0) Const_Loop_Bnd {LT($445, $c0)} is not  {IntCns 0}, index = #15
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<Unknown, -1>] into [<0, $300 + -1>]
Constant Assertion: ($36e,$c0) Const_Loop_Bnd {LT($445, $c0)} is  {IntCns 0}, index = #16
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, -1>] into [<0, $300 + -1>]
ArrBnds  Assertion: ($0,$0) [idx: $445 {PhiDef(V04 d:4, u:5, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #17
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
                           [RangeCheck::GetRangeWorker] BB60 N002 (  1,  1) [000567] -----------                         *  CNS_INT   int    -1 $c2
                           {
                              Computed Range [000567] => <-1, -1>
                           }
Merging assertions from pred edges of BB60 for op [000567] $c2
BinOp add ranges <0, $300 + -1> <-1, -1> = <-1, $300 + -2>
                           Computed Range [000565] => <-1, $300 + -2>
                        }
Merge assertions from BB48: #01 #02 #03 #04 #05 #06 #07 #08 #09 #10 #11 #12 #13 #14 #15 #16 #17 #18 #19 #20 #21 #22 #23 #24 #25 #26 #27 #28 #29 #30 #31 #32 #33 #34 #35 #36 #37 #38 #39 #40 #41 #42 for definition [000564]
done merging
Merging assertions from pred edges of BB48 for op [000620] $ffffffff
Merge assertions created by BB60 for BB48
#01 #02 #03 #04 #05 #06 #07 #08 #09 #10 #11 #12 #13 #14 #15 #16 #17 #18 #19 #20 #21 #22 #23 #24 #25 #26 #27 #28 #29 #30 #31 #32 #33 #34 #35 #36 #37 #38 #39 #40 #41 #42
                        Computed Range [000620] => <-1, $300 + -2>
                     }
Merging assertions from pred edges of BB48 for op [000620] $ffffffff
Merge assertions created by BB60 for BB48
#01 #02 #03 #04 #05 #06 #07 #08 #09 #10 #11 #12 #13 #14 #15 #16 #17 #18 #19 #20 #21 #22 #23 #24 #25 #26 #27 #28 #29 #30 #31 #32 #33 #34 #35 #36 #37 #38 #39 #40 #41 #42
Merging ranges <Undef, Undef> <-1, $300 + -2>:<-1, $300 + -2>
                     [RangeCheck::GetRangeWorker] BB48 N002 (  0,  0) [000613] -----------                         *  PHI_ARG   int    V04 loc2         u:1 $444
                     {
                        Cached Range [000613] => <0, $300 + -2>
                     }
Merging assertions from pred edges of BB48 for op [000613] $444
Merge assertions created by BB47 for BB48
#01 #02 #03 #04 #05 #06 #07 #08 #09 #10 #11 #12 #13 #14 #15 #16 #17 #18 #19 #20 #21 #22 #23 #24 #25 #26 #27 #28 #29 #30 #31 #32 #33 #34 #35 #36 #37 #38 #39 #40 #41 #42
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is  {IntCns 0}, index = #28
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<$300 + -1, $300 + -2>] into [<0, $300 + -2>]
Merging ranges <-1, $300 + -2> <0, $300 + -2>:<-1, $300 + -2>
                     Computed Range [000589] => <-1, $300 + -2>
                  }
Merge assertions from BB06: #02 #03 #27 for definition [000590]
done merging
Merging assertions from pred edges of BB06 for op [000621] $445
Merge assertions created by BB64 for BB06
#01 #02 #03 #04 #05 #06 #07 #08 #09 #10 #11 #12 #13 #14 #15 #16 #17 #18 #19 #20 #21 #22 #23 #24 #25 #26 #27 #28 #29 #30 #31 #32 #33 #34 #35 #36 #37 #38 #39 #40 #41 #42
Constant Assertion: ($36e,$c0) Const_Loop_Bnd {LT($445, $c0)} is not  {IntCns 0}, index = #15
Tightening pRange: [<-1, $300 + -2>] with assertedRange: [<Unknown, -1>] into [<-1, $300 + -2>]
Constant Assertion: ($36e,$c0) Const_Loop_Bnd {LT($445, $c0)} is  {IntCns 0}, index = #16
Tightening pRange: [<-1, $300 + -2>] with assertedRange: [<0, -1>] into [<0, $300 + -2>]
ArrBnds  Assertion: ($0,$0) [idx: $445 {PhiDef(V04 d:4, u:5, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #17
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -2>]
                  Computed Range [000621] => <0, $300 + -2>
               }
Merging assertions from pred edges of BB06 for op [000621] $445
Merge assertions created by BB64 for BB06
#01 #02 #03 #04 #05 #06 #07 #08 #09 #10 #11 #12 #13 #14 #15 #16 #17 #18 #19 #20 #21 #22 #23 #24 #25 #26 #27 #28 #29 #30 #31 #32 #33 #34 #35 #36 #37 #38 #39 #40 #41 #42
Constant Assertion: ($36e,$c0) Const_Loop_Bnd {LT($445, $c0)} is not  {IntCns 0}, index = #15
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, -1>] into [<0, $300 + -2>]
Constant Assertion: ($36e,$c0) Const_Loop_Bnd {LT($445, $c0)} is  {IntCns 0}, index = #16
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<0, -1>] into [<0, $300 + -2>]
ArrBnds  Assertion: ($0,$0) [idx: $445 {PhiDef(V04 d:4, u:5, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #17
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -2>]
Merging ranges <Undef, Undef> <0, $300 + -2>:<0, $300 + -2>
               [RangeCheck::GetRangeWorker] BB06 N002 (  0,  0) [000612] -----------                         *  PHI_ARG   int    V04 loc2         u:2 $448
               {
----------------------------------------------------
N004 (  0,  0) [000582] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:2 $VN.Void
N003 (  0,  0) [000581] -----------                         \--*  PHI       int    $448
N001 (  0,  0) [000611] ----------- pred BB03                  +--*  PHI_ARG   int    V04 loc2         u:3
N002 (  0,  0) [000604] ----------- pred BB46                  \--*  PHI_ARG   int    V04 loc2         u:1 $444
----------------------------------------------------
                  [RangeCheck::GetRangeWorker] BB04 N003 (  0,  0) [000581] -----------                         *  PHI       int    $448
N001 (  0,  0) [000611] ----------- pred BB03               +--*  PHI_ARG   int    V04 loc2         u:3
N002 (  0,  0) [000604] ----------- pred BB46               \--*  PHI_ARG   int    V04 loc2         u:1 $444
                  {
                     [RangeCheck::GetRangeWorker] BB04 N001 (  0,  0) [000611] -----------                         *  PHI_ARG   int    V04 loc2         u:3
                     {
----------------------------------------------------
N004 (  3,  3) [000119] DA---+-----                         *  STORE_LCL_VAR int    V04 loc2         d:3 $VN.Void
N003 (  3,  3) [000118] -----+-----                         \--*  ADD       int    $5a3
N001 (  1,  1) [000116] -----+-----                            +--*  LCL_VAR   int    V04 loc2         u:2 (last use) $448
N002 (  1,  1) [000117] -----+-----                            \--*  CNS_INT   int    -1 $c2
----------------------------------------------------
                        [RangeCheck::GetRangeWorker] BB03 N003 (  3,  3) [000118] -----+-----                         *  ADD       int    $5a3
N001 (  1,  1) [000116] -----+-----                         +--*  LCL_VAR   int    V04 loc2         u:2 (last use) $448
N002 (  1,  1) [000117] -----+-----                         \--*  CNS_INT   int    -1 $c2
                        {
                           [RangeCheck::GetRangeWorker] BB03 N001 (  1,  1) [000116] -----+-----                         *  LCL_VAR   int    V04 loc2         u:2 (last use) $448
                           {
----------------------------------------------------
N004 (  0,  0) [000582] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:2 $VN.Void
N003 (  0,  0) [000581] -----------                         \--*  PHI       int    $448
N001 (  0,  0) [000611] ----------- pred BB03                  +--*  PHI_ARG   int    V04 loc2         u:3
N002 (  0,  0) [000604] ----------- pred BB46                  \--*  PHI_ARG   int    V04 loc2         u:1 $444
----------------------------------------------------
                              [RangeCheck::GetRangeWorker] BB04 N003 (  0,  0) [000581] -----------                         *  PHI       int    $448
N001 (  0,  0) [000611] ----------- pred BB03               +--*  PHI_ARG   int    V04 loc2         u:3
N002 (  0,  0) [000604] ----------- pred BB46               \--*  PHI_ARG   int    V04 loc2         u:1 $444
                              {
PhiArg [000611] is already being computed
Merging assertions from pred edges of BB04 for op [000611] $ffffffff
Merge assertions created by BB03 for BB04
#02 #03 #04 #05 #07 #08 #09 #10 #13 #27
Merging ranges <Undef, Undef> <Dependent, Dependent>:<Dependent, Dependent>
                                 [RangeCheck::GetRangeWorker] BB04 N002 (  0,  0) [000604] -----------                         *  PHI_ARG   int    V04 loc2         u:1 $444
                                 {
----------------------------------------------------
N002 (  1,  3) [000031] DA---+-----                         *  STORE_LCL_VAR int    V04 loc2         d:1 $VN.Void
N001 (  1,  1) [000030] -----+-----                         \--*  LCL_VAR   int    V02 loc0         u:2 $444
----------------------------------------------------
                                    [RangeCheck::GetRangeWorker] BB02 N001 (  1,  1) [000030] -----+-----                         *  LCL_VAR   int    V02 loc0         u:2 $444
                                    {
                                       Cached Range [000030] => <0, $300 + -2>
                                    }
Merge assertions from BB04: #02 #03 #27 for definition [000031]
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB04 for op [000604] $444
Merge assertions created by BB46 for BB04
#02 #03 #27
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                    Computed Range [000604] => <0, $300 + -2>
                                 }
Merging assertions from pred edges of BB04 for op [000604] $444
Merge assertions created by BB46 for BB04
#02 #03 #27
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Merging ranges <Dependent, Dependent> <0, $300 + -2>:<Dependent, Dependent>
                                 Computed Range [000581] => <Dependent, Dependent>
                              }
Merge assertions from BB03: #02 #03 #05 #07 #08 #09 #10 #13 #27 for definition [000582]
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
done merging
Merging assertions from pred edges of BB03 for op [000116] $448
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
                              Computed Range [000116] => <0, $300 + -1>
                           }
Merging assertions from pred edges of BB03 for op [000116] $448
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
                           [RangeCheck::GetRangeWorker] BB03 N002 (  1,  1) [000117] -----+-----                         *  CNS_INT   int    -1 $c2
                           {
                              Computed Range [000117] => <-1, -1>
                           }
Merging assertions from pred edges of BB03 for op [000117] $c2
BinOp add ranges <0, $300 + -1> <-1, -1> = <-1, $300 + -2>
                           Computed Range [000118] => <-1, $300 + -2>
                        }
Merge assertions from BB04: #02 #03 #27 for definition [000119]
done merging
Merging assertions from pred edges of BB04 for op [000611] $ffffffff
Merge assertions created by BB03 for BB04
#02 #03 #04 #05 #07 #08 #09 #10 #13 #27
                        Computed Range [000611] => <-1, $300 + -2>
                     }
Merging assertions from pred edges of BB04 for op [000611] $ffffffff
Merge assertions created by BB03 for BB04
#02 #03 #04 #05 #07 #08 #09 #10 #13 #27
Merging ranges <Undef, Undef> <-1, $300 + -2>:<-1, $300 + -2>
                     [RangeCheck::GetRangeWorker] BB04 N002 (  0,  0) [000604] -----------                         *  PHI_ARG   int    V04 loc2         u:1 $444
                     {
                        Cached Range [000604] => <0, $300 + -2>
                     }
Merging assertions from pred edges of BB04 for op [000604] $444
Merge assertions created by BB46 for BB04
#02 #03 #27
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Merging ranges <-1, $300 + -2> <0, $300 + -2>:<-1, $300 + -2>
                     Computed Range [000581] => <-1, $300 + -2>
                  }
Merge assertions from BB06: #02 #03 #27 for definition [000582]
done merging
Merging assertions from pred edges of BB06 for op [000612] $448
Merge assertions created by BB63 for BB06
#02 #03 #27
                  Computed Range [000612] => <-1, $300 + -2>
               }
Merging assertions from pred edges of BB06 for op [000612] $448
Merge assertions created by BB63 for BB06
#02 #03 #27
Merging ranges <0, $300 + -2> <-1, $300 + -2>:<-1, $300 + -2>
               Computed Range [000583] => <-1, $300 + -2>
            }
Merge assertions from BB06: #02 #03 #27 for definition [000584]
done merging
Merging assertions from pred edges of BB06 for op [000037] $44b
            Computed Range [000037] => <-1, $300 + -2>
         }
Merging assertions from pred edges of BB06 for op [000037] $44b
         [RangeCheck::GetRangeWorker] BB06 N002 (  1,  1) [000038] -----+-----                         *  CNS_INT   int    1 $c1
         {
            Computed Range [000038] => <1, 1>
         }
Merging assertions from pred edges of BB06 for op [000038] $c1
BinOp add ranges <-1, $300 + -2> <1, 1> = <0, $300 + -1>
         Computed Range [000039] => <0, $300 + -1>
      }
Merge assertions from BB06: #02 #03 #27 for definition [000646]
done merging
Merging assertions from pred edges of BB06 for op [000647] $5a4
      Computed Range [000647] => <0, $300 + -1>
   }
   Computed Range [000648] => <0, $300 + -1>
}
Does overflow [000648]?
Does overflow [000647]?
Merging assertions from pred edges of BB06 for op [000647] $5a4
Does overflow [000039]?
Does overflow [000037]?
Merging assertions from pred edges of BB06 for op [000037] $44b
Does overflow [000583]?
Does overflow [000621]?
Merging assertions from pred edges of BB06 for op [000621] $445
Merge assertions created by BB64 for BB06
#01 #02 #03 #04 #05 #06 #07 #08 #09 #10 #11 #12 #13 #14 #15 #16 #17 #18 #19 #20 #21 #22 #23 #24 #25 #26 #27 #28 #29 #30 #31 #32 #33 #34 #35 #36 #37 #38 #39 #40 #41 #42
Constant Assertion: ($36e,$c0) Const_Loop_Bnd {LT($445, $c0)} is not  {IntCns 0}, index = #15
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, -1>] into [<Unknown, -1>]
Constant Assertion: ($36e,$c0) Const_Loop_Bnd {LT($445, $c0)} is  {IntCns 0}, index = #16
Tightening pRange: [<Unknown, -1>] with assertedRange: [<0, -1>] into [<0, -1>]
ArrBnds  Assertion: ($0,$0) [idx: $445 {PhiDef(V04 d:4, u:5, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #17
Tightening pRange: [<0, -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
[000621] does not overflow
Does overflow [000612]?
Merging assertions from pred edges of BB06 for op [000612] $448
Merge assertions created by BB63 for BB06
#02 #03 #27
Does overflow [000581]?
Does overflow [000611]?
Merging assertions from pred edges of BB04 for op [000611] $ffffffff
Merge assertions created by BB03 for BB04
#02 #03 #04 #05 #07 #08 #09 #10 #13 #27
Does overflow [000118]?
Does overflow [000116]?
Merging assertions from pred edges of BB03 for op [000116] $448
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
[000116] does not overflow
Does overflow [000117]?
[000117] does not overflow
Checking bin op overflow ADD <0, $300 + -1> <-1, -1>
[000118] does not overflow
[000611] does not overflow
Does overflow [000604]?
Merging assertions from pred edges of BB04 for op [000604] $444
Merge assertions created by BB46 for BB04
#02 #03 #27
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000030]?
Merging assertions from pred edges of BB02 for op [000030] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000579]?
Does overflow [000622]?
Merging assertions from pred edges of BB07 for op [000622] $ffffffff
Merge assertions created by BB06 for BB07
#02 #03 #26 #27
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
[000622] does not overflow
Does overflow [000603]?
[000603] does not overflow
[000579] does not overflow
[000030] does not overflow
[000604] does not overflow
[000581] does not overflow
[000612] does not overflow
[000583] does not overflow
[000037] does not overflow
Does overflow [000038]?
[000038] does not overflow
Checking bin op overflow ADD <-1, $300 + -2> <1, 1>
[000039] does not overflow
[000647] does not overflow
[000648] does not overflow
Range value <0, $300 + -1>
[RangeCheck::Widen] BB06, 
[000648]
<0, $300 + -1> BetweenBounds <0, [000045]>
$300 upper bound is:  {MemOpaque:NotInLoop}
Array size is: 0
[RangeCheck::OptimizeRangeCheck] Between bounds
Before optRemoveRangeCheck:
N015 ( 12, 16) [000053] -A-XG+-----                         *  COMMA     byref  <l:$2ae, c:$2ad>
N008 (  9, 12) [000046] -A-XG+-----                         +--*  BOUNDS_CHECK_Rng void   <l:$614, c:$613>
N006 (  4,  4) [000648] -A---------                         |  +--*  COMMA     int    $5a4
N004 (  3,  3) [000646] DA---------                         |  |  +--*  STORE_LCL_VAR int    V21 cse3         d:1 $VN.Void
N003 (  3,  3) [000039] -----+-----                         |  |  |  \--*  ADD       int    $5a4
N001 (  1,  1) [000037] -----+-----                         |  |  |     +--*  LCL_VAR   int    V04 loc2         u:6 $44b
N002 (  1,  1) [000038] -----+-----                         |  |  |     \--*  CNS_INT   int    1 $c1
N005 (  1,  1) [000647] -----------                         |  |  \--*  LCL_VAR   int    V21 cse3         u:1 $5a4
N007 (  1,  1) [000045] -----+-----                         |  \--*  LCL_VAR   int    V16 tmp11        u:1 <l:$2c0, c:$300>
N014 (  4,  5) [000052] ----G+-N---                         \--*  ADD       byref  <l:$2ab, c:$2ac>
N009 (  1,  1) [000051] -----+-----                            +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N013 (  3,  4) [000049] -----+-N---                            \--*  LSH       long   $435
N011 (  2,  3) [000047] -----+---U-                               +--*  CAST      long <- uint $434
N010 (  1,  1) [000649] -----------                               |  \--*  LCL_VAR   int    V21 cse3         u:1 $5a4
N012 (  1,  1) [000048] -----+-----                               \--*  CNS_INT   long   2 $242
After optRemoveRangeCheck for [000053]:
N017 ( 17, 20) [000055] -A-XG+-----                         *  STOREIND  int    <l:$61a, c:$618>
N015 ( 12, 16) [000053] -A--G+-N---                         +--*  COMMA     byref  <l:$2ae, c:$2ad>
N004 (  3,  3) [000646] DA---------                         |  +--*  STORE_LCL_VAR int    V21 cse3         d:1 $VN.Void
N003 (  3,  3) [000039] -----+-----                         |  |  \--*  ADD       int    $5a4
N001 (  1,  1) [000037] -----+-----                         |  |     +--*  LCL_VAR   int    V04 loc2         u:6 $44b
N002 (  1,  1) [000038] -----+-----                         |  |     \--*  CNS_INT   int    1 $c1
N014 (  4,  5) [000052] ----G+-N---                         |  \--*  ADD       byref  <l:$2ab, c:$2ac>
N009 (  1,  1) [000051] -----+-----                         |     +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N013 (  3,  4) [000049] -----+-N---                         |     \--*  LSH       long   $435
N011 (  2,  3) [000047] -----+---U-                         |        +--*  CAST      long <- uint $434
N010 (  1,  1) [000649] -----------                         |        |  \--*  LCL_VAR   int    V21 cse3         u:1 $5a4
N012 (  1,  1) [000048] -----+-----                         |        \--*  CNS_INT   long   2 $242
N016 (  1,  1) [000054] -----+-----                         \--*  LCL_VAR   int    V03 loc1         u:1 (last use) <l:$2c4, c:$309>
Looking for array size assertions for: $300
ArrSize for lengthVN:300 = 0
[RangeCheck::GetRangeWorker] BB29 N003 (  3,  3) [000266] -----------                         *  ADD       int    $347
N001 (  1,  1) [000267] -----------                         +--*  LCL_VAR   int    V02 loc0         u:4 $440
N002 (  1,  1) [000268] -----------                         \--*  CNS_INT   int    1 $c1
{
   [RangeCheck::GetRangeWorker] BB29 N001 (  1,  1) [000267] -----------                         *  LCL_VAR   int    V02 loc0         u:4 $440
   {
----------------------------------------------------
N004 (  0,  0) [000596] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:4 $VN.Void
N003 (  0,  0) [000595] -----------                         \--*  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43                  +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0
----------------------------------------------------
      [RangeCheck::GetRangeWorker] BB28 N003 (  0,  0) [000595] -----------                         *  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43               +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27               \--*  PHI_ARG   int    V02 loc0         u:1 $c0
      {
         [RangeCheck::GetRangeWorker] BB28 N001 (  0,  0) [000632] -----------                         *  PHI_ARG   int    V02 loc0         u:5
         {
----------------------------------------------------
N004 (  3,  3) [000425] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:5 $VN.Void
N003 (  3,  3) [000426] -----------                         \--*  ADD       int    $347
N001 (  1,  1) [000427] -----------                            +--*  LCL_VAR   int    V02 loc0         u:4 (last use) $440
N002 (  1,  1) [000428] -----------                            \--*  CNS_INT   int    1 $c1
----------------------------------------------------
            [RangeCheck::GetRangeWorker] BB43 N003 (  3,  3) [000426] -----------                         *  ADD       int    $347
N001 (  1,  1) [000427] -----------                         +--*  LCL_VAR   int    V02 loc0         u:4 (last use) $440
N002 (  1,  1) [000428] -----------                         \--*  CNS_INT   int    1 $c1
            {
               [RangeCheck::GetRangeWorker] BB43 N001 (  1,  1) [000427] -----------                         *  LCL_VAR   int    V02 loc0         u:4 (last use) $440
               {
----------------------------------------------------
N004 (  0,  0) [000596] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:4 $VN.Void
N003 (  0,  0) [000595] -----------                         \--*  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43                  +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0
----------------------------------------------------
                  [RangeCheck::GetRangeWorker] BB28 N003 (  0,  0) [000595] -----------                         *  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43               +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27               \--*  PHI_ARG   int    V02 loc0         u:1 $c0
                  {
PhiArg [000632] is already being computed
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Merging ranges <Undef, Undef> <0, $300 + -1>:<0, $300 + -1>
                     [RangeCheck::GetRangeWorker] BB28 N002 (  0,  0) [000623] -----------                         *  PHI_ARG   int    V02 loc0         u:1 $c0
                     {
                        Computed Range [000623] => <0, 0>
                     }
Merging assertions from pred edges of BB28 for op [000623] $c0
Merging ranges <0, $300 + -1> <0, 0>:<0, Unknown>
                     Computed Range [000595] => <0, Unknown>
                  }
Merge assertions from BB43: #29 #31 for definition [000596]
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB43 for op [000427] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                  Computed Range [000427] => <0, $300 + -2>
               }
Merging assertions from pred edges of BB43 for op [000427] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
               [RangeCheck::GetRangeWorker] BB43 N002 (  1,  1) [000428] -----------                         *  CNS_INT   int    1 $c1
               {
                  Computed Range [000428] => <1, 1>
               }
Merging assertions from pred edges of BB43 for op [000428] $c1
BinOp add ranges <0, $300 + -2> <1, 1> = <1, $300 + -1>
               Computed Range [000426] => <1, $300 + -1>
            }
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
            Computed Range [000632] => <1, $300 + -1>
         }
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
Merging ranges <Undef, Undef> <1, $300 + -1>:<1, $300 + -1>
         [RangeCheck::GetRangeWorker] BB28 N002 (  0,  0) [000623] -----------                         *  PHI_ARG   int    V02 loc0         u:1 $c0
         {
            Cached Range [000623] => <0, 0>
         }
Merging assertions from pred edges of BB28 for op [000623] $c0
Merging ranges <1, $300 + -1> <0, 0>:<0, Unknown>
         Computed Range [000595] => <0, Unknown>
      }
Merge assertions from BB29: #29 for definition [000596]
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB29 for op [000267] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
      Computed Range [000267] => <0, $300 + -2>
   }
Merging assertions from pred edges of BB29 for op [000267] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
   [RangeCheck::GetRangeWorker] BB29 N002 (  1,  1) [000268] -----------                         *  CNS_INT   int    1 $c1
   {
      Computed Range [000268] => <1, 1>
   }
Merging assertions from pred edges of BB29 for op [000268] $c1
BinOp add ranges <0, $300 + -2> <1, 1> = <1, $300 + -1>
   Computed Range [000266] => <1, $300 + -1>
}
Does overflow [000266]?
Does overflow [000267]?
Merging assertions from pred edges of BB29 for op [000267] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000595]?
Does overflow [000632]?
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Does overflow [000426]?
Does overflow [000427]?
Merging assertions from pred edges of BB43 for op [000427] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000595]?
Does overflow [000623]?
[000623] does not overflow
[000595] does not overflow
[000427] does not overflow
Does overflow [000428]?
[000428] does not overflow
Checking bin op overflow ADD <0, $300 + -2> <1, 1>
[000426] does not overflow
[000632] does not overflow
[000595] does not overflow
[000267] does not overflow
Does overflow [000268]?
[000268] does not overflow
Checking bin op overflow ADD <0, $300 + -2> <1, 1>
[000266] does not overflow
Range value <1, $300 + -1>
[RangeCheck::Widen] BB29, 
[000266]
<1, $300 + -1> BetweenBounds <0, [000269]>
$300 upper bound is:  {MemOpaque:NotInLoop}
Array size is: 0
[RangeCheck::OptimizeRangeCheck] Between bounds
Before optRemoveRangeCheck:
N015 ( 16, 19) [000264] ---XGO-----                         *  COMMA     int    <l:$34b, c:$34a>
N005 (  8, 11) [000265] ---XGO-----                         +--*  BOUNDS_CHECK_Rng void   <l:$3c7, c:$3c6>
N003 (  3,  3) [000266] -----------                         |  +--*  ADD       int    $347
N001 (  1,  1) [000267] -----------                         |  |  +--*  LCL_VAR   int    V02 loc0         u:4 $440
N002 (  1,  1) [000268] -----------                         |  |  \--*  CNS_INT   int    1 $c1
N004 (  1,  1) [000269] -----------                         |  \--*  LCL_VAR   int    V16 tmp11        u:1 <l:$2c0, c:$300>
N014 (  8,  8) [000270] ---XGO-----                         \--*  IND       int    <l:$349, c:$348>
N013 (  6,  7) [000271] ----GO-N---                            \--*  ADD       byref  <l:$282, c:$283>
N006 (  1,  1) [000272] -----------                               +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N012 (  5,  6) [000273] -------N---                               \--*  LSH       long   $402
N010 (  4,  5) [000274] ---------U-                                  +--*  CAST      long <- uint $401
N009 (  3,  3) [000275] -----------                                  |  \--*  ADD       int    $347
N007 (  1,  1) [000276] -----------                                  |     +--*  LCL_VAR   int    V02 loc0         u:4 $440
N008 (  1,  1) [000277] -----------                                  |     \--*  CNS_INT   int    1 $c1
N011 (  1,  1) [000278] -----------                                  \--*  CNS_INT   long   2 $242
After optRemoveRangeCheck for [000264]:
N016 ( 16, 19) [000263] DA-XGO-----                         *  STORE_LCL_VAR int    V03 loc1         d:2 <l:$3cd, c:$3cc>
N015 ( 16, 19) [000264] ---XGO-N---                         \--*  COMMA     int    <l:$34b, c:$34a>
N005 (  8, 11) [000265] -----------                            +--*  NOP       void  
N014 (  8,  8) [000270] ---XGO-----                            \--*  IND       int    <l:$349, c:$348>
N013 (  6,  7) [000271] ----GO-N---                               \--*  ADD       byref  <l:$282, c:$283>
N006 (  1,  1) [000272] -----------                                  +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N012 (  5,  6) [000273] -------N---                                  \--*  LSH       long   $402
N010 (  4,  5) [000274] ---------U-                                     +--*  CAST      long <- uint $401
N009 (  3,  3) [000275] -----------                                     |  \--*  ADD       int    $347
N007 (  1,  1) [000276] -----------                                     |     +--*  LCL_VAR   int    V02 loc0         u:4 $440
N008 (  1,  1) [000277] -----------                                     |     \--*  CNS_INT   int    1 $c1
N011 (  1,  1) [000278] -----------                                     \--*  CNS_INT   long   2 $242
Looking for array size assertions for: $300
ArrSize for lengthVN:300 = 0
[RangeCheck::GetRangeWorker] BB31 N001 (  1,  1) [000288] -----------                         *  LCL_VAR   int    V04 loc2         u:8 $441
{
----------------------------------------------------
N004 (  0,  0) [000598] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:8 $VN.Void
N003 (  0,  0) [000597] -----------                         \--*  PHI       int    $441
N001 (  0,  0) [000631] ----------- pred BB42                  +--*  PHI_ARG   int    V04 loc2         u:9
N002 (  0,  0) [000624] ----------- pred BB29                  \--*  PHI_ARG   int    V04 loc2         u:7 $440
----------------------------------------------------
   [RangeCheck::GetRangeWorker] BB30 N003 (  0,  0) [000597] -----------                         *  PHI       int    $441
N001 (  0,  0) [000631] ----------- pred BB42               +--*  PHI_ARG   int    V04 loc2         u:9
N002 (  0,  0) [000624] ----------- pred BB29               \--*  PHI_ARG   int    V04 loc2         u:7 $440
   {
      [RangeCheck::GetRangeWorker] BB30 N001 (  0,  0) [000631] -----------                         *  PHI_ARG   int    V04 loc2         u:9
      {
----------------------------------------------------
N004 (  3,  3) [000405] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:9 $VN.Void
N003 (  3,  3) [000406] -----------                         \--*  ADD       int    $366
N001 (  1,  1) [000407] -----------                            +--*  LCL_VAR   int    V04 loc2         u:8 (last use) $441
N002 (  1,  1) [000408] -----------                            \--*  CNS_INT   int    -1 $c2
----------------------------------------------------
         [RangeCheck::GetRangeWorker] BB42 N003 (  3,  3) [000406] -----------                         *  ADD       int    $366
N001 (  1,  1) [000407] -----------                         +--*  LCL_VAR   int    V04 loc2         u:8 (last use) $441
N002 (  1,  1) [000408] -----------                         \--*  CNS_INT   int    -1 $c2
         {
            [RangeCheck::GetRangeWorker] BB42 N001 (  1,  1) [000407] -----------                         *  LCL_VAR   int    V04 loc2         u:8 (last use) $441
            {
----------------------------------------------------
N004 (  0,  0) [000598] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:8 $VN.Void
N003 (  0,  0) [000597] -----------                         \--*  PHI       int    $441
N001 (  0,  0) [000631] ----------- pred BB42                  +--*  PHI_ARG   int    V04 loc2         u:9
N002 (  0,  0) [000624] ----------- pred BB29                  \--*  PHI_ARG   int    V04 loc2         u:7 $440
----------------------------------------------------
               [RangeCheck::GetRangeWorker] BB30 N003 (  0,  0) [000597] -----------                         *  PHI       int    $441
N001 (  0,  0) [000631] ----------- pred BB42               +--*  PHI_ARG   int    V04 loc2         u:9
N002 (  0,  0) [000624] ----------- pred BB29               \--*  PHI_ARG   int    V04 loc2         u:7 $440
               {
PhiArg [000631] is already being computed
Merging assertions from pred edges of BB30 for op [000631] $ffffffff
Merge assertions created by BB42 for BB30
#02 #29 #31 #33 #34 #40 #42
Merging ranges <Undef, Undef> <Dependent, Dependent>:<Dependent, Dependent>
                  [RangeCheck::GetRangeWorker] BB30 N002 (  0,  0) [000624] -----------                         *  PHI_ARG   int    V04 loc2         u:7 $440
                  {
----------------------------------------------------
N002 (  1,  3) [000279] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:7 $VN.Void
N001 (  1,  1) [000280] -----------                         \--*  LCL_VAR   int    V02 loc0         u:4 $440
----------------------------------------------------
                     [RangeCheck::GetRangeWorker] BB29 N001 (  1,  1) [000280] -----------                         *  LCL_VAR   int    V02 loc0         u:4 $440
                     {
----------------------------------------------------
N004 (  0,  0) [000596] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:4 $VN.Void
N003 (  0,  0) [000595] -----------                         \--*  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43                  +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0
----------------------------------------------------
                        [RangeCheck::GetRangeWorker] BB28 N003 (  0,  0) [000595] -----------                         *  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43               +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27               \--*  PHI_ARG   int    V02 loc0         u:1 $c0
                        {
                           [RangeCheck::GetRangeWorker] BB28 N001 (  0,  0) [000632] -----------                         *  PHI_ARG   int    V02 loc0         u:5
                           {
----------------------------------------------------
N004 (  3,  3) [000425] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:5 $VN.Void
N003 (  3,  3) [000426] -----------                         \--*  ADD       int    $347
N001 (  1,  1) [000427] -----------                            +--*  LCL_VAR   int    V02 loc0         u:4 (last use) $440
N002 (  1,  1) [000428] -----------                            \--*  CNS_INT   int    1 $c1
----------------------------------------------------
                              [RangeCheck::GetRangeWorker] BB43 N003 (  3,  3) [000426] -----------                         *  ADD       int    $347
N001 (  1,  1) [000427] -----------                         +--*  LCL_VAR   int    V02 loc0         u:4 (last use) $440
N002 (  1,  1) [000428] -----------                         \--*  CNS_INT   int    1 $c1
                              {
                                 [RangeCheck::GetRangeWorker] BB43 N001 (  1,  1) [000427] -----------                         *  LCL_VAR   int    V02 loc0         u:4 (last use) $440
                                 {
----------------------------------------------------
N004 (  0,  0) [000596] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:4 $VN.Void
N003 (  0,  0) [000595] -----------                         \--*  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43                  +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0
----------------------------------------------------
                                    [RangeCheck::GetRangeWorker] BB28 N003 (  0,  0) [000595] -----------                         *  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43               +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27               \--*  PHI_ARG   int    V02 loc0         u:1 $c0
                                    {
PhiArg [000632] is already being computed
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Merging ranges <Undef, Undef> <0, $300 + -1>:<0, $300 + -1>
                                       [RangeCheck::GetRangeWorker] BB28 N002 (  0,  0) [000623] -----------                         *  PHI_ARG   int    V02 loc0         u:1 $c0
                                       {
                                          Computed Range [000623] => <0, 0>
                                       }
Merging assertions from pred edges of BB28 for op [000623] $c0
Merging ranges <0, $300 + -1> <0, 0>:<0, Unknown>
                                       Computed Range [000595] => <0, Unknown>
                                    }
Merge assertions from BB43: #29 #31 for definition [000596]
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB43 for op [000427] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                    Computed Range [000427] => <0, $300 + -2>
                                 }
Merging assertions from pred edges of BB43 for op [000427] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                 [RangeCheck::GetRangeWorker] BB43 N002 (  1,  1) [000428] -----------                         *  CNS_INT   int    1 $c1
                                 {
                                    Computed Range [000428] => <1, 1>
                                 }
Merging assertions from pred edges of BB43 for op [000428] $c1
BinOp add ranges <0, $300 + -2> <1, 1> = <1, $300 + -1>
                                 Computed Range [000426] => <1, $300 + -1>
                              }
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
                              Computed Range [000632] => <1, $300 + -1>
                           }
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
Merging ranges <Undef, Undef> <1, $300 + -1>:<1, $300 + -1>
                           [RangeCheck::GetRangeWorker] BB28 N002 (  0,  0) [000623] -----------                         *  PHI_ARG   int    V02 loc0         u:1 $c0
                           {
                              Cached Range [000623] => <0, 0>
                           }
Merging assertions from pred edges of BB28 for op [000623] $c0
Merging ranges <1, $300 + -1> <0, 0>:<0, Unknown>
                           Computed Range [000595] => <0, Unknown>
                        }
Merge assertions from BB29: #29 for definition [000596]
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB29 for op [000280] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                        Computed Range [000280] => <0, $300 + -2>
                     }
Merge assertions from BB30: #29 #31 for definition [000279]
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB30 for op [000624] $440
Merge assertions created by BB29 for BB30
#29 #31
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                     Computed Range [000624] => <0, $300 + -2>
                  }
Merging assertions from pred edges of BB30 for op [000624] $440
Merge assertions created by BB29 for BB30
#29 #31
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Merging ranges <Dependent, Dependent> <0, $300 + -2>:<Dependent, Dependent>
                  Computed Range [000597] => <Dependent, Dependent>
               }
Merge assertions from BB42: #02 #29 #31 #33 #34 #40 for definition [000598]
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<0, Unknown>] into [<0, Dependent>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, Dependent>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
done merging
Merging assertions from pred edges of BB42 for op [000407] $441
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, Unknown>] into [<0, $300 + -1>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
               Computed Range [000407] => <0, $300 + -1>
            }
Merging assertions from pred edges of BB42 for op [000407] $441
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, Unknown>] into [<0, $300 + -1>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
            [RangeCheck::GetRangeWorker] BB42 N002 (  1,  1) [000408] -----------                         *  CNS_INT   int    -1 $c2
            {
               Computed Range [000408] => <-1, -1>
            }
Merging assertions from pred edges of BB42 for op [000408] $c2
BinOp add ranges <0, $300 + -1> <-1, -1> = <-1, $300 + -2>
            Computed Range [000406] => <-1, $300 + -2>
         }
Merge assertions from BB30: #29 #31 for definition [000405]
done merging
Merging assertions from pred edges of BB30 for op [000631] $ffffffff
Merge assertions created by BB42 for BB30
#02 #29 #31 #33 #34 #40 #42
         Computed Range [000631] => <-1, $300 + -2>
      }
Merging assertions from pred edges of BB30 for op [000631] $ffffffff
Merge assertions created by BB42 for BB30
#02 #29 #31 #33 #34 #40 #42
Merging ranges <Undef, Undef> <-1, $300 + -2>:<-1, $300 + -2>
      [RangeCheck::GetRangeWorker] BB30 N002 (  0,  0) [000624] -----------                         *  PHI_ARG   int    V04 loc2         u:7 $440
      {
         Cached Range [000624] => <0, $300 + -2>
      }
Merging assertions from pred edges of BB30 for op [000624] $440
Merge assertions created by BB29 for BB30
#29 #31
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Merging ranges <-1, $300 + -2> <0, $300 + -2>:<-1, $300 + -2>
      Computed Range [000597] => <-1, $300 + -2>
   }
Merge assertions from BB31: #29 #31 #33 for definition [000598]
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<-1, $300 + -2>] with assertedRange: [<0, Unknown>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB31 for op [000288] $441
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<0, Unknown>] into [<0, $300 + -2>]
   Computed Range [000288] => <0, $300 + -2>
}
Does overflow [000288]?
Merging assertions from pred edges of BB31 for op [000288] $441
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, Unknown>] into [<0, Unknown>]
Does overflow [000597]?
Does overflow [000631]?
Merging assertions from pred edges of BB30 for op [000631] $ffffffff
Merge assertions created by BB42 for BB30
#02 #29 #31 #33 #34 #40 #42
Does overflow [000406]?
Does overflow [000407]?
Merging assertions from pred edges of BB42 for op [000407] $441
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, Unknown>] into [<0, Unknown>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Does overflow [000597]?
Does overflow [000624]?
Merging assertions from pred edges of BB30 for op [000624] $440
Merge assertions created by BB29 for BB30
#29 #31
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000280]?
Merging assertions from pred edges of BB29 for op [000280] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000595]?
Does overflow [000632]?
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Does overflow [000426]?
Does overflow [000427]?
Merging assertions from pred edges of BB43 for op [000427] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000595]?
Does overflow [000623]?
[000623] does not overflow
[000595] does not overflow
[000427] does not overflow
Does overflow [000428]?
[000428] does not overflow
Checking bin op overflow ADD <0, $300 + -2> <1, 1>
[000426] does not overflow
[000632] does not overflow
[000595] does not overflow
[000280] does not overflow
[000624] does not overflow
[000597] does not overflow
[000407] does not overflow
Does overflow [000408]?
[000408] does not overflow
Checking bin op overflow ADD <0, $300 + -1> <-1, -1>
[000406] does not overflow
[000631] does not overflow
[000597] does not overflow
[000288] does not overflow
Range value <0, $300 + -2>
[RangeCheck::Widen] BB31, 
[000288]
<0, $300 + -2> BetweenBounds <0, [000289]>
$300 upper bound is:  {MemOpaque:NotInLoop}
Array size is: 0
[RangeCheck::OptimizeRangeCheck] Between bounds
Before optRemoveRangeCheck:
N011 ( 12, 15) [000286] ---XGO-----                         *  COMMA     int    <l:$350, c:$34f>
N003 (  6,  9) [000287] ---XGO-----                         +--*  BOUNDS_CHECK_Rng void   <l:$3d3, c:$3d2>
N001 (  1,  1) [000288] -----------                         |  +--*  LCL_VAR   int    V04 loc2         u:8 $441
N002 (  1,  1) [000289] -----------                         |  \--*  LCL_VAR   int    V16 tmp11        u:1 <l:$2c0, c:$300>
N010 (  6,  6) [000290] ---XGO-----                         \--*  IND       int    <l:$34e, c:$34d>
N009 (  4,  5) [000291] ----GO-N---                            \--*  ADD       byref  <l:$284, c:$285>
N004 (  1,  1) [000292] -----------                               +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N008 (  3,  4) [000293] -------N---                               \--*  LSH       long   $404
N006 (  2,  3) [000294] ---------U-                                  +--*  CAST      long <- uint $403
N005 (  1,  1) [000295] -----------                                  |  \--*  LCL_VAR   int    V04 loc2         u:8 $441
N007 (  1,  1) [000296] -----------                                  \--*  CNS_INT   long   2 $242
After optRemoveRangeCheck for [000286]:
N012 ( 12, 15) [000285] DA-XGO-----                         *  STORE_LCL_VAR int    V07 tmp2         d:3 <l:$3d9, c:$3d8>
N011 ( 12, 15) [000286] ---XGO-N---                         \--*  COMMA     int    <l:$350, c:$34f>
N003 (  6,  9) [000287] -----------                            +--*  NOP       void  
N010 (  6,  6) [000290] ---XGO-----                            \--*  IND       int    <l:$34e, c:$34d>
N009 (  4,  5) [000291] ----GO-N---                               \--*  ADD       byref  <l:$284, c:$285>
N004 (  1,  1) [000292] -----------                                  +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N008 (  3,  4) [000293] -------N---                                  \--*  LSH       long   $404
N006 (  2,  3) [000294] ---------U-                                     +--*  CAST      long <- uint $403
N005 (  1,  1) [000295] -----------                                     |  \--*  LCL_VAR   int    V04 loc2         u:8 $441
N007 (  1,  1) [000296] -----------                                     \--*  CNS_INT   long   2 $242
Looking for array size assertions for: $305
ArrSize for lengthVN:305 = 0
[RangeCheck::GetRangeWorker] BB33 N001 (  1,  1) [000320] -----------                         *  LCL_VAR   int    V03 loc1         u:2 <l:$2c1, c:$301>
{
----------------------------------------------------
N012 (  8,  8) [000263] DA-XGO-----                         *  STORE_LCL_VAR int    V03 loc1         d:2 <l:$3cd, c:$3cc>
N011 (  8,  8) [000264] ---XGO-N---                         \--*  COMMA     int    <l:$34b, c:$34a>
N001 (  0,  0) [000265] -----------                            +--*  NOP       void  
N010 (  8,  8) [000270] ---XGO-----                            \--*  IND       int    <l:$349, c:$348>
N009 (  6,  7) [000271] ----GO-N---                               \--*  ADD       byref  <l:$282, c:$283>
N002 (  1,  1) [000272] -----------                                  +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N008 (  5,  6) [000273] -------N---                                  \--*  LSH       long   $402
N006 (  4,  5) [000274] ---------U-                                     +--*  CAST      long <- uint $401
N005 (  3,  3) [000275] -----------                                     |  \--*  ADD       int    $347
N003 (  1,  1) [000276] -----------                                     |     +--*  LCL_VAR   int    V02 loc0         u:4 $440
N004 (  1,  1) [000277] -----------                                     |     \--*  CNS_INT   int    1 $c1
N007 (  1,  1) [000278] -----------                                     \--*  CNS_INT   long   2 $242
----------------------------------------------------
   [RangeCheck::GetRangeWorker] BB29 N011 (  8,  8) [000264] ---XGO-N---                         *  COMMA     int    <l:$34b, c:$34a>
N001 (  0,  0) [000265] -----------                         +--*  NOP       void  
N010 (  8,  8) [000270] ---XGO-----                         \--*  IND       int    <l:$349, c:$348>
N009 (  6,  7) [000271] ----GO-N---                            \--*  ADD       byref  <l:$282, c:$283>
N002 (  1,  1) [000272] -----------                               +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N008 (  5,  6) [000273] -------N---                               \--*  LSH       long   $402
N006 (  4,  5) [000274] ---------U-                                  +--*  CAST      long <- uint $401
N005 (  3,  3) [000275] -----------                                  |  \--*  ADD       int    $347
N003 (  1,  1) [000276] -----------                                  |     +--*  LCL_VAR   int    V02 loc0         u:4 $440
N004 (  1,  1) [000277] -----------                                  |     \--*  CNS_INT   int    1 $c1
N007 (  1,  1) [000278] -----------                                  \--*  CNS_INT   long   2 $242
   {
      [RangeCheck::GetRangeWorker] BB29 N010 (  8,  8) [000270] ---XGO-----                         *  IND       int    <l:$349, c:$348>
N009 (  6,  7) [000271] ----GO-N---                         \--*  ADD       byref  <l:$282, c:$283>
N002 (  1,  1) [000272] -----------                            +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N008 (  5,  6) [000273] -------N---                            \--*  LSH       long   $402
N006 (  4,  5) [000274] ---------U-                               +--*  CAST      long <- uint $401
N005 (  3,  3) [000275] -----------                               |  \--*  ADD       int    $347
N003 (  1,  1) [000276] -----------                               |     +--*  LCL_VAR   int    V02 loc0         u:4 $440
N004 (  1,  1) [000277] -----------                               |     \--*  CNS_INT   int    1 $c1
N007 (  1,  1) [000278] -----------                               \--*  CNS_INT   long   2 $242
      {
         Computed Range [000270] => <Unknown, Unknown>
      }
      Computed Range [000264] => <Unknown, Unknown>
   }
Merge assertions from BB33: #02 #29 #31 #33 #34 for definition [000263]
done merging
Merging assertions from pred edges of BB33 for op [000320] $301
   Computed Range [000320] => <Unknown, Unknown>
}
Range is completely unknown.
Failed to get range
Looking for array size assertions for: $305
ArrSize for lengthVN:305 = 0
[RangeCheck::GetRangeWorker] BB33 N001 (  1,  1) [000336] -----------                         *  LCL_VAR   int    V07 tmp2         u:3 <l:$2c2, c:$302>
{
----------------------------------------------------
N010 (  6,  6) [000285] DA-XGO-----                         *  STORE_LCL_VAR int    V07 tmp2         d:3 <l:$3d9, c:$3d8>
N009 (  6,  6) [000286] ---XGO-N---                         \--*  COMMA     int    <l:$350, c:$34f>
N001 (  0,  0) [000287] -----------                            +--*  NOP       void  
N008 (  6,  6) [000290] ---XGO-----                            \--*  IND       int    <l:$34e, c:$34d>
N007 (  4,  5) [000291] ----GO-N---                               \--*  ADD       byref  <l:$284, c:$285>
N002 (  1,  1) [000292] -----------                                  +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N006 (  3,  4) [000293] -------N---                                  \--*  LSH       long   $404
N004 (  2,  3) [000294] ---------U-                                     +--*  CAST      long <- uint $403
N003 (  1,  1) [000295] -----------                                     |  \--*  LCL_VAR   int    V04 loc2         u:8 $441
N005 (  1,  1) [000296] -----------                                     \--*  CNS_INT   long   2 $242
----------------------------------------------------
   [RangeCheck::GetRangeWorker] BB31 N009 (  6,  6) [000286] ---XGO-N---                         *  COMMA     int    <l:$350, c:$34f>
N001 (  0,  0) [000287] -----------                         +--*  NOP       void  
N008 (  6,  6) [000290] ---XGO-----                         \--*  IND       int    <l:$34e, c:$34d>
N007 (  4,  5) [000291] ----GO-N---                            \--*  ADD       byref  <l:$284, c:$285>
N002 (  1,  1) [000292] -----------                               +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N006 (  3,  4) [000293] -------N---                               \--*  LSH       long   $404
N004 (  2,  3) [000294] ---------U-                                  +--*  CAST      long <- uint $403
N003 (  1,  1) [000295] -----------                                  |  \--*  LCL_VAR   int    V04 loc2         u:8 $441
N005 (  1,  1) [000296] -----------                                  \--*  CNS_INT   long   2 $242
   {
      [RangeCheck::GetRangeWorker] BB31 N008 (  6,  6) [000290] ---XGO-----                         *  IND       int    <l:$34e, c:$34d>
N007 (  4,  5) [000291] ----GO-N---                         \--*  ADD       byref  <l:$284, c:$285>
N002 (  1,  1) [000292] -----------                            +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N006 (  3,  4) [000293] -------N---                            \--*  LSH       long   $404
N004 (  2,  3) [000294] ---------U-                               +--*  CAST      long <- uint $403
N003 (  1,  1) [000295] -----------                               |  \--*  LCL_VAR   int    V04 loc2         u:8 $441
N005 (  1,  1) [000296] -----------                               \--*  CNS_INT   long   2 $242
      {
         Computed Range [000290] => <Unknown, Unknown>
      }
      Computed Range [000286] => <Unknown, Unknown>
   }
Merge assertions from BB33: #02 #29 #31 #33 #34 for definition [000285]
done merging
Merging assertions from pred edges of BB33 for op [000336] $302
   Computed Range [000336] => <Unknown, Unknown>
}
Range is completely unknown.
Failed to get range
Looking for array size assertions for: $300
ArrSize for lengthVN:300 = 0
[RangeCheck::GetRangeWorker] BB42 N006 ( 10,  8) [000652] -A---------                         *  COMMA     int    $361
N004 (  7,  6) [000650] DA---------                         +--*  STORE_LCL_VAR int    V22 cse4         d:1 $VN.Void
N003 (  3,  3) [000382] -----------                         |  \--*  ADD       int    $361
N001 (  1,  1) [000383] -----------                         |     +--*  LCL_VAR   int    V04 loc2         u:8 $441
N002 (  1,  1) [000384] -----------                         |     \--*  CNS_INT   int    1 $c1
N005 (  3,  2) [000651] -----------                         \--*  LCL_VAR   int    V22 cse4         u:1 $361
{
   [RangeCheck::GetRangeWorker] BB42 N005 (  3,  2) [000651] -----------                         *  LCL_VAR   int    V22 cse4         u:1 $361
   {
----------------------------------------------------
N004 (  7,  6) [000650] DA---------                         *  STORE_LCL_VAR int    V22 cse4         d:1 $VN.Void
N003 (  3,  3) [000382] -----------                         \--*  ADD       int    $361
N001 (  1,  1) [000383] -----------                            +--*  LCL_VAR   int    V04 loc2         u:8 $441
N002 (  1,  1) [000384] -----------                            \--*  CNS_INT   int    1 $c1
----------------------------------------------------
      [RangeCheck::GetRangeWorker] BB42 N003 (  3,  3) [000382] -----------                         *  ADD       int    $361
N001 (  1,  1) [000383] -----------                         +--*  LCL_VAR   int    V04 loc2         u:8 $441
N002 (  1,  1) [000384] -----------                         \--*  CNS_INT   int    1 $c1
      {
         [RangeCheck::GetRangeWorker] BB42 N001 (  1,  1) [000383] -----------                         *  LCL_VAR   int    V04 loc2         u:8 $441
         {
----------------------------------------------------
N004 (  0,  0) [000598] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:8 $VN.Void
N003 (  0,  0) [000597] -----------                         \--*  PHI       int    $441
N001 (  0,  0) [000631] ----------- pred BB42                  +--*  PHI_ARG   int    V04 loc2         u:9
N002 (  0,  0) [000624] ----------- pred BB29                  \--*  PHI_ARG   int    V04 loc2         u:7 $440
----------------------------------------------------
            [RangeCheck::GetRangeWorker] BB30 N003 (  0,  0) [000597] -----------                         *  PHI       int    $441
N001 (  0,  0) [000631] ----------- pred BB42               +--*  PHI_ARG   int    V04 loc2         u:9
N002 (  0,  0) [000624] ----------- pred BB29               \--*  PHI_ARG   int    V04 loc2         u:7 $440
            {
               [RangeCheck::GetRangeWorker] BB30 N001 (  0,  0) [000631] -----------                         *  PHI_ARG   int    V04 loc2         u:9
               {
----------------------------------------------------
N004 (  3,  3) [000405] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:9 $VN.Void
N003 (  3,  3) [000406] -----------                         \--*  ADD       int    $366
N001 (  1,  1) [000407] -----------                            +--*  LCL_VAR   int    V04 loc2         u:8 (last use) $441
N002 (  1,  1) [000408] -----------                            \--*  CNS_INT   int    -1 $c2
----------------------------------------------------
                  [RangeCheck::GetRangeWorker] BB42 N003 (  3,  3) [000406] -----------                         *  ADD       int    $366
N001 (  1,  1) [000407] -----------                         +--*  LCL_VAR   int    V04 loc2         u:8 (last use) $441
N002 (  1,  1) [000408] -----------                         \--*  CNS_INT   int    -1 $c2
                  {
                     [RangeCheck::GetRangeWorker] BB42 N001 (  1,  1) [000407] -----------                         *  LCL_VAR   int    V04 loc2         u:8 (last use) $441
                     {
----------------------------------------------------
N004 (  0,  0) [000598] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:8 $VN.Void
N003 (  0,  0) [000597] -----------                         \--*  PHI       int    $441
N001 (  0,  0) [000631] ----------- pred BB42                  +--*  PHI_ARG   int    V04 loc2         u:9
N002 (  0,  0) [000624] ----------- pred BB29                  \--*  PHI_ARG   int    V04 loc2         u:7 $440
----------------------------------------------------
                        [RangeCheck::GetRangeWorker] BB30 N003 (  0,  0) [000597] -----------                         *  PHI       int    $441
N001 (  0,  0) [000631] ----------- pred BB42               +--*  PHI_ARG   int    V04 loc2         u:9
N002 (  0,  0) [000624] ----------- pred BB29               \--*  PHI_ARG   int    V04 loc2         u:7 $440
                        {
PhiArg [000631] is already being computed
Merging assertions from pred edges of BB30 for op [000631] $ffffffff
Merge assertions created by BB42 for BB30
#02 #29 #31 #33 #34 #40 #42
Merging ranges <Undef, Undef> <Dependent, Dependent>:<Dependent, Dependent>
                           [RangeCheck::GetRangeWorker] BB30 N002 (  0,  0) [000624] -----------                         *  PHI_ARG   int    V04 loc2         u:7 $440
                           {
----------------------------------------------------
N002 (  1,  3) [000279] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:7 $VN.Void
N001 (  1,  1) [000280] -----------                         \--*  LCL_VAR   int    V02 loc0         u:4 $440
----------------------------------------------------
                              [RangeCheck::GetRangeWorker] BB29 N001 (  1,  1) [000280] -----------                         *  LCL_VAR   int    V02 loc0         u:4 $440
                              {
----------------------------------------------------
N004 (  0,  0) [000596] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:4 $VN.Void
N003 (  0,  0) [000595] -----------                         \--*  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43                  +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0
----------------------------------------------------
                                 [RangeCheck::GetRangeWorker] BB28 N003 (  0,  0) [000595] -----------                         *  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43               +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27               \--*  PHI_ARG   int    V02 loc0         u:1 $c0
                                 {
                                    [RangeCheck::GetRangeWorker] BB28 N001 (  0,  0) [000632] -----------                         *  PHI_ARG   int    V02 loc0         u:5
                                    {
----------------------------------------------------
N004 (  3,  3) [000425] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:5 $VN.Void
N003 (  3,  3) [000426] -----------                         \--*  ADD       int    $347
N001 (  1,  1) [000427] -----------                            +--*  LCL_VAR   int    V02 loc0         u:4 (last use) $440
N002 (  1,  1) [000428] -----------                            \--*  CNS_INT   int    1 $c1
----------------------------------------------------
                                       [RangeCheck::GetRangeWorker] BB43 N003 (  3,  3) [000426] -----------                         *  ADD       int    $347
N001 (  1,  1) [000427] -----------                         +--*  LCL_VAR   int    V02 loc0         u:4 (last use) $440
N002 (  1,  1) [000428] -----------                         \--*  CNS_INT   int    1 $c1
                                       {
                                          [RangeCheck::GetRangeWorker] BB43 N001 (  1,  1) [000427] -----------                         *  LCL_VAR   int    V02 loc0         u:4 (last use) $440
                                          {
----------------------------------------------------
N004 (  0,  0) [000596] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:4 $VN.Void
N003 (  0,  0) [000595] -----------                         \--*  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43                  +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0
----------------------------------------------------
                                             [RangeCheck::GetRangeWorker] BB28 N003 (  0,  0) [000595] -----------                         *  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43               +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27               \--*  PHI_ARG   int    V02 loc0         u:1 $c0
                                             {
PhiArg [000632] is already being computed
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Merging ranges <Undef, Undef> <0, $300 + -1>:<0, $300 + -1>
                                                [RangeCheck::GetRangeWorker] BB28 N002 (  0,  0) [000623] -----------                         *  PHI_ARG   int    V02 loc0         u:1 $c0
                                                {
                                                   Computed Range [000623] => <0, 0>
                                                }
Merging assertions from pred edges of BB28 for op [000623] $c0
Merging ranges <0, $300 + -1> <0, 0>:<0, Unknown>
                                                Computed Range [000595] => <0, Unknown>
                                             }
Merge assertions from BB43: #29 #31 for definition [000596]
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB43 for op [000427] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                             Computed Range [000427] => <0, $300 + -2>
                                          }
Merging assertions from pred edges of BB43 for op [000427] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                          [RangeCheck::GetRangeWorker] BB43 N002 (  1,  1) [000428] -----------                         *  CNS_INT   int    1 $c1
                                          {
                                             Computed Range [000428] => <1, 1>
                                          }
Merging assertions from pred edges of BB43 for op [000428] $c1
BinOp add ranges <0, $300 + -2> <1, 1> = <1, $300 + -1>
                                          Computed Range [000426] => <1, $300 + -1>
                                       }
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
                                       Computed Range [000632] => <1, $300 + -1>
                                    }
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
Merging ranges <Undef, Undef> <1, $300 + -1>:<1, $300 + -1>
                                    [RangeCheck::GetRangeWorker] BB28 N002 (  0,  0) [000623] -----------                         *  PHI_ARG   int    V02 loc0         u:1 $c0
                                    {
                                       Cached Range [000623] => <0, 0>
                                    }
Merging assertions from pred edges of BB28 for op [000623] $c0
Merging ranges <1, $300 + -1> <0, 0>:<0, Unknown>
                                    Computed Range [000595] => <0, Unknown>
                                 }
Merge assertions from BB29: #29 for definition [000596]
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB29 for op [000280] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                 Computed Range [000280] => <0, $300 + -2>
                              }
Merge assertions from BB30: #29 #31 for definition [000279]
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB30 for op [000624] $440
Merge assertions created by BB29 for BB30
#29 #31
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                              Computed Range [000624] => <0, $300 + -2>
                           }
Merging assertions from pred edges of BB30 for op [000624] $440
Merge assertions created by BB29 for BB30
#29 #31
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Merging ranges <Dependent, Dependent> <0, $300 + -2>:<Dependent, Dependent>
                           Computed Range [000597] => <Dependent, Dependent>
                        }
Merge assertions from BB42: #02 #29 #31 #33 #34 #40 for definition [000598]
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<0, Unknown>] into [<0, Dependent>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, Dependent>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
done merging
Merging assertions from pred edges of BB42 for op [000407] $441
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, Unknown>] into [<0, $300 + -1>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
                        Computed Range [000407] => <0, $300 + -1>
                     }
Merging assertions from pred edges of BB42 for op [000407] $441
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, Unknown>] into [<0, $300 + -1>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
                     [RangeCheck::GetRangeWorker] BB42 N002 (  1,  1) [000408] -----------                         *  CNS_INT   int    -1 $c2
                     {
                        Computed Range [000408] => <-1, -1>
                     }
Merging assertions from pred edges of BB42 for op [000408] $c2
BinOp add ranges <0, $300 + -1> <-1, -1> = <-1, $300 + -2>
                     Computed Range [000406] => <-1, $300 + -2>
                  }
Merge assertions from BB30: #29 #31 for definition [000405]
done merging
Merging assertions from pred edges of BB30 for op [000631] $ffffffff
Merge assertions created by BB42 for BB30
#02 #29 #31 #33 #34 #40 #42
                  Computed Range [000631] => <-1, $300 + -2>
               }
Merging assertions from pred edges of BB30 for op [000631] $ffffffff
Merge assertions created by BB42 for BB30
#02 #29 #31 #33 #34 #40 #42
Merging ranges <Undef, Undef> <-1, $300 + -2>:<-1, $300 + -2>
               [RangeCheck::GetRangeWorker] BB30 N002 (  0,  0) [000624] -----------                         *  PHI_ARG   int    V04 loc2         u:7 $440
               {
                  Cached Range [000624] => <0, $300 + -2>
               }
Merging assertions from pred edges of BB30 for op [000624] $440
Merge assertions created by BB29 for BB30
#29 #31
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Merging ranges <-1, $300 + -2> <0, $300 + -2>:<-1, $300 + -2>
               Computed Range [000597] => <-1, $300 + -2>
            }
Merge assertions from BB42: #02 #29 #31 #33 #34 #40 for definition [000598]
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<-1, $300 + -2>] with assertedRange: [<0, Unknown>] into [<0, $300 + -2>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB42 for op [000383] $441
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<0, Unknown>] into [<0, $300 + -2>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -2>]
            Computed Range [000383] => <0, $300 + -2>
         }
Merging assertions from pred edges of BB42 for op [000383] $441
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<0, Unknown>] into [<0, $300 + -2>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -2>]
         [RangeCheck::GetRangeWorker] BB42 N002 (  1,  1) [000384] -----------                         *  CNS_INT   int    1 $c1
         {
            Computed Range [000384] => <1, 1>
         }
Merging assertions from pred edges of BB42 for op [000384] $c1
BinOp add ranges <0, $300 + -2> <1, 1> = <1, $300 + -1>
         Computed Range [000382] => <1, $300 + -1>
      }
Merge assertions from BB42: #02 #29 #31 #33 #34 #40 for definition [000650]
done merging
Merging assertions from pred edges of BB42 for op [000651] $361
      Computed Range [000651] => <1, $300 + -1>
   }
   Computed Range [000652] => <1, $300 + -1>
}
Does overflow [000652]?
Does overflow [000651]?
Merging assertions from pred edges of BB42 for op [000651] $361
Does overflow [000382]?
Does overflow [000383]?
Merging assertions from pred edges of BB42 for op [000383] $441
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, Unknown>] into [<0, Unknown>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Does overflow [000597]?
Does overflow [000631]?
Merging assertions from pred edges of BB30 for op [000631] $ffffffff
Merge assertions created by BB42 for BB30
#02 #29 #31 #33 #34 #40 #42
Does overflow [000406]?
Does overflow [000407]?
Merging assertions from pred edges of BB42 for op [000407] $441
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, Unknown>] into [<0, Unknown>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Does overflow [000597]?
Does overflow [000624]?
Merging assertions from pred edges of BB30 for op [000624] $440
Merge assertions created by BB29 for BB30
#29 #31
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000280]?
Merging assertions from pred edges of BB29 for op [000280] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000595]?
Does overflow [000632]?
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Does overflow [000426]?
Does overflow [000427]?
Merging assertions from pred edges of BB43 for op [000427] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000595]?
Does overflow [000623]?
[000623] does not overflow
[000595] does not overflow
[000427] does not overflow
Does overflow [000428]?
[000428] does not overflow
Checking bin op overflow ADD <0, $300 + -2> <1, 1>
[000426] does not overflow
[000632] does not overflow
[000595] does not overflow
[000280] does not overflow
[000624] does not overflow
[000597] does not overflow
[000407] does not overflow
Does overflow [000408]?
[000408] does not overflow
Checking bin op overflow ADD <0, $300 + -1> <-1, -1>
[000406] does not overflow
[000631] does not overflow
[000597] does not overflow
[000383] does not overflow
Does overflow [000384]?
[000384] does not overflow
Checking bin op overflow ADD <0, $300 + -2> <1, 1>
[000382] does not overflow
[000651] does not overflow
[000652] does not overflow
Range value <1, $300 + -1>
[RangeCheck::Widen] BB42, 
[000652]
<1, $300 + -1> BetweenBounds <0, [000385]>
$300 upper bound is:  {MemOpaque:NotInLoop}
Array size is: 0
[RangeCheck::OptimizeRangeCheck] Between bounds
Before optRemoveRangeCheck:
N015 ( 20, 21) [000380] -A-XGO-----                         *  COMMA     byref  <l:$290, c:$28f>
N008 ( 15, 16) [000381] -A-XGO-----                         +--*  BOUNDS_CHECK_Rng void   <l:$3fa, c:$3f9>
N006 ( 10,  8) [000652] -A---------                         |  +--*  COMMA     int    $361
N004 (  7,  6) [000650] DA---------                         |  |  +--*  STORE_LCL_VAR int    V22 cse4         d:1 $VN.Void
N003 (  3,  3) [000382] -----------                         |  |  |  \--*  ADD       int    $361
N001 (  1,  1) [000383] -----------                         |  |  |     +--*  LCL_VAR   int    V04 loc2         u:8 $441
N002 (  1,  1) [000384] -----------                         |  |  |     \--*  CNS_INT   int    1 $c1
N005 (  3,  2) [000651] -----------                         |  |  \--*  LCL_VAR   int    V22 cse4         u:1 $361
N007 (  1,  1) [000385] -----------                         |  \--*  LCL_VAR   int    V16 tmp11        u:1 <l:$2c0, c:$300>
N014 (  6,  6) [000386] ----GO-N---                         \--*  ADD       byref  <l:$28d, c:$28e>
N009 (  1,  1) [000387] -----------                            +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N013 (  5,  5) [000388] -------N---                            \--*  LSH       long   $414
N011 (  4,  4) [000389] ---------U-                               +--*  CAST      long <- uint $413
N010 (  3,  2) [000656] -----------                               |  \--*  LCL_VAR   int    V22 cse4         u:1 $361
N012 (  1,  1) [000393] -----------                               \--*  CNS_INT   long   2 $242
After optRemoveRangeCheck for [000380]:
N023 ( 30, 30) [000379] -A-XGO-----                         *  STOREIND  int    <l:$548, c:$545>
N015 ( 20, 21) [000380] -A--GO-N---                         +--*  COMMA     byref  <l:$290, c:$28f>
N004 (  7,  6) [000650] DA---------                         |  +--*  STORE_LCL_VAR int    V22 cse4         d:1 $VN.Void
N003 (  3,  3) [000382] -----------                         |  |  \--*  ADD       int    $361
N001 (  1,  1) [000383] -----------                         |  |     +--*  LCL_VAR   int    V04 loc2         u:8 $441
N002 (  1,  1) [000384] -----------                         |  |     \--*  CNS_INT   int    1 $c1
N014 (  6,  6) [000386] ----GO-N---                         |  \--*  ADD       byref  <l:$28d, c:$28e>
N009 (  1,  1) [000387] -----------                         |     +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N013 (  5,  5) [000388] -------N---                         |     \--*  LSH       long   $414
N011 (  4,  4) [000389] ---------U-                         |        +--*  CAST      long <- uint $413
N010 (  3,  2) [000656] -----------                         |        |  \--*  LCL_VAR   int    V22 cse4         u:1 $361
N012 (  1,  1) [000393] -----------                         |        \--*  CNS_INT   long   2 $242
N022 (  6,  6) [000398] ---XGO-N---                         \--*  IND       int    <l:$363, c:$362>
N021 (  4,  5) [000399] ----GO-N---                            \--*  ADD       byref  <l:$284, c:$285>
N016 (  1,  1) [000400] -----------                               +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N020 (  3,  4) [000401] -------N---                               \--*  LSH       long   $404
N018 (  2,  3) [000402] ---------U-                                  +--*  CAST      long <- uint $403
N017 (  1,  1) [000403] -----------                                  |  \--*  LCL_VAR   int    V04 loc2         u:8 $441
N019 (  1,  1) [000404] -----------                                  \--*  CNS_INT   long   2 $242
Looking for array size assertions for: $300
ArrSize for lengthVN:300 = 0
[RangeCheck::GetRangeWorker] BB43 N006 ( 10,  8) [000655] -A---------                         *  COMMA     int    $361
N004 (  7,  6) [000653] DA---------                         +--*  STORE_LCL_VAR int    V22 cse4         d:2 $VN.Void
N003 (  3,  3) [000412] -----------                         |  \--*  ADD       int    $361
N001 (  1,  1) [000413] -----------                         |     +--*  LCL_VAR   int    V04 loc2         u:8 $441
N002 (  1,  1) [000414] -----------                         |     \--*  CNS_INT   int    1 $c1
N005 (  3,  2) [000654] -----------                         \--*  LCL_VAR   int    V22 cse4         u:2 $361
{
   [RangeCheck::GetRangeWorker] BB43 N005 (  3,  2) [000654] -----------                         *  LCL_VAR   int    V22 cse4         u:2 $361
   {
----------------------------------------------------
N004 (  7,  6) [000653] DA---------                         *  STORE_LCL_VAR int    V22 cse4         d:2 $VN.Void
N003 (  3,  3) [000412] -----------                         \--*  ADD       int    $361
N001 (  1,  1) [000413] -----------                            +--*  LCL_VAR   int    V04 loc2         u:8 $441
N002 (  1,  1) [000414] -----------                            \--*  CNS_INT   int    1 $c1
----------------------------------------------------
      [RangeCheck::GetRangeWorker] BB43 N003 (  3,  3) [000412] -----------                         *  ADD       int    $361
N001 (  1,  1) [000413] -----------                         +--*  LCL_VAR   int    V04 loc2         u:8 $441
N002 (  1,  1) [000414] -----------                         \--*  CNS_INT   int    1 $c1
      {
         [RangeCheck::GetRangeWorker] BB43 N001 (  1,  1) [000413] -----------                         *  LCL_VAR   int    V04 loc2         u:8 $441
         {
----------------------------------------------------
N004 (  0,  0) [000598] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:8 $VN.Void
N003 (  0,  0) [000597] -----------                         \--*  PHI       int    $441
N001 (  0,  0) [000631] ----------- pred BB42                  +--*  PHI_ARG   int    V04 loc2         u:9
N002 (  0,  0) [000624] ----------- pred BB29                  \--*  PHI_ARG   int    V04 loc2         u:7 $440
----------------------------------------------------
            [RangeCheck::GetRangeWorker] BB30 N003 (  0,  0) [000597] -----------                         *  PHI       int    $441
N001 (  0,  0) [000631] ----------- pred BB42               +--*  PHI_ARG   int    V04 loc2         u:9
N002 (  0,  0) [000624] ----------- pred BB29               \--*  PHI_ARG   int    V04 loc2         u:7 $440
            {
               [RangeCheck::GetRangeWorker] BB30 N001 (  0,  0) [000631] -----------                         *  PHI_ARG   int    V04 loc2         u:9
               {
----------------------------------------------------
N004 (  3,  3) [000405] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:9 $VN.Void
N003 (  3,  3) [000406] -----------                         \--*  ADD       int    $366
N001 (  1,  1) [000407] -----------                            +--*  LCL_VAR   int    V04 loc2         u:8 (last use) $441
N002 (  1,  1) [000408] -----------                            \--*  CNS_INT   int    -1 $c2
----------------------------------------------------
                  [RangeCheck::GetRangeWorker] BB42 N003 (  3,  3) [000406] -----------                         *  ADD       int    $366
N001 (  1,  1) [000407] -----------                         +--*  LCL_VAR   int    V04 loc2         u:8 (last use) $441
N002 (  1,  1) [000408] -----------                         \--*  CNS_INT   int    -1 $c2
                  {
                     [RangeCheck::GetRangeWorker] BB42 N001 (  1,  1) [000407] -----------                         *  LCL_VAR   int    V04 loc2         u:8 (last use) $441
                     {
----------------------------------------------------
N004 (  0,  0) [000598] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:8 $VN.Void
N003 (  0,  0) [000597] -----------                         \--*  PHI       int    $441
N001 (  0,  0) [000631] ----------- pred BB42                  +--*  PHI_ARG   int    V04 loc2         u:9
N002 (  0,  0) [000624] ----------- pred BB29                  \--*  PHI_ARG   int    V04 loc2         u:7 $440
----------------------------------------------------
                        [RangeCheck::GetRangeWorker] BB30 N003 (  0,  0) [000597] -----------                         *  PHI       int    $441
N001 (  0,  0) [000631] ----------- pred BB42               +--*  PHI_ARG   int    V04 loc2         u:9
N002 (  0,  0) [000624] ----------- pred BB29               \--*  PHI_ARG   int    V04 loc2         u:7 $440
                        {
PhiArg [000631] is already being computed
Merging assertions from pred edges of BB30 for op [000631] $ffffffff
Merge assertions created by BB42 for BB30
#02 #29 #31 #33 #34 #40 #42
Merging ranges <Undef, Undef> <Dependent, Dependent>:<Dependent, Dependent>
                           [RangeCheck::GetRangeWorker] BB30 N002 (  0,  0) [000624] -----------                         *  PHI_ARG   int    V04 loc2         u:7 $440
                           {
----------------------------------------------------
N002 (  1,  3) [000279] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:7 $VN.Void
N001 (  1,  1) [000280] -----------                         \--*  LCL_VAR   int    V02 loc0         u:4 $440
----------------------------------------------------
                              [RangeCheck::GetRangeWorker] BB29 N001 (  1,  1) [000280] -----------                         *  LCL_VAR   int    V02 loc0         u:4 $440
                              {
----------------------------------------------------
N004 (  0,  0) [000596] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:4 $VN.Void
N003 (  0,  0) [000595] -----------                         \--*  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43                  +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0
----------------------------------------------------
                                 [RangeCheck::GetRangeWorker] BB28 N003 (  0,  0) [000595] -----------                         *  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43               +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27               \--*  PHI_ARG   int    V02 loc0         u:1 $c0
                                 {
                                    [RangeCheck::GetRangeWorker] BB28 N001 (  0,  0) [000632] -----------                         *  PHI_ARG   int    V02 loc0         u:5
                                    {
----------------------------------------------------
N004 (  3,  3) [000425] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:5 $VN.Void
N003 (  3,  3) [000426] -----------                         \--*  ADD       int    $347
N001 (  1,  1) [000427] -----------                            +--*  LCL_VAR   int    V02 loc0         u:4 (last use) $440
N002 (  1,  1) [000428] -----------                            \--*  CNS_INT   int    1 $c1
----------------------------------------------------
                                       [RangeCheck::GetRangeWorker] BB43 N003 (  3,  3) [000426] -----------                         *  ADD       int    $347
N001 (  1,  1) [000427] -----------                         +--*  LCL_VAR   int    V02 loc0         u:4 (last use) $440
N002 (  1,  1) [000428] -----------                         \--*  CNS_INT   int    1 $c1
                                       {
                                          [RangeCheck::GetRangeWorker] BB43 N001 (  1,  1) [000427] -----------                         *  LCL_VAR   int    V02 loc0         u:4 (last use) $440
                                          {
----------------------------------------------------
N004 (  0,  0) [000596] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:4 $VN.Void
N003 (  0,  0) [000595] -----------                         \--*  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43                  +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0
----------------------------------------------------
                                             [RangeCheck::GetRangeWorker] BB28 N003 (  0,  0) [000595] -----------                         *  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43               +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27               \--*  PHI_ARG   int    V02 loc0         u:1 $c0
                                             {
PhiArg [000632] is already being computed
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Merging ranges <Undef, Undef> <0, $300 + -1>:<0, $300 + -1>
                                                [RangeCheck::GetRangeWorker] BB28 N002 (  0,  0) [000623] -----------                         *  PHI_ARG   int    V02 loc0         u:1 $c0
                                                {
                                                   Computed Range [000623] => <0, 0>
                                                }
Merging assertions from pred edges of BB28 for op [000623] $c0
Merging ranges <0, $300 + -1> <0, 0>:<0, Unknown>
                                                Computed Range [000595] => <0, Unknown>
                                             }
Merge assertions from BB43: #29 #31 for definition [000596]
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB43 for op [000427] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                             Computed Range [000427] => <0, $300 + -2>
                                          }
Merging assertions from pred edges of BB43 for op [000427] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                          [RangeCheck::GetRangeWorker] BB43 N002 (  1,  1) [000428] -----------                         *  CNS_INT   int    1 $c1
                                          {
                                             Computed Range [000428] => <1, 1>
                                          }
Merging assertions from pred edges of BB43 for op [000428] $c1
BinOp add ranges <0, $300 + -2> <1, 1> = <1, $300 + -1>
                                          Computed Range [000426] => <1, $300 + -1>
                                       }
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
                                       Computed Range [000632] => <1, $300 + -1>
                                    }
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
Merging ranges <Undef, Undef> <1, $300 + -1>:<1, $300 + -1>
                                    [RangeCheck::GetRangeWorker] BB28 N002 (  0,  0) [000623] -----------                         *  PHI_ARG   int    V02 loc0         u:1 $c0
                                    {
                                       Cached Range [000623] => <0, 0>
                                    }
Merging assertions from pred edges of BB28 for op [000623] $c0
Merging ranges <1, $300 + -1> <0, 0>:<0, Unknown>
                                    Computed Range [000595] => <0, Unknown>
                                 }
Merge assertions from BB29: #29 for definition [000596]
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB29 for op [000280] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                 Computed Range [000280] => <0, $300 + -2>
                              }
Merge assertions from BB30: #29 #31 for definition [000279]
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB30 for op [000624] $440
Merge assertions created by BB29 for BB30
#29 #31
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                              Computed Range [000624] => <0, $300 + -2>
                           }
Merging assertions from pred edges of BB30 for op [000624] $440
Merge assertions created by BB29 for BB30
#29 #31
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Merging ranges <Dependent, Dependent> <0, $300 + -2>:<Dependent, Dependent>
                           Computed Range [000597] => <Dependent, Dependent>
                        }
Merge assertions from BB42: #02 #29 #31 #33 #34 #40 for definition [000598]
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<0, Unknown>] into [<0, Dependent>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, Dependent>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
done merging
Merging assertions from pred edges of BB42 for op [000407] $441
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, Unknown>] into [<0, $300 + -1>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
                        Computed Range [000407] => <0, $300 + -1>
                     }
Merging assertions from pred edges of BB42 for op [000407] $441
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, Unknown>] into [<0, $300 + -1>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
                     [RangeCheck::GetRangeWorker] BB42 N002 (  1,  1) [000408] -----------                         *  CNS_INT   int    -1 $c2
                     {
                        Computed Range [000408] => <-1, -1>
                     }
Merging assertions from pred edges of BB42 for op [000408] $c2
BinOp add ranges <0, $300 + -1> <-1, -1> = <-1, $300 + -2>
                     Computed Range [000406] => <-1, $300 + -2>
                  }
Merge assertions from BB30: #29 #31 for definition [000405]
done merging
Merging assertions from pred edges of BB30 for op [000631] $ffffffff
Merge assertions created by BB42 for BB30
#02 #29 #31 #33 #34 #40 #42
                  Computed Range [000631] => <-1, $300 + -2>
               }
Merging assertions from pred edges of BB30 for op [000631] $ffffffff
Merge assertions created by BB42 for BB30
#02 #29 #31 #33 #34 #40 #42
Merging ranges <Undef, Undef> <-1, $300 + -2>:<-1, $300 + -2>
               [RangeCheck::GetRangeWorker] BB30 N002 (  0,  0) [000624] -----------                         *  PHI_ARG   int    V04 loc2         u:7 $440
               {
                  Cached Range [000624] => <0, $300 + -2>
               }
Merging assertions from pred edges of BB30 for op [000624] $440
Merge assertions created by BB29 for BB30
#29 #31
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Merging ranges <-1, $300 + -2> <0, $300 + -2>:<-1, $300 + -2>
               Computed Range [000597] => <-1, $300 + -2>
            }
Merge assertions from BB43: #29 #31 for definition [000598]
done merging
Merging assertions from pred edges of BB43 for op [000413] $441
            Computed Range [000413] => <-1, $300 + -2>
         }
Merging assertions from pred edges of BB43 for op [000413] $441
         [RangeCheck::GetRangeWorker] BB43 N002 (  1,  1) [000414] -----------                         *  CNS_INT   int    1 $c1
         {
            Computed Range [000414] => <1, 1>
         }
Merging assertions from pred edges of BB43 for op [000414] $c1
BinOp add ranges <-1, $300 + -2> <1, 1> = <0, $300 + -1>
         Computed Range [000412] => <0, $300 + -1>
      }
Merge assertions from BB43: #29 #31 for definition [000653]
done merging
Merging assertions from pred edges of BB43 for op [000654] $361
      Computed Range [000654] => <0, $300 + -1>
   }
   Computed Range [000655] => <0, $300 + -1>
}
Does overflow [000655]?
Does overflow [000654]?
Merging assertions from pred edges of BB43 for op [000654] $361
Does overflow [000412]?
Does overflow [000413]?
Merging assertions from pred edges of BB43 for op [000413] $441
Does overflow [000597]?
Does overflow [000631]?
Merging assertions from pred edges of BB30 for op [000631] $ffffffff
Merge assertions created by BB42 for BB30
#02 #29 #31 #33 #34 #40 #42
Does overflow [000406]?
Does overflow [000407]?
Merging assertions from pred edges of BB42 for op [000407] $441
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, Unknown>] into [<0, Unknown>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
[000407] does not overflow
Does overflow [000408]?
[000408] does not overflow
Checking bin op overflow ADD <0, $300 + -1> <-1, -1>
[000406] does not overflow
[000631] does not overflow
Does overflow [000624]?
Merging assertions from pred edges of BB30 for op [000624] $440
Merge assertions created by BB29 for BB30
#29 #31
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000280]?
Merging assertions from pred edges of BB29 for op [000280] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000595]?
Does overflow [000632]?
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
[000632] does not overflow
Does overflow [000623]?
[000623] does not overflow
[000595] does not overflow
[000280] does not overflow
[000624] does not overflow
[000597] does not overflow
[000413] does not overflow
Does overflow [000414]?
[000414] does not overflow
Checking bin op overflow ADD <-1, $300 + -2> <1, 1>
[000412] does not overflow
[000654] does not overflow
[000655] does not overflow
Range value <0, $300 + -1>
[RangeCheck::Widen] BB43, 
[000655]
<0, $300 + -1> BetweenBounds <0, [000415]>
$300 upper bound is:  {MemOpaque:NotInLoop}
Array size is: 0
[RangeCheck::OptimizeRangeCheck] Between bounds
Before optRemoveRangeCheck:
N015 ( 20, 21) [000410] -A-XGO-----                         *  COMMA     byref  <l:$290, c:$28f>
N008 ( 15, 16) [000411] -A-XGO-----                         +--*  BOUNDS_CHECK_Rng void   <l:$3fa, c:$3f9>
N006 ( 10,  8) [000655] -A---------                         |  +--*  COMMA     int    $361
N004 (  7,  6) [000653] DA---------                         |  |  +--*  STORE_LCL_VAR int    V22 cse4         d:2 $VN.Void
N003 (  3,  3) [000412] -----------                         |  |  |  \--*  ADD       int    $361
N001 (  1,  1) [000413] -----------                         |  |  |     +--*  LCL_VAR   int    V04 loc2         u:8 $441
N002 (  1,  1) [000414] -----------                         |  |  |     \--*  CNS_INT   int    1 $c1
N005 (  3,  2) [000654] -----------                         |  |  \--*  LCL_VAR   int    V22 cse4         u:2 $361
N007 (  1,  1) [000415] -----------                         |  \--*  LCL_VAR   int    V16 tmp11        u:1 <l:$2c0, c:$300>
N014 (  6,  6) [000416] ----GO-N---                         \--*  ADD       byref  <l:$28d, c:$28e>
N009 (  1,  1) [000417] -----------                            +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N013 (  5,  5) [000418] -------N---                            \--*  LSH       long   $414
N011 (  4,  4) [000419] ---------U-                               +--*  CAST      long <- uint $413
N010 (  3,  2) [000657] -----------                               |  \--*  LCL_VAR   int    V22 cse4         u:2 $361
N012 (  1,  1) [000423] -----------                               \--*  CNS_INT   long   2 $242
After optRemoveRangeCheck for [000410]:
N017 ( 25, 25) [000409] -A-XGO-----                         *  STOREIND  int    <l:$54c, c:$54a>
N015 ( 20, 21) [000410] -A--GO-N---                         +--*  COMMA     byref  <l:$290, c:$28f>
N004 (  7,  6) [000653] DA---------                         |  +--*  STORE_LCL_VAR int    V22 cse4         d:2 $VN.Void
N003 (  3,  3) [000412] -----------                         |  |  \--*  ADD       int    $361
N001 (  1,  1) [000413] -----------                         |  |     +--*  LCL_VAR   int    V04 loc2         u:8 $441
N002 (  1,  1) [000414] -----------                         |  |     \--*  CNS_INT   int    1 $c1
N014 (  6,  6) [000416] ----GO-N---                         |  \--*  ADD       byref  <l:$28d, c:$28e>
N009 (  1,  1) [000417] -----------                         |     +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N013 (  5,  5) [000418] -------N---                         |     \--*  LSH       long   $414
N011 (  4,  4) [000419] ---------U-                         |        +--*  CAST      long <- uint $413
N010 (  3,  2) [000657] -----------                         |        |  \--*  LCL_VAR   int    V22 cse4         u:2 $361
N012 (  1,  1) [000423] -----------                         |        \--*  CNS_INT   long   2 $242
N016 (  1,  1) [000424] -----------                         \--*  LCL_VAR   int    V03 loc1         u:2 (last use) <l:$2c1, c:$301>

*************** Finishing PHASE Optimize index checks
Trees after Optimize index checks

---------------------------------------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight      IBC [IL range]   [jump]                            [EH region]        [flags]
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1      9960 [000..004)-> BB44(1)                 (always)                   i IBC
BB44 [0048]  1       BB01                  1      9960 [???..???)-> BB27(0.01),BB45(0.99)   ( cond )                   IBC internal
BB45 [0049]  1       BB44                  1      9960 [???..???)-> BB27(0.01),BB26(0.99)   ( cond )                   IBC internal
BB26 [0030]  1       BB45                  1      9960 [???..???)-> BB07(1)                 (always)                   IBC internal
BB02 [0001]  1       BB07                 10.37 103308 [004..018)-> BB61(1)                 (always)                   i IBC bwd bwd-target
BB61 [0065]  1       BB02                 10.37 103308 [???..???)-> BB62(1)                 (always)                   IBC internal
BB62 [0066]  1       BB61                 10.48 104342 [???..???)-> BB46(1)                 (always)                   IBC internal
BB46 [0050]  1       BB62                 10.48 104342 [???..???)-> BB04(1)                 (always)                   IBC internal
BB03 [0002]  1       BB09                 28.59 284778 [018..038)-> BB04(1)                 (always)                   i IBC bwd bwd-target
BB04 [0003]  2       BB03,BB46            38.86 387053 [038..03C)-> BB63(0.0583),BB05(0.942)  ( cond )                   i IBC bwd
BB05 [0004]  1       BB04                 36.60 364503 [03C..03C)-> BB10(1)                 (always)                   i IBC bwd bwd-src
BB10 [0009]  1       BB05                 36.60 364503 [03C..03D)-> BB23(0.361),BB22(0.639) ( cond )                   i IBC idxlen bwd
BB22 [0025]  1       BB10                 23.40 233073 [03C..03D)-> BB20(1)                 (always)                   i IBC bwd
BB23 [0026]  1       BB10                 13.20 131430 [03C..03D)-> BB25(0.000574),BB24(0.999)    ( cond )                   i IBC bwd
BB24 [0027]  1       BB23                 13.19 131355 [03C..03D)-> BB20(1)                 (always)                   i IBC bwd
BB25 [0028]  1       BB23                  0.01     75 [03C..03D)-> BB20(1)                 (always)                   i IBC bwd
BB20 [0029]  3       BB22,BB24,BB25       36.60 364503 [03C..03D)-> BB15(0.000209),BB14(1)  ( cond )                   i IBC idxlen bwd
BB14 [0012]  1       BB20                 36.59 364427 [03C..03D)-> BB09(1)                 (always)                   i IBC bwd
BB15 [0013]  1       BB20                  0.01     76 [03C..03D)-> BB09(1)                 (always)                   i IBC bwd
BB11 [0010]  0                             0         0 [???..???)-> BB09(1)                 (always)                   i IBC rare internal hascall gcsafe bwd
BB09 [0008]  3       BB11,BB14,BB15       36.60 364503 [03C..053)-> BB03(0.781),BB63(0.219) ( cond )                   i IBC internal bwd bwd-src
BB47 [0051]  0                             0         0 [???..???)-> BB48(1)                 (always)                   IBC rare internal
BB48 [0052]  2       BB47,BB60             0.39   3910 [038..03C)-> BB49(1)                 (always)                   i IBC bwd
BB49 [0053]  1       BB48                  0.39   3910 [03C..03C)-> BB51(1)                 (always)                   i IBC bwd bwd-src
BB50 [0054]  0                             0         0 [???..???)-> BB59(1)                 (always)                   i IBC rare internal hascall gcsafe bwd
BB51 [0055]  1       BB49                  0.37   3682 [03C..03D)-> BB52(0.361),BB55(0.639) ( cond )                   i IBC idxlen bwd
BB52 [0056]  1       BB51                  0.13   1328 [03C..03D)-> BB53(0.000574),BB54(0.999)    ( cond )                   i IBC bwd
BB53 [0057]  1       BB52                  0.00      1 [03C..03D)-> BB56(1)                 (always)                   i IBC bwd
BB54 [0058]  1       BB52                  0.13   1327 [03C..03D)-> BB56(1)                 (always)                   i IBC bwd
BB55 [0059]  1       BB51                  0.24   2354 [03C..03D)-> BB56(1)                 (always)                   i IBC bwd
BB56 [0060]  3       BB53,BB54,BB55        0.37   3682 [03C..03D)-> BB57(1)                 (always)                   i IBC idxlen bwd
BB57 [0061]  1       BB56                  0.37   3682 [03C..03D)-> BB59(1)                 (always)                   i IBC bwd
BB58 [0062]  0                             0         0 [03C..03D)-> BB59(1)                 (always)                   i IBC rare bwd
BB59 [0063]  3       BB50,BB57,BB58        0.37   3682 [03C..053)-> BB64(1)                 (always)                   i IBC internal bwd bwd-src
BB60 [0064]  0                             0.00      0 [018..038)-> BB48(1)                 (always)                   i IBC bwd bwd-target
BB63 [0067]  2       BB04,BB09            10.27 102275 [053..???)-> BB06(1)                 (always)                   IBC internal
BB64 [0068]  1       BB59                  0.37   3682 [053..???)-> BB06(1)                 (always)                   IBC internal
BB06 [0005]  2       BB63,BB64            10.37 103308 [053..067)-> BB07(1)                 (always)                   i IBC bwd
BB07 [0006]  2       BB06,BB26            11.36 113169 [067..073)-> BB02(0.913),BB65(0.0871)  ( cond )                   i IBC bwd bwd-src
BB27 [0031]  2       BB44,BB45             0.01    100 [???..???)-> BB28(1)                 (always)                   IBC internal
BB28 [0032]  2       BB27,BB43             0.11   1143 [067..073)-> BB29(0.913),BB66(0.0871)  ( cond )                   i IBC bwd bwd-src
BB29 [0033]  1       BB28                  0.10   1044 [004..018)-> BB30(1)                 (always)                   i IBC bwd bwd-target
BB30 [0034]  2       BB29,BB42             0.40   3949 [038..03C)-> BB43(0.0583),BB31(0.942)  ( cond )                   i IBC bwd
BB31 [0035]  1       BB30                  0.37   3719 [03C..03C)-> BB32(0),BB33(1)         ( cond )                   i IBC bwd bwd-src
BB32 [0036]  1       BB31                  0         0 [???..???)-> BB41(1)                 (always)                   i IBC rare internal hascall gcsafe bwd
BB33 [0037]  1       BB31                  0.37   3719 [03C..03D)-> BB34(0.361),BB37(0.639) ( cond )                   i IBC idxlen bwd
BB34 [0038]  1       BB33                  0.13   1341 [03C..03D)-> BB35(0.000574),BB36(0.999)    ( cond )                   i IBC bwd
BB35 [0039]  1       BB34                  0.00      1 [03C..03D)-> BB38(1)                 (always)                   i IBC bwd
BB36 [0040]  1       BB34                  0.13   1340 [03C..03D)-> BB38(1)                 (always)                   i IBC bwd
BB37 [0041]  1       BB33                  0.24   2378 [03C..03D)-> BB38(1)                 (always)                   i IBC bwd
BB38 [0042]  3       BB35,BB36,BB37        0.37   3719 [03C..03D)-> BB39(0.000209),BB40(1)  ( cond )                   i IBC idxlen bwd
BB39 [0043]  1       BB38                  0.00      1 [03C..03D)-> BB41(1)                 (always)                   i IBC bwd
BB40 [0044]  1       BB38                  0.37   3718 [03C..03D)-> BB41(1)                 (always)                   i IBC bwd
BB41 [0045]  3       BB32,BB39,BB40        0.37   3719 [03C..053)-> BB42(0.781),BB43(0.219) ( cond )                   i IBC internal bwd bwd-src
BB42 [0046]  1       BB41                  0.29   2906 [018..038)-> BB30(1)                 (always)                   i IBC bwd bwd-target
BB43 [0047]  2       BB30,BB41             0.10   1044 [053..067)-> BB28(1)                 (always)                   i IBC bwd
BB65 [0069]  1       BB07                  0.99   9860 [073..???)-> BB08(1)                 (always)                   IBC internal
BB66 [0070]  1       BB28                  0.01    100 [073..???)-> BB08(1)                 (always)                   IBC internal
BB08 [0007]  2       BB65,BB66             1.00   9960 [073..074)                           (return)                   i IBC
---------------------------------------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [0000] [000..004) -> BB44(1) (always), preds={} succs={BB44}

***** BB01 [0000]
STMT00035 ( ??? ... ??? )
N009 (  7,  7) [000225] -A--G+-----                         *  COMMA     void   $VN.Void
N003 (  3,  3) [000219] DA--G+-----                         +--*  STORE_LCL_VAR byref  V15 tmp10        d:2 $VN.Void
N002 (  3,  2) [000218] n---G+-----                         |  \--*  IND       byref  <l:$200, c:$101>
N001 (  1,  1) [000215] -----+-----                         |     \--*  LCL_VAR   byref  V00 arg0         u:1 $100
N008 (  4,  4) [000224] DA--G+-----                         \--*  STORE_LCL_VAR int    V16 tmp11        d:1 $VN.Void
N007 (  4,  4) [000223] n---G+-----                            \--*  IND       int    <l:$2c0, c:$300>
N006 (  2,  2) [000222] -----+-N---                               \--*  ADD       byref  $280
N004 (  1,  1) [000220] -----+-----                                  +--*  LCL_VAR   byref  V00 arg0         u:1 (last use) $100
N005 (  1,  1) [000221] -----+-----                                  \--*  CNS_INT   long   8 $240

***** BB01 [0000]
STMT00000 ( 0x000[E-] ... 0x001 )
N002 (  1,  3) [000001] DA---+-----                         *  STORE_LCL_VAR int    V02 loc0         d:1 $VN.Void
N001 (  1,  1) [000000] -----+-----                         \--*  CNS_INT   int    0 $c0

------------ BB44 [0048] [???..???) -> BB27(0.01),BB45(0.99) (cond), preds={BB01} succs={BB45,BB27}

***** BB44 [0048]
STMT00060 ( ??? ... ??? )
N004 (  5,  5) [000432] -----------                         *  JTRUE     void   $VN.Void
N003 (  3,  3) [000431] J------N---                         \--*  EQ        int    $340
N001 (  1,  1) [000429] -----------                            +--*  LCL_VAR   ref    V01 arg1         u:1 $140
N002 (  1,  1) [000430] -----------                            \--*  CNS_INT   ref    null $VN.Null

------------ BB45 [0049] [???..???) -> BB27(0.01),BB26(0.99) (cond), preds={BB44} succs={BB26,BB27}

***** BB45 [0049]
STMT00061 ( ??? ... ??? )
N007 ( 10, 17) [000439] -----O-----                         *  JTRUE     void   $3c1
N006 (  8, 15) [000438] J----O-N---                         \--*  NE        int    $342
N004 (  4,  4) [000436] #----O-----                            +--*  IND       long   $400
N003 (  2,  2) [000435] -------N---                            |  \--*  ADD       byref  $281
N001 (  1,  1) [000433] -----------                            |     +--*  LCL_VAR   ref    V01 arg1         u:1 $140
N002 (  1,  1) [000434] -----------                            |     \--*  CNS_INT   long   24 $241
N005 (  3, 10) [000437] H----------                            \--*  CNS_INT(h) long   0x7ffe3cd28d80 ftn $41

------------ BB26 [0030] [???..???) -> BB07(1) (always), preds={BB45} succs={BB07}

------------ BB02 [0001] [004..018) -> BB61(1) (always), preds={BB07} succs={BB61}

***** BB02 [0001]
STMT00002 ( 0x004[E-] ... 0x013 )
N013 (  9,  9) [000029] DA-XG+-----                         *  STORE_LCL_VAR int    V03 loc1         d:1 <l:$558, c:$557>
N012 (  9,  9) [000027] -A-XG+-N---                         \--*  COMMA     int    <l:$36d, c:$36c>
N004 (  3,  3) [000641] DA---------                            +--*  STORE_LCL_VAR int    V20 cse2         d:1 $VN.Void
N003 (  3,  3) [000013] -----+-----                            |  \--*  ADD       int    $369
N001 (  1,  1) [000011] -----+-----                            |     +--*  LCL_VAR   int    V02 loc0         u:2 $444
N002 (  1,  1) [000012] -----+-----                            |     \--*  CNS_INT   int    1 $c1
N011 (  6,  6) [000226] ---XG+-----                            \--*  IND       int    <l:$36b, c:$36a>
N010 (  4,  5) [000026] ----G+-N---                               \--*  ADD       byref  <l:$291, c:$292>
N005 (  1,  1) [000025] -----+-----                                  +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N009 (  3,  4) [000023] -----+-N---                                  \--*  LSH       long   $416
N007 (  2,  3) [000021] -----+---U-                                     +--*  CAST      long <- uint $415
N006 (  1,  1) [000644] -----------                                     |  \--*  LCL_VAR   int    V20 cse2         u:1 $369
N008 (  1,  1) [000022] -----+-----                                     \--*  CNS_INT   long   2 $242

***** BB02 [0001]
STMT00003 ( 0x014[E-] ... 0x015 )
N002 (  1,  3) [000031] DA---+-----                         *  STORE_LCL_VAR int    V04 loc2         d:1 $VN.Void
N001 (  1,  1) [000030] -----+-----                         \--*  LCL_VAR   int    V02 loc0         u:2 $444

------------ BB61 [0065] [???..???) -> BB62(1) (always), preds={BB02} succs={BB62}

------------ BB62 [0066] [???..???) -> BB46(1) (always), preds={BB61} succs={BB46}

------------ BB46 [0050] [???..???) -> BB04(1) (always), preds={BB62} succs={BB04}

------------ BB03 [0002] [018..038) -> BB04(1) (always), preds={BB09} succs={BB04}

***** BB03 [0002]
STMT00009 ( 0x018[E-] ... 0x02F )
N019 ( 16, 16) [000115] -A-XGO-----                         *  STOREIND  int    <l:$60e, c:$60b>
N011 (  6,  7) [000099] -A--GO-N---                         +--*  COMMA     byref  <l:$2aa, c:$2a9>
N004 (  3,  3) [000637] DA---------                         |  +--*  STORE_LCL_VAR int    V19 cse1         d:1 $VN.Void
N003 (  3,  3) [000085] -----------                         |  |  \--*  ADD       int    $59e
N001 (  1,  1) [000083] -----------                         |  |     +--*  LCL_VAR   int    V04 loc2         u:2 $448
N002 (  1,  1) [000084] -----------                         |  |     \--*  CNS_INT   int    1 $c1
N010 (  4,  5) [000098] ----GO-N---                         |  \--*  ADD       byref  <l:$2a7, c:$2a8>
N005 (  1,  1) [000097] -----------                         |     +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N009 (  3,  4) [000095] -------N---                         |     \--*  LSH       long   $433
N007 (  2,  3) [000093] ---------U-                         |        +--*  CAST      long <- uint $432
N006 (  1,  1) [000640] -----------                         |        |  \--*  LCL_VAR   int    V19 cse1         u:1 $59e
N008 (  1,  1) [000094] -----------                         |        \--*  CNS_INT   long   2 $242
N018 (  6,  6) [000256] ---XGO-N---                         \--*  IND       int    <l:$5a0, c:$59f>
N017 (  4,  5) [000112] ----GO-N---                            \--*  ADD       byref  <l:$29f, c:$2a0>
N012 (  1,  1) [000111] -----------                               +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N016 (  3,  4) [000109] -------N---                               \--*  LSH       long   $42a
N014 (  2,  3) [000107] ---------U-                                  +--*  CAST      long <- uint $429
N013 (  1,  1) [000102] -----------                                  |  \--*  LCL_VAR   int    V04 loc2         u:2 $448
N015 (  1,  1) [000108] -----------                                  \--*  CNS_INT   long   2 $242

***** BB03 [0002]
STMT00010 ( 0x034[E-] ... 0x037 )
N004 (  3,  3) [000119] DA---+-----                         *  STORE_LCL_VAR int    V04 loc2         d:3 $VN.Void
N003 (  3,  3) [000118] -----+-----                         \--*  ADD       int    $5a3
N001 (  1,  1) [000116] -----+-----                            +--*  LCL_VAR   int    V04 loc2         u:2 (last use) $448
N002 (  1,  1) [000117] -----+-----                            \--*  CNS_INT   int    -1 $c2

------------ BB04 [0003] [038..03C) -> BB63(0.05826108),BB05(0.9417389) (cond), preds={BB03,BB46} succs={BB05,BB63}

***** BB04 [0003]
STMT00084 ( ??? ... ??? )
N004 (  0,  0) [000582] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:2 $VN.Void
N003 (  0,  0) [000581] -----------                         \--*  PHI       int    $448
N001 (  0,  0) [000611] ----------- pred BB03                  +--*  PHI_ARG   int    V04 loc2         u:3
N002 (  0,  0) [000604] ----------- pred BB46                  \--*  PHI_ARG   int    V04 loc2         u:1 $444

***** BB04 [0003]
STMT00004 ( 0x038[E-] ... 0x03A )
N004 (  5,  5) [000035] -----+-----                         *  JTRUE     void   $VN.Void
N003 (  3,  3) [000034] J----+-N---                         \--*  LT        int    $589
N001 (  1,  1) [000032] -----+-----                            +--*  LCL_VAR   int    V04 loc2         u:2 $448
N002 (  1,  1) [000033] -----+-----                            \--*  CNS_INT   int    0 $c0

------------ BB05 [0004] [03C..03C) -> BB10(1) (always), preds={BB04} succs={BB10}

***** BB05 [0004]
STMT00012 ( 0x03C[E-] ... ??? )
N010 (  6,  6) [000122] DA-XG+-----                         *  STORE_LCL_VAR int    V07 tmp2         d:1 <l:$5df, c:$5de>
N009 (  6,  6) [000075] ---XG+-N---                         \--*  COMMA     int    <l:$58d, c:$58c>
N001 (  0,  0) [000068] -----+-----                            +--*  NOP       void  
N008 (  6,  6) [000227] ---XG+-----                            \--*  IND       int    <l:$58b, c:$58a>
N007 (  4,  5) [000074] ----G+-N---                               \--*  ADD       byref  <l:$29f, c:$2a0>
N002 (  1,  1) [000073] -----+-----                                  +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N006 (  3,  4) [000071] -----+-N---                                  \--*  LSH       long   $42a
N004 (  2,  3) [000069] -----+---U-                                     +--*  CAST      long <- uint $429
N003 (  1,  1) [000064] -----+-----                                     |  \--*  LCL_VAR   int    V04 loc2         u:2 $448
N005 (  1,  1) [000070] -----+-----                                     \--*  CNS_INT   long   2 $242

------------ BB10 [0009] [03C..03D) -> BB23(0.3605734),BB22(0.6394266) (cond), preds={BB05} succs={BB22,BB23}

***** BB10 [0009]
STMT00018 ( INL01 @ 0x000[E-] ... ??? ) <- INLRT @ 0x03C[E-]
N008 (  7,  7) [000147] DA-XG+-----                         *  STORE_LCL_VAR ref    V09 tmp4         d:2 <l:$5e6, c:$5e5>
N007 (  7,  7) [000146] ---XG+-----                         \--*  IND       ref    <l:$5e4, c:$5e3>
N006 (  5,  5) [000229] ----G+-N---                            \--*  ADD       byref  <l:$2a1, c:$2a2>
N004 (  4,  4) [000134] n---G+-----                               +--*  IND       ref    <l:$482, c:$15c>
N003 (  2,  2) [000133] -----+-N---                               |  \--*  ADD       byref  $286
N001 (  1,  1) [000131] -----+-----                               |     +--*  LCL_VAR   ref    V01 arg1         u:1 $140
N002 (  1,  1) [000132] -----+-----                               |     \--*  CNS_INT   long   8 $240
N005 (  1,  1) [000228] -----+-----                               \--*  CNS_INT   long   32 Fseq[_keys] $244

***** BB10 [0009]
STMT00028 ( INL01 @ 0x007[E-] ... ??? ) <- INLRT @ 0x03C[E-]
N019 ( 15, 19) [000191] DA-XG+-----                         *  STORE_LCL_VAR int    V12 tmp7         d:1 <l:$5f2, c:$5f1>
N018 ( 15, 19) [000241] -A-XG+-----                         \--*  COMMA     int    <l:$592, c:$591>
N007 (  9, 12) [000233] -A-X-+-----                            +--*  BOUNDS_CHECK_Rng void   <l:$5f2, c:$5f1>
N001 (  1,  1) [000138] -----+-----                            |  +--*  LCL_VAR   int    V03 loc1         u:1 <l:$2c4, c:$309>
N006 (  4,  4) [000635] -A-X-------                            |  \--*  COMMA     int    <l:$58f, c:$58e>
N004 (  3,  3) [000633] DA-X-------                            |     +--*  STORE_LCL_VAR int    V18 cse0         d:1 <l:$5ea, c:$5e9>
N003 (  3,  3) [000232] ---X-+-----                            |     |  \--*  ARR_LENGTH int    <l:$58f, c:$58e>
N002 (  1,  1) [000150] -----+-----                            |     |     \--*  LCL_VAR   ref    V09 tmp4         u:2 <l:$5e0, c:$15d>
N005 (  1,  1) [000634] -----------                            |     \--*  LCL_VAR   int    V18 cse0         u:1 <l:$313, c:$314>
N017 (  6,  7) [000242] n---G+-----                            \--*  IND       int    <l:$590, c:$315>
N016 (  3,  5) [000240] -----+-----                               \--*  ARR_ADDR  byref int[] $85
N015 (  3,  5) [000239] -----+-N---                                  \--*  ADD       byref  <l:$2a3, c:$2a4>
N008 (  1,  1) [000230] -----+-----                                     +--*  LCL_VAR   ref    V09 tmp4         u:2 <l:$5e0, c:$15d>
N014 (  4,  5) [000238] -----+-N---                                     \--*  ADD       long   <l:$41d, c:$41e>
N012 (  3,  4) [000236] -----+-N---                                        +--*  LSH       long   <l:$41b, c:$41c>
N010 (  2,  3) [000234] -----+---U-                                        |  +--*  CAST      long <- uint <l:$419, c:$41a>
N009 (  1,  1) [000231] -----+-----                                        |  |  \--*  LCL_VAR   int    V03 loc1         u:1 <l:$2c4, c:$309>
N011 (  1,  1) [000235] -----+-N---                                        |  \--*  CNS_INT   long   2 $242
N013 (  1,  1) [000237] -----+-----                                        \--*  CNS_INT   long   16 $245

***** BB10 [0009]
STMT00029 ( INL01 @ 0x007[E-] ... ??? ) <- INLRT @ 0x03C[E-]
N015 ( 12, 16) [000192] DA-XG+-----                         *  STORE_LCL_VAR int    V13 tmp8         d:1 <l:$5fa, c:$5f9>
N014 ( 12, 16) [000254] ---XG+-----                         \--*  COMMA     int    <l:$595, c:$594>
N003 (  6,  9) [000246] ---X-+-----                            +--*  BOUNDS_CHECK_Rng void   <l:$5fa, c:$5f9>
N001 (  1,  1) [000139] -----+-----                            |  +--*  LCL_VAR   int    V07 tmp2         u:1 <l:$2c7, c:$311>
N002 (  1,  1) [000636] -----------                            |  \--*  LCL_VAR   int    V18 cse0         u:1 <l:$313, c:$314>
N013 (  6,  7) [000255] n---G+-----                            \--*  IND       int    <l:$593, c:$316>
N012 (  3,  5) [000253] -----+-----                               \--*  ARR_ADDR  byref int[] $86
N011 (  3,  5) [000252] -----+-N---                                  \--*  ADD       byref  <l:$2a5, c:$2a6>
N004 (  1,  1) [000243] -----+-----                                     +--*  LCL_VAR   ref    V09 tmp4         u:2 (last use) <l:$5e0, c:$15d>
N010 (  4,  5) [000251] -----+-N---                                     \--*  ADD       long   <l:$42f, c:$430>
N008 (  3,  4) [000249] -----+-N---                                        +--*  LSH       long   <l:$42d, c:$42e>
N006 (  2,  3) [000247] -----+---U-                                        |  +--*  CAST      long <- uint <l:$42b, c:$42c>
N005 (  1,  1) [000244] -----+-----                                        |  |  \--*  LCL_VAR   int    V07 tmp2         u:1 <l:$2c7, c:$311>
N007 (  1,  1) [000248] -----+-N---                                        |  \--*  CNS_INT   long   2 $242
N009 (  1,  1) [000250] -----+-----                                        \--*  CNS_INT   long   16 $245

***** BB10 [0009]
STMT00030 ( INL04 @ 0x000[E-] ... ??? ) <- INL03 @ 0x010[E-] <- INL01 @ 0x007[E-] <- INLRT @ 0x03C[E-]
N004 (  5,  5) [000197] ----G+-----                         *  JTRUE     void   $VN.Void
N003 (  3,  3) [000196] J---G+-N---                         \--*  GE        int    <l:$596, c:$597>
N001 (  1,  1) [000195] -----+-----                            +--*  LCL_VAR   int    V12 tmp7         u:1 <l:$590, c:$315>
N002 (  1,  1) [000186] -----+-----                            \--*  LCL_VAR   int    V13 tmp8         u:1 <l:$593, c:$316>

------------ BB22 [0025] [03C..03D) -> BB20(1) (always), preds={BB10} succs={BB20}

***** BB22 [0025]
STMT00034 ( INL04 @ 0x005[E-] ... ??? ) <- INL03 @ 0x010[E-] <- INL01 @ 0x007[E-] <- INLRT @ 0x03C[E-]
N002 (  1,  3) [000210] DA---+-----                         *  STORE_LCL_VAR int    V14 tmp9         d:3 $VN.Void
N001 (  1,  1) [000209] -----+-----                         \--*  CNS_INT   int    -1 $c2

------------ BB23 [0026] [03C..03D) -> BB25(0.0005740704),BB24(0.9994259) (cond), preds={BB10} succs={BB24,BB25}

***** BB23 [0026]
STMT00031 ( INL04 @ 0x007[E-] ... ??? ) <- INL03 @ 0x010[E-] <- INL01 @ 0x007[E-] <- INLRT @ 0x03C[E-]
N004 (  5,  5) [000202] ----G+-----                         *  JTRUE     void   $VN.Void
N003 (  3,  3) [000201] J---G+-N---                         \--*  LE        int    <l:$598, c:$599>
N001 (  1,  1) [000199] -----+-----                            +--*  LCL_VAR   int    V12 tmp7         u:1 (last use) <l:$590, c:$315>
N002 (  1,  1) [000200] -----+-----                            \--*  LCL_VAR   int    V13 tmp8         u:1 (last use) <l:$593, c:$316>

------------ BB24 [0027] [03C..03D) -> BB20(1) (always), preds={BB23} succs={BB20}

***** BB24 [0027]
STMT00033 ( INL04 @ 0x00C[E-] ... ??? ) <- INL03 @ 0x010[E-] <- INL01 @ 0x007[E-] <- INLRT @ 0x03C[E-]
N002 (  1,  3) [000207] DA---+-----                         *  STORE_LCL_VAR int    V14 tmp9         d:2 $VN.Void
N001 (  1,  1) [000206] -----+-----                         \--*  CNS_INT   int    1 $c1

------------ BB25 [0028] [03C..03D) -> BB20(1) (always), preds={BB23} succs={BB20}

***** BB25 [0028]
STMT00032 ( INL04 @ 0x00E[E-] ... ??? ) <- INL03 @ 0x010[E-] <- INL01 @ 0x007[E-] <- INLRT @ 0x03C[E-]
N002 (  1,  3) [000204] DA---+-----                         *  STORE_LCL_VAR int    V14 tmp9         d:1 $VN.Void
N001 (  1,  1) [000203] -----+-----                         \--*  CNS_INT   int    0 $c0

------------ BB20 [0029] [03C..03D) -> BB15(0.0002085071),BB14(0.9997915) (cond), preds={BB22,BB24,BB25} succs={BB14,BB15}

***** BB20 [0029]
STMT00087 ( ??? ... ??? )
N005 (  0,  0) [000588] DA---------                         *  STORE_LCL_VAR int    V14 tmp9         d:4 $VN.Void
N004 (  0,  0) [000587] -----------                         \--*  PHI       int    $449
N001 (  0,  0) [000608] ----------- pred BB22                  +--*  PHI_ARG   int    V14 tmp9         u:3 $c2
N002 (  0,  0) [000607] ----------- pred BB24                  +--*  PHI_ARG   int    V14 tmp9         u:2 $c1
N003 (  0,  0) [000606] ----------- pred BB25                  \--*  PHI_ARG   int    V14 tmp9         u:1 $c0

***** BB20 [0029]
STMT00022 ( INL01 @ 0x020[E-] ... ??? ) <- INLRT @ 0x03C[E-]
N004 (  5,  5) [000162] -----+-----                         *  JTRUE     void   $VN.Void
N003 (  3,  3) [000161] J----+-N---                         \--*  EQ        int    $59a
N001 (  1,  1) [000159] -----+-----                            +--*  LCL_VAR   int    V14 tmp9         u:4 $449
N002 (  1,  1) [000160] -----+-----                            \--*  CNS_INT   int    0 $c0

------------ BB14 [0012] [03C..03D) -> BB09(1) (always), preds={BB20} succs={BB09}

***** BB14 [0012]
STMT00024 ( INL01 @ 0x023[E-] ... ??? ) <- INLRT @ 0x03C[E-]
N002 (  1,  3) [000169] DA---+-----                         *  STORE_LCL_VAR int    V06 tmp1         d:3 $VN.Void
N001 (  1,  1) [000168] -----+-----                         \--*  LCL_VAR   int    V14 tmp9         u:4 (last use) $449

------------ BB15 [0013] [03C..03D) -> BB09(1) (always), preds={BB20} succs={BB09}

***** BB15 [0013]
STMT00023 ( INL01 @ 0x025[E-] ... ??? ) <- INLRT @ 0x03C[E-]
N004 (  3,  3) [000166] DA---+-----                         *  STORE_LCL_VAR int    V06 tmp1         d:2 $VN.Void
N003 (  3,  3) [000165] -----+-----                         \--*  SUB       int    <l:$59b, c:$59c>
N001 (  1,  1) [000163] -----+-----                            +--*  LCL_VAR   int    V03 loc1         u:1 <l:$2c4, c:$309>
N002 (  1,  1) [000164] -----+-----                            \--*  LCL_VAR   int    V07 tmp2         u:1 (last use) <l:$2c7, c:$311>

------------ BB11 [0010] [???..???) -> BB09(1) (always), preds={} succs={BB09}

***** BB11 [0010]
STMT00017 ( 0x03C[E-] ... ??? )
N005 ( 17, 11) [000143] DACXG------                         *  STORE_LCL_VAR int    V06 tmp1         d:1 $VN.Void
N004 ( 17, 11) [000077] --CXG------                         \--*  CALL      int    System.Comparison`1[int]:Invoke(int,int):int:this $312
N001 (  1,  1) [000060] ----------- this rcx                   +--*  CNS_INT   ref    null $VN.Null
N002 (  1,  1) [000061] ----------- arg1 rdx                   +--*  LCL_VAR   int    V03 loc1         u:1 <l:$2c4, c:$309>
N003 (  1,  1) [000123] ----------- arg2 r8                    \--*  LCL_VAR   int    V07 tmp2         u:1 (last use) <l:$2c7, c:$311>

------------ BB09 [0008] [03C..053) -> BB03(0.7812769),BB63(0.2187231) (cond), preds={BB11,BB14,BB15} succs={BB63,BB03}

***** BB09 [0008]
STMT00086 ( ??? ... ??? )
N005 (  0,  0) [000586] DA---------                         *  STORE_LCL_VAR int    V06 tmp1         d:4 $VN.Void
N004 (  0,  0) [000585] -----------                         \--*  PHI       int    $44a
N001 (  0,  0) [000610] ----------- pred BB14                  +--*  PHI_ARG   int    V06 tmp1         u:3 $449
N002 (  0,  0) [000609] ----------- pred BB15                  +--*  PHI_ARG   int    V06 tmp1         u:2 <l:$59b, c:$59c>
N003 (  0,  0) [000605] ----------- pred BB11                  \--*  PHI_ARG   int    V06 tmp1         u:1 $312

***** BB09 [0008]
STMT00008 ( 0x03C[E-] ... ??? )
N004 (  5,  5) [000081] -----+-----                         *  JTRUE     void   $VN.Void
N003 (  3,  3) [000080] J----+-N---                         \--*  LT        int    $59d
N001 (  1,  1) [000121] -----+-----                            +--*  LCL_VAR   int    V06 tmp1         u:4 (last use) $44a
N002 (  1,  1) [000079] -----+-----                            \--*  CNS_INT   int    0 $c0

------------ BB47 [0051] [???..???) -> BB48(1) (always), preds={} succs={BB48}

------------ BB48 [0052] [038..03C) -> BB49(1) (always), preds={BB47,BB60} succs={BB49}

***** BB48 [0052]
STMT00088 ( ??? ... ??? )
N004 (  0,  0) [000590] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:4 $VN.Void
N003 (  0,  0) [000589] -----------                         \--*  PHI       int    $445
N001 (  0,  0) [000620] ----------- pred BB60                  +--*  PHI_ARG   int    V04 loc2         u:5
N002 (  0,  0) [000613] ----------- pred BB47                  \--*  PHI_ARG   int    V04 loc2         u:1 $444

------------ BB49 [0053] [03C..03C) -> BB51(1) (always), preds={BB48} succs={BB51}

***** BB49 [0053]
STMT00063 ( 0x03C[E-] ... ??? )
N008 (  6,  6) [000444] DA-XGO-----                         *  STORE_LCL_VAR int    V07 tmp2         d:2 <l:$564, c:$563>
N007 (  6,  6) [000449] ---XGO-N---                         \--*  IND       int    <l:$370, c:$36f>
N006 (  4,  5) [000450] ----GO-N---                            \--*  ADD       byref  <l:$293, c:$294>
N001 (  1,  1) [000451] -----------                               +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N005 (  3,  4) [000452] -------N---                               \--*  LSH       long   $418
N003 (  2,  3) [000453] ---------U-                                  +--*  CAST      long <- uint $417
N002 (  1,  1) [000454] -----------                                  |  \--*  LCL_VAR   int    V04 loc2         u:4 $445
N004 (  1,  1) [000455] -----------                                  \--*  CNS_INT   long   2 $242

------------ BB50 [0054] [???..???) -> BB59(1) (always), preds={} succs={BB59}

***** BB50 [0054]
STMT00065 ( 0x03C[E-] ... ??? )
N005 ( 17, 11) [000463] DACXG------                         *  STORE_LCL_VAR int    V06 tmp1         d:5 $VN.Void
N004 ( 17, 11) [000464] --CXG------                         \--*  CALL      int    System.Comparison`1[int]:Invoke(int,int):int:this $30b
N001 (  1,  1) [000465] ----------- this rcx                   +--*  CNS_INT   ref    null $VN.Null
N002 (  1,  1) [000466] ----------- arg1 rdx                   +--*  LCL_VAR   int    V03 loc1         u:1 <l:$2c4, c:$309>
N003 (  1,  1) [000467] ----------- arg2 r8                    \--*  LCL_VAR   int    V07 tmp2         u:2 (last use) <l:$2c5, c:$30a>

------------ BB51 [0055] [03C..03D) -> BB52(0.3605734),BB55(0.6394266) (cond), preds={BB49} succs={BB55,BB52}

***** BB51 [0055]
STMT00066 ( INL01 @ 0x000[E-] ... ??? ) <- INLRT @ 0x03C[E-]
N006 (  6,  6) [000468] DA-XGO-----                         *  STORE_LCL_VAR ref    V09 tmp4         d:3 <l:$56b, c:$56a>
N005 (  6,  6) [000469] ---XGO-----                         \--*  IND       ref    <l:$569, c:$568>
N004 (  4,  4) [000470] ----GO-N---                            \--*  ADD       byref  <l:$295, c:$296>
N002 (  3,  3) [000471] n---GO-----                               +--*  IND       ref    <l:$481, c:$152>
N001 (  1,  1) [000472] -----------                               |  \--*  CNS_INT   byref  0 $VN.Null
N003 (  1,  1) [000475] -----------                               \--*  CNS_INT   long   32 Fseq[_keys] $244

***** BB51 [0055]
STMT00067 ( INL01 @ 0x007[E-] ... ??? ) <- INLRT @ 0x03C[E-]
N011 (  6,  7) [000476] DA--GO-----                         *  STORE_LCL_VAR int    V12 tmp7         d:2 <l:$577, c:$576>
N010 (  6,  7) [000482] n---GO-N---                         \--*  IND       int    <l:$375, c:$30e>
N009 (  3,  5) [000483] -----O-----                            \--*  ARR_ADDR  byref int[] $83
N008 (  3,  5) [000484] -------N---                               \--*  ADD       byref  <l:$297, c:$298>
N001 (  1,  1) [000485] -----------                                  +--*  LCL_VAR   ref    V09 tmp4         u:3 <l:$565, c:$153>
N007 (  4,  5) [000486] -------N---                                  \--*  ADD       long   <l:$41d, c:$41e>
N005 (  3,  4) [000487] -------N---                                     +--*  LSH       long   <l:$41b, c:$41c>
N003 (  2,  3) [000488] ---------U-                                     |  +--*  CAST      long <- uint <l:$419, c:$41a>
N002 (  1,  1) [000489] -----------                                     |  |  \--*  LCL_VAR   int    V03 loc1         u:1 <l:$2c4, c:$309>
N004 (  1,  1) [000490] -------N---                                     |  \--*  CNS_INT   long   2 $242
N006 (  1,  1) [000491] -----------                                     \--*  CNS_INT   long   16 $245

***** BB51 [0055]
STMT00068 ( INL01 @ 0x007[E-] ... ??? ) <- INLRT @ 0x03C[E-]
N011 (  6,  7) [000492] DA--GO-----                         *  STORE_LCL_VAR int    V13 tmp8         d:2 <l:$57f, c:$57e>
N010 (  6,  7) [000498] n---GO-N---                         \--*  IND       int    <l:$378, c:$30f>
N009 (  3,  5) [000499] -----O-----                            \--*  ARR_ADDR  byref int[] $84
N008 (  3,  5) [000500] -------N---                               \--*  ADD       byref  <l:$299, c:$29a>
N001 (  1,  1) [000501] -----------                                  +--*  LCL_VAR   ref    V09 tmp4         u:3 (last use) <l:$565, c:$153>
N007 (  4,  5) [000502] -------N---                                  \--*  ADD       long   <l:$424, c:$425>
N005 (  3,  4) [000503] -------N---                                     +--*  LSH       long   <l:$422, c:$423>
N003 (  2,  3) [000504] ---------U-                                     |  +--*  CAST      long <- uint <l:$420, c:$421>
N002 (  1,  1) [000505] -----------                                     |  |  \--*  LCL_VAR   int    V07 tmp2         u:2 <l:$2c5, c:$30a>
N004 (  1,  1) [000506] -------N---                                     |  \--*  CNS_INT   long   2 $242
N006 (  1,  1) [000507] -----------                                     \--*  CNS_INT   long   16 $245

***** BB51 [0055]
STMT00069 ( INL04 @ 0x000[E-] ... ??? ) <- INL03 @ 0x010[E-] <- INL01 @ 0x007[E-] <- INLRT @ 0x03C[E-]
N004 (  5,  5) [000508] ----G------                         *  JTRUE     void   $VN.Void
N003 (  3,  3) [000509] J---G--N---                         \--*  GE        int    <l:$37b, c:$37c>
N001 (  1,  1) [000510] -----------                            +--*  LCL_VAR   int    V12 tmp7         u:2 <l:$375, c:$30e>
N002 (  1,  1) [000511] -----------                            \--*  LCL_VAR   int    V13 tmp8         u:2 <l:$378, c:$30f>

------------ BB52 [0056] [03C..03D) -> BB53(0.0005740704),BB54(0.9994259) (cond), preds={BB51} succs={BB54,BB53}

***** BB52 [0056]
STMT00070 ( INL04 @ 0x007[E-] ... ??? ) <- INL03 @ 0x010[E-] <- INL01 @ 0x007[E-] <- INLRT @ 0x03C[E-]
N004 (  5,  5) [000512] ----G------                         *  JTRUE     void   $VN.Void
N003 (  3,  3) [000513] J---G--N---                         \--*  LE        int    <l:$37d, c:$37e>
N001 (  1,  1) [000514] -----------                            +--*  LCL_VAR   int    V12 tmp7         u:2 (last use) <l:$375, c:$30e>
N002 (  1,  1) [000515] -----------                            \--*  LCL_VAR   int    V13 tmp8         u:2 (last use) <l:$378, c:$30f>

------------ BB53 [0057] [03C..03D) -> BB56(1) (always), preds={BB52} succs={BB56}

***** BB53 [0057]
STMT00071 ( INL04 @ 0x00E[E-] ... ??? ) <- INL03 @ 0x010[E-] <- INL01 @ 0x007[E-] <- INLRT @ 0x03C[E-]
N002 (  1,  3) [000516] DA---------                         *  STORE_LCL_VAR int    V14 tmp9         d:5 $VN.Void
N001 (  1,  1) [000517] -----------                         \--*  CNS_INT   int    0 $c0

------------ BB54 [0058] [03C..03D) -> BB56(1) (always), preds={BB52} succs={BB56}

***** BB54 [0058]
STMT00072 ( INL04 @ 0x00C[E-] ... ??? ) <- INL03 @ 0x010[E-] <- INL01 @ 0x007[E-] <- INLRT @ 0x03C[E-]
N002 (  1,  3) [000518] DA---------                         *  STORE_LCL_VAR int    V14 tmp9         d:6 $VN.Void
N001 (  1,  1) [000519] -----------                         \--*  CNS_INT   int    1 $c1

------------ BB55 [0059] [03C..03D) -> BB56(1) (always), preds={BB51} succs={BB56}

***** BB55 [0059]
STMT00073 ( INL04 @ 0x005[E-] ... ??? ) <- INL03 @ 0x010[E-] <- INL01 @ 0x007[E-] <- INLRT @ 0x03C[E-]
N002 (  1,  3) [000520] DA---------                         *  STORE_LCL_VAR int    V14 tmp9         d:7 $VN.Void
N001 (  1,  1) [000521] -----------                         \--*  CNS_INT   int    -1 $c2

------------ BB56 [0060] [03C..03D) -> BB57(1) (always), preds={BB53,BB54,BB55} succs={BB57}

***** BB56 [0060]
STMT00090 ( ??? ... ??? )
N005 (  0,  0) [000594] DA---------                         *  STORE_LCL_VAR int    V14 tmp9         d:8 $VN.Void
N004 (  0,  0) [000593] -----------                         \--*  PHI       int    $446
N001 (  0,  0) [000617] ----------- pred BB55                  +--*  PHI_ARG   int    V14 tmp9         u:7 $c2
N002 (  0,  0) [000616] ----------- pred BB54                  +--*  PHI_ARG   int    V14 tmp9         u:6 $c1
N003 (  0,  0) [000615] ----------- pred BB53                  \--*  PHI_ARG   int    V14 tmp9         u:5 $c0

------------ BB57 [0061] [03C..03D) -> BB59(1) (always), preds={BB56} succs={BB59}

***** BB57 [0061]
STMT00076 ( INL01 @ 0x025[E-] ... ??? ) <- INLRT @ 0x03C[E-]
N004 (  3,  3) [000528] DA---------                         *  STORE_LCL_VAR int    V06 tmp1         d:6 $VN.Void
N003 (  3,  3) [000529] -----------                         \--*  SUB       int    <l:$580, c:$581>
N001 (  1,  1) [000530] -----------                            +--*  LCL_VAR   int    V03 loc1         u:1 <l:$2c4, c:$309>
N002 (  1,  1) [000531] -----------                            \--*  LCL_VAR   int    V07 tmp2         u:2 (last use) <l:$2c5, c:$30a>

------------ BB58 [0062] [03C..03D) -> BB59(1) (always), preds={} succs={BB59}

***** BB58 [0062]
STMT00077 ( INL01 @ 0x023[E-] ... ??? ) <- INLRT @ 0x03C[E-]
N002 (  1,  3) [000532] DA---------                         *  STORE_LCL_VAR int    V06 tmp1         d:7 $VN.Void
N001 (  1,  1) [000533] -----------                         \--*  CNS_INT   int    0 $c0

------------ BB59 [0063] [03C..053) -> BB64(1) (always), preds={BB50,BB57,BB58} succs={BB64}

***** BB59 [0063]
STMT00089 ( ??? ... ??? )
N005 (  0,  0) [000592] DA---------                         *  STORE_LCL_VAR int    V06 tmp1         d:8 $VN.Void
N004 (  0,  0) [000591] -----------                         \--*  PHI       int    $447
N001 (  0,  0) [000619] ----------- pred BB58                  +--*  PHI_ARG   int    V06 tmp1         u:7 $446
N002 (  0,  0) [000618] ----------- pred BB57                  +--*  PHI_ARG   int    V06 tmp1         u:6 <l:$580, c:$581>
N003 (  0,  0) [000614] ----------- pred BB50                  \--*  PHI_ARG   int    V06 tmp1         u:5 $30b

------------ BB60 [0064] [018..038) -> BB48(1) (always), preds={} succs={BB48}

***** BB60 [0064]
STMT00079 ( 0x018[E-] ... ??? )
N016 ( 15, 15) [000538] -A-XGO-----                         *  STOREIND  int    <l:$5d3, c:$5d0>
N008 (  6,  7) [000545] ----GO-N---                         +--*  ADD       byref  <l:$29b, c:$29c>
N001 (  1,  1) [000546] -----------                         |  +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N007 (  5,  6) [000547] -------N---                         |  \--*  LSH       long   $428
N005 (  4,  5) [000548] ---------U-                         |     +--*  CAST      long <- uint $427
N004 (  3,  3) [000549] -----------                         |     |  \--*  ADD       int    $583
N002 (  1,  1) [000550] -----------                         |     |     +--*  LCL_VAR   int    V04 loc2         u:4 $445
N003 (  1,  1) [000551] -----------                         |     |     \--*  CNS_INT   int    1 $c1
N006 (  1,  1) [000552] -----------                         |     \--*  CNS_INT   long   2 $242
N015 (  6,  6) [000557] ---XGO-N---                         \--*  IND       int    <l:$585, c:$584>
N014 (  4,  5) [000558] ----GO-N---                            \--*  ADD       byref  <l:$293, c:$294>
N009 (  1,  1) [000559] -----------                               +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N013 (  3,  4) [000560] -------N---                               \--*  LSH       long   $418
N011 (  2,  3) [000561] ---------U-                                  +--*  CAST      long <- uint $417
N010 (  1,  1) [000562] -----------                                  |  \--*  LCL_VAR   int    V04 loc2         u:4 $445
N012 (  1,  1) [000563] -----------                                  \--*  CNS_INT   long   2 $242

***** BB60 [0064]
STMT00080 ( 0x034[E-] ... ??? )
N004 (  3,  3) [000564] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:5 $VN.Void
N003 (  3,  3) [000565] -----------                         \--*  ADD       int    $588
N001 (  1,  1) [000566] -----------                            +--*  LCL_VAR   int    V04 loc2         u:4 (last use) $445
N002 (  1,  1) [000567] -----------                            \--*  CNS_INT   int    -1 $c2

------------ BB63 [0067] [053..???) -> BB06(1) (always), preds={BB04,BB09} succs={BB06}

------------ BB64 [0068] [053..???) -> BB06(1) (always), preds={BB59} succs={BB06}

------------ BB06 [0005] [053..067) -> BB07(1) (always), preds={BB63,BB64} succs={BB07}

***** BB06 [0005]
STMT00085 ( ??? ... ??? )
N004 (  0,  0) [000584] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:6 $VN.Void
N003 (  0,  0) [000583] -----------                         \--*  PHI       int    $44b
N001 (  0,  0) [000621] ----------- pred BB64                  +--*  PHI_ARG   int    V04 loc2         u:4 $445
N002 (  0,  0) [000612] ----------- pred BB63                  \--*  PHI_ARG   int    V04 loc2         u:2 $448

***** BB06 [0005]
STMT00005 ( 0x053[E-] ... 0x05E )
N013 ( 11, 11) [000055] -A-XG+-----                         *  STOREIND  int    <l:$61a, c:$618>
N011 (  6,  7) [000053] -A--G+-N---                         +--*  COMMA     byref  <l:$2ae, c:$2ad>
N004 (  3,  3) [000646] DA---------                         |  +--*  STORE_LCL_VAR int    V21 cse3         d:1 $VN.Void
N003 (  3,  3) [000039] -----+-----                         |  |  \--*  ADD       int    $5a4
N001 (  1,  1) [000037] -----+-----                         |  |     +--*  LCL_VAR   int    V04 loc2         u:6 $44b
N002 (  1,  1) [000038] -----+-----                         |  |     \--*  CNS_INT   int    1 $c1
N010 (  4,  5) [000052] ----G+-N---                         |  \--*  ADD       byref  <l:$2ab, c:$2ac>
N005 (  1,  1) [000051] -----+-----                         |     +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N009 (  3,  4) [000049] -----+-N---                         |     \--*  LSH       long   $435
N007 (  2,  3) [000047] -----+---U-                         |        +--*  CAST      long <- uint $434
N006 (  1,  1) [000649] -----------                         |        |  \--*  LCL_VAR   int    V21 cse3         u:1 $5a4
N008 (  1,  1) [000048] -----+-----                         |        \--*  CNS_INT   long   2 $242
N012 (  1,  1) [000054] -----+-----                         \--*  LCL_VAR   int    V03 loc1         u:1 (last use) <l:$2c4, c:$309>

***** BB06 [0005]
STMT00006 ( 0x063[E-] ... 0x066 )
N002 (  1,  3) [000059] DA---+-----                         *  STORE_LCL_VAR int    V02 loc0         d:3 $VN.Void
N001 (  1,  1) [000645] -----------                         \--*  LCL_VAR   int    V20 cse2         u:1 $369

------------ BB07 [0006] [067..073) -> BB02(0.91287),BB65(0.08712996) (cond), preds={BB06,BB26} succs={BB65,BB02}

***** BB07 [0006]
STMT00083 ( ??? ... ??? )
N004 (  0,  0) [000580] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:2 $VN.Void
N003 (  0,  0) [000579] -----------                         \--*  PHI       int    $444
N001 (  0,  0) [000622] ----------- pred BB06                  +--*  PHI_ARG   int    V02 loc0         u:3
N002 (  0,  0) [000603] ----------- pred BB26                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0

***** BB07 [0006]
STMT00001 ( 0x067[E-] ... 0x071 )
N006 (  7,  7) [000009] ----G+-----                         *  JTRUE     void   $VN.Void
N005 (  5,  5) [000008] J---G+-N---                         \--*  LT        int    <l:$367, c:$368>
N001 (  1,  1) [000002] -----+-----                            +--*  LCL_VAR   int    V02 loc0         u:2 $444
N004 (  3,  3) [000007] ----G+-----                            \--*  ADD       int    <l:$343, c:$344>
N002 (  1,  1) [000005] -----+-----                               +--*  LCL_VAR   int    V16 tmp11        u:1 <l:$2c0, c:$300>
N003 (  1,  1) [000006] -----+-----                               \--*  CNS_INT   int    -1 $c2

------------ BB27 [0031] [???..???) -> BB28(1) (always), preds={BB44,BB45} succs={BB28}

------------ BB28 [0032] [067..073) -> BB29(0.91287),BB66(0.08712996) (cond), preds={BB27,BB43} succs={BB66,BB29}

***** BB28 [0032]
STMT00091 ( ??? ... ??? )
N004 (  0,  0) [000596] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:4 $VN.Void
N003 (  0,  0) [000595] -----------                         \--*  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43                  +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0

***** BB28 [0032]
STMT00036 ( 0x067[E-] ... ??? )
N006 (  7,  7) [000257] ----G------                         *  JTRUE     void   $VN.Void
N005 (  5,  5) [000258] J---G--N---                         \--*  LT        int    <l:$345, c:$346>
N001 (  1,  1) [000259] -----------                            +--*  LCL_VAR   int    V02 loc0         u:4 $440
N004 (  3,  3) [000260] ----G------                            \--*  ADD       int    <l:$343, c:$344>
N002 (  1,  1) [000261] -----------                               +--*  LCL_VAR   int    V16 tmp11        u:1 <l:$2c0, c:$300>
N003 (  1,  1) [000262] -----------                               \--*  CNS_INT   int    -1 $c2

------------ BB29 [0033] [004..018) -> BB30(1) (always), preds={BB28} succs={BB30}

***** BB29 [0033]
STMT00037 ( 0x004[E-] ... ??? )
N012 (  8,  8) [000263] DA-XGO-----                         *  STORE_LCL_VAR int    V03 loc1         d:2 <l:$3cd, c:$3cc>
N011 (  8,  8) [000264] ---XGO-N---                         \--*  COMMA     int    <l:$34b, c:$34a>
N001 (  0,  0) [000265] -----------                            +--*  NOP       void  
N010 (  8,  8) [000270] ---XGO-----                            \--*  IND       int    <l:$349, c:$348>
N009 (  6,  7) [000271] ----GO-N---                               \--*  ADD       byref  <l:$282, c:$283>
N002 (  1,  1) [000272] -----------                                  +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N008 (  5,  6) [000273] -------N---                                  \--*  LSH       long   $402
N006 (  4,  5) [000274] ---------U-                                     +--*  CAST      long <- uint $401
N005 (  3,  3) [000275] -----------                                     |  \--*  ADD       int    $347
N003 (  1,  1) [000276] -----------                                     |     +--*  LCL_VAR   int    V02 loc0         u:4 $440
N004 (  1,  1) [000277] -----------                                     |     \--*  CNS_INT   int    1 $c1
N007 (  1,  1) [000278] -----------                                     \--*  CNS_INT   long   2 $242

***** BB29 [0033]
STMT00038 ( 0x014[E-] ... ??? )
N002 (  1,  3) [000279] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:7 $VN.Void
N001 (  1,  1) [000280] -----------                         \--*  LCL_VAR   int    V02 loc0         u:4 $440

------------ BB30 [0034] [038..03C) -> BB43(0.05826108),BB31(0.9417389) (cond), preds={BB29,BB42} succs={BB31,BB43}

***** BB30 [0034]
STMT00092 ( ??? ... ??? )
N004 (  0,  0) [000598] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:8 $VN.Void
N003 (  0,  0) [000597] -----------                         \--*  PHI       int    $441
N001 (  0,  0) [000631] ----------- pred BB42                  +--*  PHI_ARG   int    V04 loc2         u:9
N002 (  0,  0) [000624] ----------- pred BB29                  \--*  PHI_ARG   int    V04 loc2         u:7 $440

***** BB30 [0034]
STMT00039 ( 0x038[E-] ... ??? )
N004 (  5,  5) [000281] -----------                         *  JTRUE     void   $VN.Void
N003 (  3,  3) [000282] J------N---                         \--*  LT        int    $34c
N001 (  1,  1) [000283] -----------                            +--*  LCL_VAR   int    V04 loc2         u:8 $441
N002 (  1,  1) [000284] -----------                            \--*  CNS_INT   int    0 $c0

------------ BB31 [0035] [03C..03C) -> BB32(0),BB33(1) (cond), preds={BB30} succs={BB33,BB32}

***** BB31 [0035]
STMT00040 ( 0x03C[E-] ... ??? )
N010 (  6,  6) [000285] DA-XGO-----                         *  STORE_LCL_VAR int    V07 tmp2         d:3 <l:$3d9, c:$3d8>
N009 (  6,  6) [000286] ---XGO-N---                         \--*  COMMA     int    <l:$350, c:$34f>
N001 (  0,  0) [000287] -----------                            +--*  NOP       void  
N008 (  6,  6) [000290] ---XGO-----                            \--*  IND       int    <l:$34e, c:$34d>
N007 (  4,  5) [000291] ----GO-N---                               \--*  ADD       byref  <l:$284, c:$285>
N002 (  1,  1) [000292] -----------                                  +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N006 (  3,  4) [000293] -------N---                                  \--*  LSH       long   $404
N004 (  2,  3) [000294] ---------U-                                     +--*  CAST      long <- uint $403
N003 (  1,  1) [000295] -----------                                     |  \--*  LCL_VAR   int    V04 loc2         u:8 $441
N005 (  1,  1) [000296] -----------                                     \--*  CNS_INT   long   2 $242

***** BB31 [0035]
STMT00041 ( 0x03C[E-] ... ??? )
N007 ( 10, 17) [000297] ---X-------                         *  JTRUE     void   $3c1
N006 (  8, 15) [000298] J--X---N---                         \--*  NE        int    $342
N004 (  4,  4) [000300] #--X-------                            +--*  IND       long   $400
N003 (  2,  2) [000301] -------N---                            |  \--*  ADD       byref  $281
N001 (  1,  1) [000302] -----------                            |     +--*  LCL_VAR   ref    V01 arg1         u:1 $140
N002 (  1,  1) [000303] -----------                            |     \--*  CNS_INT   long   24 $241
N005 (  3, 10) [000299] H----------                            \--*  CNS_INT(h) long   0x7ffe3cd28d80 ftn $41

------------ BB32 [0036] [???..???) -> BB41(1) (always), preds={BB31} succs={BB41}

***** BB32 [0036]
STMT00042 ( 0x03C[E-] ... ??? )
N005 ( 17, 11) [000304] DACXG------                         *  STORE_LCL_VAR int    V06 tmp1         d:9 $VN.Void
N004 ( 17, 11) [000305] --CXG------                         \--*  CALL      int    System.Comparison`1[int]:Invoke(int,int):int:this $303
N001 (  1,  1) [000306] ----------- this rcx                   +--*  LCL_VAR   ref    V01 arg1         u:1 $140
N002 (  1,  1) [000307] ----------- arg1 rdx                   +--*  LCL_VAR   int    V03 loc1         u:2 <l:$2c1, c:$301>
N003 (  1,  1) [000308] ----------- arg2 r8                    \--*  LCL_VAR   int    V07 tmp2         u:3 (last use) <l:$2c2, c:$302>

------------ BB33 [0037] [03C..03D) -> BB34(0.3605734),BB37(0.6394266) (cond), preds={BB31} succs={BB37,BB34}

***** BB33 [0037]
STMT00043 ( INL01 @ 0x000[E-] ... ??? ) <- INLRT @ 0x03C[E-]
N008 (  7,  7) [000309] DA-XGO-----                         *  STORE_LCL_VAR ref    V09 tmp4         d:4 <l:$3e0, c:$3df>
N007 (  7,  7) [000310] ---XGO-----                         \--*  IND       ref    <l:$3de, c:$3dd>
N006 (  5,  5) [000311] ----GO-N---                            \--*  ADD       byref  <l:$287, c:$288>
N004 (  4,  4) [000312] n---GO-----                               +--*  IND       ref    <l:$480, c:$146>
N003 (  2,  2) [000313] -------N---                               |  \--*  ADD       byref  $286
N001 (  1,  1) [000314] -----------                               |     +--*  LCL_VAR   ref    V01 arg1         u:1 $140
N002 (  1,  1) [000315] -----------                               |     \--*  CNS_INT   long   8 $240
N005 (  1,  1) [000316] -----------                               \--*  CNS_INT   long   32 Fseq[_keys] $244

***** BB33 [0037]
STMT00044 ( INL01 @ 0x007[E-] ... ??? ) <- INLRT @ 0x03C[E-]
N019 ( 21, 23) [000317] DA-XGO-----                         *  STORE_LCL_VAR int    V12 tmp7         d:3 <l:$3ec, c:$3eb>
N018 ( 21, 23) [000318] -A-XGO-----                         \--*  COMMA     int    <l:$355, c:$354>
N007 ( 15, 16) [000319] -A-X-O-----                            +--*  BOUNDS_CHECK_Rng void   <l:$3ec, c:$3eb>
N001 (  1,  1) [000320] -----------                            |  +--*  LCL_VAR   int    V03 loc1         u:2 <l:$2c1, c:$301>
N006 ( 10,  8) [000660] -A-X-------                            |  \--*  COMMA     int    <l:$352, c:$351>
N004 (  7,  6) [000658] DA-X-------                            |     +--*  STORE_LCL_VAR int    V23 cse5         d:1 <l:$3e4, c:$3e3>
N003 (  3,  3) [000321] ---X-------                            |     |  \--*  ARR_LENGTH int    <l:$352, c:$351>
N002 (  1,  1) [000322] -----------                            |     |     \--*  LCL_VAR   ref    V09 tmp4         u:4 <l:$3da, c:$147>
N005 (  3,  2) [000659] -----------                            |     \--*  LCL_VAR   int    V23 cse5         u:1 <l:$304, c:$305>
N017 (  6,  7) [000323] n---GO-----                            \--*  IND       int    <l:$353, c:$306>
N016 (  3,  5) [000324] -----O-----                               \--*  ARR_ADDR  byref int[] $81
N015 (  3,  5) [000325] -------N---                                  \--*  ADD       byref  <l:$289, c:$28a>
N008 (  1,  1) [000326] -----------                                     +--*  LCL_VAR   ref    V09 tmp4         u:4 <l:$3da, c:$147>
N014 (  4,  5) [000327] -------N---                                     \--*  ADD       long   <l:$409, c:$40a>
N012 (  3,  4) [000328] -------N---                                        +--*  LSH       long   <l:$407, c:$408>
N010 (  2,  3) [000329] ---------U-                                        |  +--*  CAST      long <- uint <l:$405, c:$406>
N009 (  1,  1) [000330] -----------                                        |  |  \--*  LCL_VAR   int    V03 loc1         u:2 <l:$2c1, c:$301>
N011 (  1,  1) [000331] -------N---                                        |  \--*  CNS_INT   long   2 $242
N013 (  1,  1) [000332] -----------                                        \--*  CNS_INT   long   16 $245

***** BB33 [0037]
STMT00045 ( INL01 @ 0x007[E-] ... ??? ) <- INLRT @ 0x03C[E-]
N015 ( 14, 17) [000333] DA-XGO-----                         *  STORE_LCL_VAR int    V13 tmp8         d:3 <l:$3f4, c:$3f3>
N014 ( 14, 17) [000334] ---XGO-----                         \--*  COMMA     int    <l:$358, c:$357>
N003 (  8, 10) [000335] ---X-O-----                            +--*  BOUNDS_CHECK_Rng void   <l:$3f4, c:$3f3>
N001 (  1,  1) [000336] -----------                            |  +--*  LCL_VAR   int    V07 tmp2         u:3 <l:$2c2, c:$302>
N002 (  3,  2) [000661] -----------                            |  \--*  LCL_VAR   int    V23 cse5         u:1 <l:$304, c:$305>
N013 (  6,  7) [000339] n---GO-----                            \--*  IND       int    <l:$356, c:$307>
N012 (  3,  5) [000340] -----O-----                               \--*  ARR_ADDR  byref int[] $82
N011 (  3,  5) [000341] -------N---                                  \--*  ADD       byref  <l:$28b, c:$28c>
N004 (  1,  1) [000342] -----------                                     +--*  LCL_VAR   ref    V09 tmp4         u:4 (last use) <l:$3da, c:$147>
N010 (  4,  5) [000343] -------N---                                     \--*  ADD       long   <l:$410, c:$411>
N008 (  3,  4) [000344] -------N---                                        +--*  LSH       long   <l:$40e, c:$40f>
N006 (  2,  3) [000345] ---------U-                                        |  +--*  CAST      long <- uint <l:$40c, c:$40d>
N005 (  1,  1) [000346] -----------                                        |  |  \--*  LCL_VAR   int    V07 tmp2         u:3 <l:$2c2, c:$302>
N007 (  1,  1) [000347] -------N---                                        |  \--*  CNS_INT   long   2 $242
N009 (  1,  1) [000348] -----------                                        \--*  CNS_INT   long   16 $245

***** BB33 [0037]
STMT00046 ( INL04 @ 0x000[E-] ... ??? ) <- INL03 @ 0x010[E-] <- INL01 @ 0x007[E-] <- INLRT @ 0x03C[E-]
N004 (  5,  5) [000349] ----G------                         *  JTRUE     void   $VN.Void
N003 (  3,  3) [000350] J---G--N---                         \--*  GE        int    <l:$359, c:$35a>
N001 (  1,  1) [000351] -----------                            +--*  LCL_VAR   int    V12 tmp7         u:3 <l:$353, c:$306>
N002 (  1,  1) [000352] -----------                            \--*  LCL_VAR   int    V13 tmp8         u:3 <l:$356, c:$307>

------------ BB34 [0038] [03C..03D) -> BB35(0.0005740704),BB36(0.9994259) (cond), preds={BB33} succs={BB36,BB35}

***** BB34 [0038]
STMT00047 ( INL04 @ 0x007[E-] ... ??? ) <- INL03 @ 0x010[E-] <- INL01 @ 0x007[E-] <- INLRT @ 0x03C[E-]
N004 (  5,  5) [000353] ----G------                         *  JTRUE     void   $VN.Void
N003 (  3,  3) [000354] J---G--N---                         \--*  LE        int    <l:$35b, c:$35c>
N001 (  1,  1) [000355] -----------                            +--*  LCL_VAR   int    V12 tmp7         u:3 (last use) <l:$353, c:$306>
N002 (  1,  1) [000356] -----------                            \--*  LCL_VAR   int    V13 tmp8         u:3 (last use) <l:$356, c:$307>

------------ BB35 [0039] [03C..03D) -> BB38(1) (always), preds={BB34} succs={BB38}

***** BB35 [0039]
STMT00048 ( INL04 @ 0x00E[E-] ... ??? ) <- INL03 @ 0x010[E-] <- INL01 @ 0x007[E-] <- INLRT @ 0x03C[E-]
N002 (  1,  3) [000357] DA---------                         *  STORE_LCL_VAR int    V14 tmp9         d:9 $VN.Void
N001 (  1,  1) [000358] -----------                         \--*  CNS_INT   int    0 $c0

------------ BB36 [0040] [03C..03D) -> BB38(1) (always), preds={BB34} succs={BB38}

***** BB36 [0040]
STMT00049 ( INL04 @ 0x00C[E-] ... ??? ) <- INL03 @ 0x010[E-] <- INL01 @ 0x007[E-] <- INLRT @ 0x03C[E-]
N002 (  1,  3) [000359] DA---------                         *  STORE_LCL_VAR int    V14 tmp9         d:10 $VN.Void
N001 (  1,  1) [000360] -----------                         \--*  CNS_INT   int    1 $c1

------------ BB37 [0041] [03C..03D) -> BB38(1) (always), preds={BB33} succs={BB38}

***** BB37 [0041]
STMT00050 ( INL04 @ 0x005[E-] ... ??? ) <- INL03 @ 0x010[E-] <- INL01 @ 0x007[E-] <- INLRT @ 0x03C[E-]
N002 (  1,  3) [000361] DA---------                         *  STORE_LCL_VAR int    V14 tmp9         d:11 $VN.Void
N001 (  1,  1) [000362] -----------                         \--*  CNS_INT   int    -1 $c2

------------ BB38 [0042] [03C..03D) -> BB39(0.0002085071),BB40(0.9997915) (cond), preds={BB35,BB36,BB37} succs={BB40,BB39}

***** BB38 [0042]
STMT00094 ( ??? ... ??? )
N005 (  0,  0) [000602] DA---------                         *  STORE_LCL_VAR int    V14 tmp9         d:12 $VN.Void
N004 (  0,  0) [000601] -----------                         \--*  PHI       int    $442
N001 (  0,  0) [000628] ----------- pred BB37                  +--*  PHI_ARG   int    V14 tmp9         u:11 $c2
N002 (  0,  0) [000627] ----------- pred BB36                  +--*  PHI_ARG   int    V14 tmp9         u:10 $c1
N003 (  0,  0) [000626] ----------- pred BB35                  \--*  PHI_ARG   int    V14 tmp9         u:9 $c0

***** BB38 [0042]
STMT00052 ( INL01 @ 0x020[E-] ... ??? ) <- INLRT @ 0x03C[E-]
N004 (  5,  5) [000365] -----------                         *  JTRUE     void   $VN.Void
N003 (  3,  3) [000366] J------N---                         \--*  EQ        int    $35d
N001 (  1,  1) [000367] -----------                            +--*  LCL_VAR   int    V14 tmp9         u:12 $442
N002 (  1,  1) [000368] -----------                            \--*  CNS_INT   int    0 $c0

------------ BB39 [0043] [03C..03D) -> BB41(1) (always), preds={BB38} succs={BB41}

***** BB39 [0043]
STMT00053 ( INL01 @ 0x025[E-] ... ??? ) <- INLRT @ 0x03C[E-]
N004 (  3,  3) [000369] DA---------                         *  STORE_LCL_VAR int    V06 tmp1         d:10 $VN.Void
N003 (  3,  3) [000370] -----------                         \--*  SUB       int    <l:$35e, c:$35f>
N001 (  1,  1) [000371] -----------                            +--*  LCL_VAR   int    V03 loc1         u:2 <l:$2c1, c:$301>
N002 (  1,  1) [000372] -----------                            \--*  LCL_VAR   int    V07 tmp2         u:3 (last use) <l:$2c2, c:$302>

------------ BB40 [0044] [03C..03D) -> BB41(1) (always), preds={BB38} succs={BB41}

***** BB40 [0044]
STMT00054 ( INL01 @ 0x023[E-] ... ??? ) <- INLRT @ 0x03C[E-]
N002 (  1,  3) [000373] DA---------                         *  STORE_LCL_VAR int    V06 tmp1         d:11 $VN.Void
N001 (  1,  1) [000374] -----------                         \--*  LCL_VAR   int    V14 tmp9         u:12 (last use) $442

------------ BB41 [0045] [03C..053) -> BB42(0.7812769),BB43(0.2187231) (cond), preds={BB32,BB39,BB40} succs={BB43,BB42}

***** BB41 [0045]
STMT00093 ( ??? ... ??? )
N005 (  0,  0) [000600] DA---------                         *  STORE_LCL_VAR int    V06 tmp1         d:12 $VN.Void
N004 (  0,  0) [000599] -----------                         \--*  PHI       int    $443
N001 (  0,  0) [000630] ----------- pred BB40                  +--*  PHI_ARG   int    V06 tmp1         u:11 $442
N002 (  0,  0) [000629] ----------- pred BB39                  +--*  PHI_ARG   int    V06 tmp1         u:10 <l:$35e, c:$35f>
N003 (  0,  0) [000625] ----------- pred BB32                  \--*  PHI_ARG   int    V06 tmp1         u:9 $303

***** BB41 [0045]
STMT00055 ( 0x03C[E-] ... ??? )
N004 (  5,  5) [000375] -----------                         *  JTRUE     void   $VN.Void
N003 (  3,  3) [000376] J------N---                         \--*  LT        int    $360
N001 (  1,  1) [000377] -----------                            +--*  LCL_VAR   int    V06 tmp1         u:12 (last use) $443
N002 (  1,  1) [000378] -----------                            \--*  CNS_INT   int    0 $c0

------------ BB42 [0046] [018..038) -> BB30(1) (always), preds={BB41} succs={BB30}

***** BB42 [0046]
STMT00056 ( 0x018[E-] ... ??? )
N019 ( 22, 20) [000379] -A-XGO-----                         *  STOREIND  int    <l:$548, c:$545>
N011 ( 12, 11) [000380] -A--GO-N---                         +--*  COMMA     byref  <l:$290, c:$28f>
N004 (  7,  6) [000650] DA---------                         |  +--*  STORE_LCL_VAR int    V22 cse4         d:1 $VN.Void
N003 (  3,  3) [000382] -----------                         |  |  \--*  ADD       int    $361
N001 (  1,  1) [000383] -----------                         |  |     +--*  LCL_VAR   int    V04 loc2         u:8 $441
N002 (  1,  1) [000384] -----------                         |  |     \--*  CNS_INT   int    1 $c1
N010 (  6,  6) [000386] ----GO-N---                         |  \--*  ADD       byref  <l:$28d, c:$28e>
N005 (  1,  1) [000387] -----------                         |     +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N009 (  5,  5) [000388] -------N---                         |     \--*  LSH       long   $414
N007 (  4,  4) [000389] ---------U-                         |        +--*  CAST      long <- uint $413
N006 (  3,  2) [000656] -----------                         |        |  \--*  LCL_VAR   int    V22 cse4         u:1 $361
N008 (  1,  1) [000393] -----------                         |        \--*  CNS_INT   long   2 $242
N018 (  6,  6) [000398] ---XGO-N---                         \--*  IND       int    <l:$363, c:$362>
N017 (  4,  5) [000399] ----GO-N---                            \--*  ADD       byref  <l:$284, c:$285>
N012 (  1,  1) [000400] -----------                               +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N016 (  3,  4) [000401] -------N---                               \--*  LSH       long   $404
N014 (  2,  3) [000402] ---------U-                                  +--*  CAST      long <- uint $403
N013 (  1,  1) [000403] -----------                                  |  \--*  LCL_VAR   int    V04 loc2         u:8 $441
N015 (  1,  1) [000404] -----------                                  \--*  CNS_INT   long   2 $242

***** BB42 [0046]
STMT00057 ( 0x034[E-] ... ??? )
N004 (  3,  3) [000405] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:9 $VN.Void
N003 (  3,  3) [000406] -----------                         \--*  ADD       int    $366
N001 (  1,  1) [000407] -----------                            +--*  LCL_VAR   int    V04 loc2         u:8 (last use) $441
N002 (  1,  1) [000408] -----------                            \--*  CNS_INT   int    -1 $c2

------------ BB43 [0047] [053..067) -> BB28(1) (always), preds={BB30,BB41} succs={BB28}

***** BB43 [0047]
STMT00058 ( 0x053[E-] ... ??? )
N013 ( 17, 15) [000409] -A-XGO-----                         *  STOREIND  int    <l:$54c, c:$54a>
N011 ( 12, 11) [000410] -A--GO-N---                         +--*  COMMA     byref  <l:$290, c:$28f>
N004 (  7,  6) [000653] DA---------                         |  +--*  STORE_LCL_VAR int    V22 cse4         d:2 $VN.Void
N003 (  3,  3) [000412] -----------                         |  |  \--*  ADD       int    $361
N001 (  1,  1) [000413] -----------                         |  |     +--*  LCL_VAR   int    V04 loc2         u:8 $441
N002 (  1,  1) [000414] -----------                         |  |     \--*  CNS_INT   int    1 $c1
N010 (  6,  6) [000416] ----GO-N---                         |  \--*  ADD       byref  <l:$28d, c:$28e>
N005 (  1,  1) [000417] -----------                         |     +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N009 (  5,  5) [000418] -------N---                         |     \--*  LSH       long   $414
N007 (  4,  4) [000419] ---------U-                         |        +--*  CAST      long <- uint $413
N006 (  3,  2) [000657] -----------                         |        |  \--*  LCL_VAR   int    V22 cse4         u:2 $361
N008 (  1,  1) [000423] -----------                         |        \--*  CNS_INT   long   2 $242
N012 (  1,  1) [000424] -----------                         \--*  LCL_VAR   int    V03 loc1         u:2 (last use) <l:$2c1, c:$301>

***** BB43 [0047]
STMT00059 ( 0x063[E-] ... ??? )
N004 (  3,  3) [000425] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:5 $VN.Void
N003 (  3,  3) [000426] -----------                         \--*  ADD       int    $347
N001 (  1,  1) [000427] -----------                            +--*  LCL_VAR   int    V02 loc0         u:4 (last use) $440
N002 (  1,  1) [000428] -----------                            \--*  CNS_INT   int    1 $c1

------------ BB65 [0069] [073..???) -> BB08(1) (always), preds={BB07} succs={BB08}

------------ BB66 [0070] [073..???) -> BB08(1) (always), preds={BB28} succs={BB08}

------------ BB08 [0007] [073..074) (return), preds={BB65,BB66} succs={}

***** BB08 [0007]
STMT00011 ( 0x073[E-] ... 0x073 )
N001 (  0,  0) [000120] -----+-----                         *  RETURN    void   $VN.Void

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
Checking Profile Weights (flags:0x1c)
  BB45 - block weight 9960 inconsistent with incoming likely weight 9860.4
  BB26 - block weight 9960 inconsistent with incoming likely weight 9860.4
  BB62 - block weight 104341.6 inconsistent with incoming likely weight 103308.5
  BB48 - block weight 3909.629 inconsistent with incoming likely weight 4.547474e-13
  BB51 - block weight 3681.85 inconsistent with incoming likely weight 3909.629
  BB06 - block weight 103308.5 inconsistent with incoming likely weight 105957.2
  BB27 - block weight 99.6 inconsistent with incoming likely weight 199.2
Profile is NOT self-consistent, found 7 problems (59 profiled blocks, 0 unprofiled)

Texto modificado

Abrir archivo

*************** Starting PHASE Optimize index checks
Looking for array size assertions for: $300
ArrSize for lengthVN:300 = 0
[RangeCheck::GetRangeWorker] BB02 N006 (  4,  4) [000643] -A---------                         *  COMMA     int    $369
N004 (  3,  3) [000641] DA---------                         +--*  STORE_LCL_VAR int    V20 cse2         d:1 $VN.Void
N003 (  3,  3) [000013] -----+-----                         |  \--*  ADD       int    $369
N001 (  1,  1) [000011] -----+-----                         |     +--*  LCL_VAR   int    V02 loc0         u:2 $444
N002 (  1,  1) [000012] -----+-----                         |     \--*  CNS_INT   int    1 $c1
N005 (  1,  1) [000642] -----------                         \--*  LCL_VAR   int    V20 cse2         u:1 $369
{
   [RangeCheck::GetRangeWorker] BB02 N005 (  1,  1) [000642] -----------                         *  LCL_VAR   int    V20 cse2         u:1 $369
   {
----------------------------------------------------
N004 (  3,  3) [000641] DA---------                         *  STORE_LCL_VAR int    V20 cse2         d:1 $VN.Void
N003 (  3,  3) [000013] -----+-----                         \--*  ADD       int    $369
N001 (  1,  1) [000011] -----+-----                            +--*  LCL_VAR   int    V02 loc0         u:2 $444
N002 (  1,  1) [000012] -----+-----                            \--*  CNS_INT   int    1 $c1
----------------------------------------------------
      [RangeCheck::GetRangeWorker] BB02 N003 (  3,  3) [000013] -----+-----                         *  ADD       int    $369
N001 (  1,  1) [000011] -----+-----                         +--*  LCL_VAR   int    V02 loc0         u:2 $444
N002 (  1,  1) [000012] -----+-----                         \--*  CNS_INT   int    1 $c1
      {
         [RangeCheck::GetRangeWorker] BB02 N001 (  1,  1) [000011] -----+-----                         *  LCL_VAR   int    V02 loc0         u:2 $444
         {
----------------------------------------------------
N004 (  0,  0) [000580] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:2 $VN.Void
N003 (  0,  0) [000579] -----------                         \--*  PHI       int    $444
N001 (  0,  0) [000622] ----------- pred BB06                  +--*  PHI_ARG   int    V02 loc0         u:3
N002 (  0,  0) [000603] ----------- pred BB26                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0
----------------------------------------------------
            [RangeCheck::GetRangeWorker] BB07 N003 (  0,  0) [000579] -----------                         *  PHI       int    $444
N001 (  0,  0) [000622] ----------- pred BB06               +--*  PHI_ARG   int    V02 loc0         u:3
N002 (  0,  0) [000603] ----------- pred BB26               \--*  PHI_ARG   int    V02 loc0         u:1 $c0
            {
               [RangeCheck::GetRangeWorker] BB07 N001 (  0,  0) [000622] -----------                         *  PHI_ARG   int    V02 loc0         u:3
               {
----------------------------------------------------
N002 (  1,  3) [000059] DA---+-----                         *  STORE_LCL_VAR int    V02 loc0         d:3 $VN.Void
N001 (  1,  1) [000645] -----------                         \--*  LCL_VAR   int    V20 cse2         u:1 $369
----------------------------------------------------
                  [RangeCheck::GetRangeWorker] BB06 N001 (  1,  1) [000645] -----------                         *  LCL_VAR   int    V20 cse2         u:1 $369
                  {
----------------------------------------------------
N004 (  3,  3) [000641] DA---------                         *  STORE_LCL_VAR int    V20 cse2         d:1 $VN.Void
N003 (  3,  3) [000013] -----+-----                         \--*  ADD       int    $369
N001 (  1,  1) [000011] -----+-----                            +--*  LCL_VAR   int    V02 loc0         u:2 $444
N002 (  1,  1) [000012] -----+-----                            \--*  CNS_INT   int    1 $c1
----------------------------------------------------
                     [RangeCheck::GetRangeWorker] BB02 N003 (  3,  3) [000013] -----+-----                         *  ADD       int    $369
N001 (  1,  1) [000011] -----+-----                         +--*  LCL_VAR   int    V02 loc0         u:2 $444
N002 (  1,  1) [000012] -----+-----                         \--*  CNS_INT   int    1 $c1
                     {
Merging assertions from pred edges of BB02 for op [000011] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<Unknown, $300 + -2>] into [<Dependent, $300 + -2>]
                        [RangeCheck::GetRangeWorker] BB02 N002 (  1,  1) [000012] -----+-----                         *  CNS_INT   int    1 $c1
                        {
                           Computed Range [000012] => <1, 1>
                        }
Merging assertions from pred edges of BB02 for op [000012] $c1
BinOp add ranges <Dependent, $300 + -2> <1, 1> = <Dependent, $300 + -1>
                        Computed Range [000013] => <Dependent, $300 + -1>
                     }
Merge assertions from BB06: #02 #03 #27 for definition [000641]
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<Dependent, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
done merging
Merging assertions from pred edges of BB06 for op [000645] $369
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
                     Computed Range [000645] => <0, $300 + -1>
                  }
Merge assertions from BB07: #02 for definition [000059]
done merging
Merging assertions from pred edges of BB07 for op [000622] $ffffffff
Merge assertions created by BB06 for BB07
#02 #03 #26 #27
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
                  Computed Range [000622] => <0, $300 + -1>
               }
Merging assertions from pred edges of BB07 for op [000622] $ffffffff
Merge assertions created by BB06 for BB07
#02 #03 #26 #27
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Merging ranges <Undef, Undef> <0, $300 + -1>:<0, $300 + -1>
               [RangeCheck::GetRangeWorker] BB07 N002 (  0,  0) [000603] -----------                         *  PHI_ARG   int    V02 loc0         u:1 $c0
               {
                  Computed Range [000603] => <0, 0>
               }
Merging assertions from pred edges of BB07 for op [000603] $c0
Merge assertions created by BB26 for BB07
#02
Merging ranges <0, $300 + -1> <0, 0>:<0, Unknown>
               Computed Range [000579] => <0, Unknown>
            }
Merge assertions from BB02: #02 #27 for definition [000580]
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB02 for op [000011] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
            Computed Range [000011] => <0, $300 + -2>
         }
Merging assertions from pred edges of BB02 for op [000011] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
BinOp add ranges <0, $300 + -2> <1, 1> = <1, $300 + -1>
         Computed Range [000013] => <1, $300 + -1>
      }
Merge assertions from BB02: #02 #27 for definition [000641]
done merging
Merging assertions from pred edges of BB02 for op [000642] $369
      Computed Range [000642] => <1, $300 + -1>
   }
   Computed Range [000643] => <1, $300 + -1>
}
Does overflow [000643]?
Does overflow [000642]?
Merging assertions from pred edges of BB02 for op [000642] $369
Does overflow [000013]?
Does overflow [000011]?
Merging assertions from pred edges of BB02 for op [000011] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000579]?
Does overflow [000622]?
Merging assertions from pred edges of BB07 for op [000622] $ffffffff
Merge assertions created by BB06 for BB07
#02 #03 #26 #27
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Does overflow [000645]?
Merging assertions from pred edges of BB06 for op [000645] $369
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Does overflow [000013]?
Does overflow [000012]?
[000012] does not overflow
Checking bin op overflow ADD <0, $300 + -2> <1, 1>
[000013] does not overflow
[000645] does not overflow
[000622] does not overflow
Does overflow [000603]?
[000603] does not overflow
[000579] does not overflow
[000011] does not overflow
Checking bin op overflow ADD <0, $300 + -2> <1, 1>
[000013] does not overflow
[000642] does not overflow
[000643] does not overflow
Range value <1, $300 + -1>
[RangeCheck::Widen] BB02, 
[000643]
<1, $300 + -1> BetweenBounds <0, [000019]>
$300 upper bound is:  {MemOpaque:NotInLoop}
Array size is: 0
[RangeCheck::OptimizeRangeCheck] Between bounds
Before optRemoveRangeCheck:
N016 ( 15, 18) [000027] -A-XG+-----                         *  COMMA     int    <l:$36d, c:$36c>
N008 (  9, 12) [000020] -A-XG+-----                         +--*  BOUNDS_CHECK_Rng void   <l:$552, c:$551>
N006 (  4,  4) [000643] -A---------                         |  +--*  COMMA     int    $369
N004 (  3,  3) [000641] DA---------                         |  |  +--*  STORE_LCL_VAR int    V20 cse2         d:1 $VN.Void
N003 (  3,  3) [000013] -----+-----                         |  |  |  \--*  ADD       int    $369
N001 (  1,  1) [000011] -----+-----                         |  |  |     +--*  LCL_VAR   int    V02 loc0         u:2 $444
N002 (  1,  1) [000012] -----+-----                         |  |  |     \--*  CNS_INT   int    1 $c1
N005 (  1,  1) [000642] -----------                         |  |  \--*  LCL_VAR   int    V20 cse2         u:1 $369
N007 (  1,  1) [000019] -----+-----                         |  \--*  LCL_VAR   int    V16 tmp11        u:1 <l:$2c0, c:$300>
N015 (  6,  6) [000226] ---XG+-----                         \--*  IND       int    <l:$36b, c:$36a>
N014 (  4,  5) [000026] ----G+-N---                            \--*  ADD       byref  <l:$291, c:$292>
N009 (  1,  1) [000025] -----+-----                               +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N013 (  3,  4) [000023] -----+-N---                               \--*  LSH       long   $416
N011 (  2,  3) [000021] -----+---U-                                  +--*  CAST      long <- uint $415
N010 (  1,  1) [000644] -----------                                  |  \--*  LCL_VAR   int    V20 cse2         u:1 $369
N012 (  1,  1) [000022] -----+-----                                  \--*  CNS_INT   long   2 $242
After optRemoveRangeCheck for [000027]:
N017 ( 15, 18) [000029] DA-XG+-----                         *  STORE_LCL_VAR int    V03 loc1         d:1 <l:$558, c:$557>
N016 ( 15, 18) [000027] -A-XG+-N---                         \--*  COMMA     int    <l:$36d, c:$36c>
N004 (  3,  3) [000641] DA---------                            +--*  STORE_LCL_VAR int    V20 cse2         d:1 $VN.Void
N003 (  3,  3) [000013] -----+-----                            |  \--*  ADD       int    $369
N001 (  1,  1) [000011] -----+-----                            |     +--*  LCL_VAR   int    V02 loc0         u:2 $444
N002 (  1,  1) [000012] -----+-----                            |     \--*  CNS_INT   int    1 $c1
N015 (  6,  6) [000226] ---XG+-----                            \--*  IND       int    <l:$36b, c:$36a>
N014 (  4,  5) [000026] ----G+-N---                               \--*  ADD       byref  <l:$291, c:$292>
N009 (  1,  1) [000025] -----+-----                                  +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N013 (  3,  4) [000023] -----+-N---                                  \--*  LSH       long   $416
N011 (  2,  3) [000021] -----+---U-                                     +--*  CAST      long <- uint $415
N010 (  1,  1) [000644] -----------                                     |  \--*  LCL_VAR   int    V20 cse2         u:1 $369
N012 (  1,  1) [000022] -----+-----                                     \--*  CNS_INT   long   2 $242
Looking for array size assertions for: $300
ArrSize for lengthVN:300 = 0
[RangeCheck::GetRangeWorker] BB03 N006 (  4,  4) [000639] -A---------                         *  COMMA     int    $59e
N004 (  3,  3) [000637] DA---------                         +--*  STORE_LCL_VAR int    V19 cse1         d:1 $VN.Void
N003 (  3,  3) [000085] -----------                         |  \--*  ADD       int    $59e
N001 (  1,  1) [000083] -----------                         |     +--*  LCL_VAR   int    V04 loc2         u:2 $448
N002 (  1,  1) [000084] -----------                         |     \--*  CNS_INT   int    1 $c1
N005 (  1,  1) [000638] -----------                         \--*  LCL_VAR   int    V19 cse1         u:1 $59e
{
   [RangeCheck::GetRangeWorker] BB03 N005 (  1,  1) [000638] -----------                         *  LCL_VAR   int    V19 cse1         u:1 $59e
   {
----------------------------------------------------
N004 (  3,  3) [000637] DA---------                         *  STORE_LCL_VAR int    V19 cse1         d:1 $VN.Void
N003 (  3,  3) [000085] -----------                         \--*  ADD       int    $59e
N001 (  1,  1) [000083] -----------                            +--*  LCL_VAR   int    V04 loc2         u:2 $448
N002 (  1,  1) [000084] -----------                            \--*  CNS_INT   int    1 $c1
----------------------------------------------------
      [RangeCheck::GetRangeWorker] BB03 N003 (  3,  3) [000085] -----------                         *  ADD       int    $59e
N001 (  1,  1) [000083] -----------                         +--*  LCL_VAR   int    V04 loc2         u:2 $448
N002 (  1,  1) [000084] -----------                         \--*  CNS_INT   int    1 $c1
      {
         [RangeCheck::GetRangeWorker] BB03 N001 (  1,  1) [000083] -----------                         *  LCL_VAR   int    V04 loc2         u:2 $448
         {
----------------------------------------------------
N004 (  0,  0) [000582] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:2 $VN.Void
N003 (  0,  0) [000581] -----------                         \--*  PHI       int    $448
N001 (  0,  0) [000611] ----------- pred BB03                  +--*  PHI_ARG   int    V04 loc2         u:3
N002 (  0,  0) [000604] ----------- pred BB46                  \--*  PHI_ARG   int    V04 loc2         u:1 $444
----------------------------------------------------
            [RangeCheck::GetRangeWorker] BB04 N003 (  0,  0) [000581] -----------                         *  PHI       int    $448
N001 (  0,  0) [000611] ----------- pred BB03               +--*  PHI_ARG   int    V04 loc2         u:3
N002 (  0,  0) [000604] ----------- pred BB46               \--*  PHI_ARG   int    V04 loc2         u:1 $444
            {
               [RangeCheck::GetRangeWorker] BB04 N001 (  0,  0) [000611] -----------                         *  PHI_ARG   int    V04 loc2         u:3
               {
----------------------------------------------------
N004 (  3,  3) [000119] DA---+-----                         *  STORE_LCL_VAR int    V04 loc2         d:3 $VN.Void
N003 (  3,  3) [000118] -----+-----                         \--*  ADD       int    $5a3
N001 (  1,  1) [000116] -----+-----                            +--*  LCL_VAR   int    V04 loc2         u:2 (last use) $448
N002 (  1,  1) [000117] -----+-----                            \--*  CNS_INT   int    -1 $c2
----------------------------------------------------
                  [RangeCheck::GetRangeWorker] BB03 N003 (  3,  3) [000118] -----+-----                         *  ADD       int    $5a3
N001 (  1,  1) [000116] -----+-----                         +--*  LCL_VAR   int    V04 loc2         u:2 (last use) $448
N002 (  1,  1) [000117] -----+-----                         \--*  CNS_INT   int    -1 $c2
                  {
                     [RangeCheck::GetRangeWorker] BB03 N001 (  1,  1) [000116] -----+-----                         *  LCL_VAR   int    V04 loc2         u:2 (last use) $448
                     {
----------------------------------------------------
N004 (  0,  0) [000582] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:2 $VN.Void
N003 (  0,  0) [000581] -----------                         \--*  PHI       int    $448
N001 (  0,  0) [000611] ----------- pred BB03                  +--*  PHI_ARG   int    V04 loc2         u:3
N002 (  0,  0) [000604] ----------- pred BB46                  \--*  PHI_ARG   int    V04 loc2         u:1 $444
----------------------------------------------------
                        [RangeCheck::GetRangeWorker] BB04 N003 (  0,  0) [000581] -----------                         *  PHI       int    $448
N001 (  0,  0) [000611] ----------- pred BB03               +--*  PHI_ARG   int    V04 loc2         u:3
N002 (  0,  0) [000604] ----------- pred BB46               \--*  PHI_ARG   int    V04 loc2         u:1 $444
                        {
PhiArg [000611] is already being computed
Merging assertions from pred edges of BB04 for op [000611] $ffffffff
Merge assertions created by BB03 for BB04
#02 #03 #04 #05 #07 #08 #09 #10 #13 #27
Merging ranges <Undef, Undef> <Dependent, Dependent>:<Dependent, Dependent>
                           [RangeCheck::GetRangeWorker] BB04 N002 (  0,  0) [000604] -----------                         *  PHI_ARG   int    V04 loc2         u:1 $444
                           {
----------------------------------------------------
N002 (  1,  3) [000031] DA---+-----                         *  STORE_LCL_VAR int    V04 loc2         d:1 $VN.Void
N001 (  1,  1) [000030] -----+-----                         \--*  LCL_VAR   int    V02 loc0         u:2 $444
----------------------------------------------------
                              [RangeCheck::GetRangeWorker] BB02 N001 (  1,  1) [000030] -----+-----                         *  LCL_VAR   int    V02 loc0         u:2 $444
                              {
----------------------------------------------------
N004 (  0,  0) [000580] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:2 $VN.Void
N003 (  0,  0) [000579] -----------                         \--*  PHI       int    $444
N001 (  0,  0) [000622] ----------- pred BB06                  +--*  PHI_ARG   int    V02 loc0         u:3
N002 (  0,  0) [000603] ----------- pred BB26                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0
----------------------------------------------------
                                 [RangeCheck::GetRangeWorker] BB07 N003 (  0,  0) [000579] -----------                         *  PHI       int    $444
N001 (  0,  0) [000622] ----------- pred BB06               +--*  PHI_ARG   int    V02 loc0         u:3
N002 (  0,  0) [000603] ----------- pred BB26               \--*  PHI_ARG   int    V02 loc0         u:1 $c0
                                 {
                                    [RangeCheck::GetRangeWorker] BB07 N001 (  0,  0) [000622] -----------                         *  PHI_ARG   int    V02 loc0         u:3
                                    {
----------------------------------------------------
N002 (  1,  3) [000059] DA---+-----                         *  STORE_LCL_VAR int    V02 loc0         d:3 $VN.Void
N001 (  1,  1) [000645] -----------                         \--*  LCL_VAR   int    V20 cse2         u:1 $369
----------------------------------------------------
                                       [RangeCheck::GetRangeWorker] BB06 N001 (  1,  1) [000645] -----------                         *  LCL_VAR   int    V20 cse2         u:1 $369
                                       {
----------------------------------------------------
N004 (  3,  3) [000641] DA---------                         *  STORE_LCL_VAR int    V20 cse2         d:1 $VN.Void
N003 (  3,  3) [000013] -----+-----                         \--*  ADD       int    $369
N001 (  1,  1) [000011] -----+-----                            +--*  LCL_VAR   int    V02 loc0         u:2 $444
N002 (  1,  1) [000012] -----+-----                            \--*  CNS_INT   int    1 $c1
----------------------------------------------------
                                          [RangeCheck::GetRangeWorker] BB02 N003 (  3,  3) [000013] -----+-----                         *  ADD       int    $369
N001 (  1,  1) [000011] -----+-----                         +--*  LCL_VAR   int    V02 loc0         u:2 $444
N002 (  1,  1) [000012] -----+-----                         \--*  CNS_INT   int    1 $c1
                                          {
                                             [RangeCheck::GetRangeWorker] BB02 N001 (  1,  1) [000011] -----+-----                         *  LCL_VAR   int    V02 loc0         u:2 $444
                                             {
----------------------------------------------------
N004 (  0,  0) [000580] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:2 $VN.Void
N003 (  0,  0) [000579] -----------                         \--*  PHI       int    $444
N001 (  0,  0) [000622] ----------- pred BB06                  +--*  PHI_ARG   int    V02 loc0         u:3
N002 (  0,  0) [000603] ----------- pred BB26                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0
----------------------------------------------------
                                                [RangeCheck::GetRangeWorker] BB07 N003 (  0,  0) [000579] -----------                         *  PHI       int    $444
N001 (  0,  0) [000622] ----------- pred BB06               +--*  PHI_ARG   int    V02 loc0         u:3
N002 (  0,  0) [000603] ----------- pred BB26               \--*  PHI_ARG   int    V02 loc0         u:1 $c0
                                                {
PhiArg [000622] is already being computed
Merging assertions from pred edges of BB07 for op [000622] $ffffffff
Merge assertions created by BB06 for BB07
#02 #03 #26 #27
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Merging ranges <Undef, Undef> <0, $300 + -1>:<0, $300 + -1>
                                                   [RangeCheck::GetRangeWorker] BB07 N002 (  0,  0) [000603] -----------                         *  PHI_ARG   int    V02 loc0         u:1 $c0
                                                   {
                                                      Computed Range [000603] => <0, 0>
                                                   }
Merging assertions from pred edges of BB07 for op [000603] $c0
Merge assertions created by BB26 for BB07
#02
Merging ranges <0, $300 + -1> <0, 0>:<0, Unknown>
                                                   Computed Range [000579] => <0, Unknown>
                                                }
Merge assertions from BB02: #02 #27 for definition [000580]
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB02 for op [000011] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                                Computed Range [000011] => <0, $300 + -2>
                                             }
Merging assertions from pred edges of BB02 for op [000011] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                             [RangeCheck::GetRangeWorker] BB02 N002 (  1,  1) [000012] -----+-----                         *  CNS_INT   int    1 $c1
                                             {
                                                Computed Range [000012] => <1, 1>
                                             }
Merging assertions from pred edges of BB02 for op [000012] $c1
BinOp add ranges <0, $300 + -2> <1, 1> = <1, $300 + -1>
                                             Computed Range [000013] => <1, $300 + -1>
                                          }
Merge assertions from BB06: #02 #03 #27 for definition [000641]
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
done merging
Merging assertions from pred edges of BB06 for op [000645] $369
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
                                          Computed Range [000645] => <1, $300 + -1>
                                       }
Merge assertions from BB07: #02 for definition [000059]
done merging
Merging assertions from pred edges of BB07 for op [000622] $ffffffff
Merge assertions created by BB06 for BB07
#02 #03 #26 #27
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
                                       Computed Range [000622] => <1, $300 + -1>
                                    }
Merging assertions from pred edges of BB07 for op [000622] $ffffffff
Merge assertions created by BB06 for BB07
#02 #03 #26 #27
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
Merging ranges <Undef, Undef> <1, $300 + -1>:<1, $300 + -1>
                                    [RangeCheck::GetRangeWorker] BB07 N002 (  0,  0) [000603] -----------                         *  PHI_ARG   int    V02 loc0         u:1 $c0
                                    {
                                       Cached Range [000603] => <0, 0>
                                    }
Merging assertions from pred edges of BB07 for op [000603] $c0
Merge assertions created by BB26 for BB07
#02
Merging ranges <1, $300 + -1> <0, 0>:<0, Unknown>
                                    Computed Range [000579] => <0, Unknown>
                                 }
Merge assertions from BB02: #02 #27 for definition [000580]
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB02 for op [000030] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                 Computed Range [000030] => <0, $300 + -2>
                              }
Merge assertions from BB04: #02 #03 #27 for definition [000031]
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB04 for op [000604] $444
Merge assertions created by BB46 for BB04
#02 #03 #27
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                              Computed Range [000604] => <0, $300 + -2>
                           }
Merging assertions from pred edges of BB04 for op [000604] $444
Merge assertions created by BB46 for BB04
#02 #03 #27
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Merging ranges <Dependent, Dependent> <0, $300 + -2>:<Dependent, Dependent>
                           Computed Range [000581] => <Dependent, Dependent>
                        }
Merge assertions from BB03: #02 #03 #05 #07 #08 #09 #10 #13 #27 for definition [000582]
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
done merging
Merging assertions from pred edges of BB03 for op [000116] $448
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
                        Computed Range [000116] => <0, $300 + -1>
                     }
Merging assertions from pred edges of BB03 for op [000116] $448
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
                     [RangeCheck::GetRangeWorker] BB03 N002 (  1,  1) [000117] -----+-----                         *  CNS_INT   int    -1 $c2
                     {
                        Computed Range [000117] => <-1, -1>
                     }
Merging assertions from pred edges of BB03 for op [000117] $c2
BinOp add ranges <0, $300 + -1> <-1, -1> = <-1, $300 + -2>
                     Computed Range [000118] => <-1, $300 + -2>
                  }
Merge assertions from BB04: #02 #03 #27 for definition [000119]
done merging
Merging assertions from pred edges of BB04 for op [000611] $ffffffff
Merge assertions created by BB03 for BB04
#02 #03 #04 #05 #07 #08 #09 #10 #13 #27
                  Computed Range [000611] => <-1, $300 + -2>
               }
Merging assertions from pred edges of BB04 for op [000611] $ffffffff
Merge assertions created by BB03 for BB04
#02 #03 #04 #05 #07 #08 #09 #10 #13 #27
Merging ranges <Undef, Undef> <-1, $300 + -2>:<-1, $300 + -2>
               [RangeCheck::GetRangeWorker] BB04 N002 (  0,  0) [000604] -----------                         *  PHI_ARG   int    V04 loc2         u:1 $444
               {
                  Cached Range [000604] => <0, $300 + -2>
               }
Merging assertions from pred edges of BB04 for op [000604] $444
Merge assertions created by BB46 for BB04
#02 #03 #27
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Merging ranges <-1, $300 + -2> <0, $300 + -2>:<-1, $300 + -2>
               Computed Range [000581] => <-1, $300 + -2>
            }
Merge assertions from BB03: #02 #03 #05 #07 #08 #09 #10 #13 #27 for definition [000582]
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<-1, $300 + -2>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -2>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB03 for op [000083] $448
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -2>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -2>]
            Computed Range [000083] => <0, $300 + -2>
         }
Merging assertions from pred edges of BB03 for op [000083] $448
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -2>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -2>]
         [RangeCheck::GetRangeWorker] BB03 N002 (  1,  1) [000084] -----------                         *  CNS_INT   int    1 $c1
         {
            Computed Range [000084] => <1, 1>
         }
Merging assertions from pred edges of BB03 for op [000084] $c1
BinOp add ranges <0, $300 + -2> <1, 1> = <1, $300 + -1>
         Computed Range [000085] => <1, $300 + -1>
      }
Merge assertions from BB03: #02 #03 #05 #07 #08 #09 #10 #13 #27 for definition [000637]
done merging
Merging assertions from pred edges of BB03 for op [000638] $59e
      Computed Range [000638] => <1, $300 + -1>
   }
   Computed Range [000639] => <1, $300 + -1>
}
Does overflow [000639]?
Does overflow [000638]?
Merging assertions from pred edges of BB03 for op [000638] $59e
Does overflow [000085]?
Does overflow [000083]?
Merging assertions from pred edges of BB03 for op [000083] $448
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Does overflow [000581]?
Does overflow [000611]?
Merging assertions from pred edges of BB04 for op [000611] $ffffffff
Merge assertions created by BB03 for BB04
#02 #03 #04 #05 #07 #08 #09 #10 #13 #27
Does overflow [000118]?
Does overflow [000116]?
Merging assertions from pred edges of BB03 for op [000116] $448
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Does overflow [000581]?
Does overflow [000604]?
Merging assertions from pred edges of BB04 for op [000604] $444
Merge assertions created by BB46 for BB04
#02 #03 #27
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000030]?
Merging assertions from pred edges of BB02 for op [000030] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000579]?
Does overflow [000622]?
Merging assertions from pred edges of BB07 for op [000622] $ffffffff
Merge assertions created by BB06 for BB07
#02 #03 #26 #27
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Does overflow [000645]?
Merging assertions from pred edges of BB06 for op [000645] $369
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Does overflow [000013]?
Does overflow [000011]?
Merging assertions from pred edges of BB02 for op [000011] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000579]?
Does overflow [000603]?
[000603] does not overflow
[000579] does not overflow
[000011] does not overflow
Does overflow [000012]?
[000012] does not overflow
Checking bin op overflow ADD <0, $300 + -2> <1, 1>
[000013] does not overflow
[000645] does not overflow
[000622] does not overflow
[000579] does not overflow
[000030] does not overflow
[000604] does not overflow
[000581] does not overflow
[000116] does not overflow
Does overflow [000117]?
[000117] does not overflow
Checking bin op overflow ADD <0, $300 + -1> <-1, -1>
[000118] does not overflow
[000611] does not overflow
[000581] does not overflow
[000083] does not overflow
Does overflow [000084]?
[000084] does not overflow
Checking bin op overflow ADD <0, $300 + -2> <1, 1>
[000085] does not overflow
[000638] does not overflow
[000639] does not overflow
Range value <1, $300 + -1>
[RangeCheck::Widen] BB03, 
[000639]
<1, $300 + -1> BetweenBounds <0, [000091]>
$300 upper bound is:  {MemOpaque:NotInLoop}
Array size is: 0
[RangeCheck::OptimizeRangeCheck] Between bounds
Before optRemoveRangeCheck:
N015 ( 12, 16) [000099] -A-XGO-----                         *  COMMA     byref  <l:$2aa, c:$2a9>
N008 (  9, 12) [000092] -A-XGO-----                         +--*  BOUNDS_CHECK_Rng void   <l:$600, c:$5ff>
N006 (  4,  4) [000639] -A---------                         |  +--*  COMMA     int    $59e
N004 (  3,  3) [000637] DA---------                         |  |  +--*  STORE_LCL_VAR int    V19 cse1         d:1 $VN.Void
N003 (  3,  3) [000085] -----------                         |  |  |  \--*  ADD       int    $59e
N001 (  1,  1) [000083] -----------                         |  |  |     +--*  LCL_VAR   int    V04 loc2         u:2 $448
N002 (  1,  1) [000084] -----------                         |  |  |     \--*  CNS_INT   int    1 $c1
N005 (  1,  1) [000638] -----------                         |  |  \--*  LCL_VAR   int    V19 cse1         u:1 $59e
N007 (  1,  1) [000091] -----------                         |  \--*  LCL_VAR   int    V16 tmp11        u:1 <l:$2c0, c:$300>
N014 (  4,  5) [000098] ----GO-N---                         \--*  ADD       byref  <l:$2a7, c:$2a8>
N009 (  1,  1) [000097] -----------                            +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N013 (  3,  4) [000095] -------N---                            \--*  LSH       long   $433
N011 (  2,  3) [000093] ---------U-                               +--*  CAST      long <- uint $432
N010 (  1,  1) [000640] -----------                               |  \--*  LCL_VAR   int    V19 cse1         u:1 $59e
N012 (  1,  1) [000094] -----------                               \--*  CNS_INT   long   2 $242
After optRemoveRangeCheck for [000099]:
N023 ( 22, 25) [000115] -A-XGO-----                         *  STOREIND  int    <l:$60e, c:$60b>
N015 ( 12, 16) [000099] -A--GO-N---                         +--*  COMMA     byref  <l:$2aa, c:$2a9>
N004 (  3,  3) [000637] DA---------                         |  +--*  STORE_LCL_VAR int    V19 cse1         d:1 $VN.Void
N003 (  3,  3) [000085] -----------                         |  |  \--*  ADD       int    $59e
N001 (  1,  1) [000083] -----------                         |  |     +--*  LCL_VAR   int    V04 loc2         u:2 $448
N002 (  1,  1) [000084] -----------                         |  |     \--*  CNS_INT   int    1 $c1
N014 (  4,  5) [000098] ----GO-N---                         |  \--*  ADD       byref  <l:$2a7, c:$2a8>
N009 (  1,  1) [000097] -----------                         |     +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N013 (  3,  4) [000095] -------N---                         |     \--*  LSH       long   $433
N011 (  2,  3) [000093] ---------U-                         |        +--*  CAST      long <- uint $432
N010 (  1,  1) [000640] -----------                         |        |  \--*  LCL_VAR   int    V19 cse1         u:1 $59e
N012 (  1,  1) [000094] -----------                         |        \--*  CNS_INT   long   2 $242
N022 (  6,  6) [000256] ---XGO-N---                         \--*  IND       int    <l:$5a0, c:$59f>
N021 (  4,  5) [000112] ----GO-N---                            \--*  ADD       byref  <l:$29f, c:$2a0>
N016 (  1,  1) [000111] -----------                               +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N020 (  3,  4) [000109] -------N---                               \--*  LSH       long   $42a
N018 (  2,  3) [000107] ---------U-                                  +--*  CAST      long <- uint $429
N017 (  1,  1) [000102] -----------                                  |  \--*  LCL_VAR   int    V04 loc2         u:2 $448
N019 (  1,  1) [000108] -----------                                  \--*  CNS_INT   long   2 $242
Looking for array size assertions for: $300
ArrSize for lengthVN:300 = 0
[RangeCheck::GetRangeWorker] BB05 N001 (  1,  1) [000063] -----+-----                         *  LCL_VAR   int    V04 loc2         u:2 $448
{
----------------------------------------------------
N004 (  0,  0) [000582] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:2 $VN.Void
N003 (  0,  0) [000581] -----------                         \--*  PHI       int    $448
N001 (  0,  0) [000611] ----------- pred BB03                  +--*  PHI_ARG   int    V04 loc2         u:3
N002 (  0,  0) [000604] ----------- pred BB46                  \--*  PHI_ARG   int    V04 loc2         u:1 $444
----------------------------------------------------
   [RangeCheck::GetRangeWorker] BB04 N003 (  0,  0) [000581] -----------                         *  PHI       int    $448
N001 (  0,  0) [000611] ----------- pred BB03               +--*  PHI_ARG   int    V04 loc2         u:3
N002 (  0,  0) [000604] ----------- pred BB46               \--*  PHI_ARG   int    V04 loc2         u:1 $444
   {
      [RangeCheck::GetRangeWorker] BB04 N001 (  0,  0) [000611] -----------                         *  PHI_ARG   int    V04 loc2         u:3
      {
----------------------------------------------------
N004 (  3,  3) [000119] DA---+-----                         *  STORE_LCL_VAR int    V04 loc2         d:3 $VN.Void
N003 (  3,  3) [000118] -----+-----                         \--*  ADD       int    $5a3
N001 (  1,  1) [000116] -----+-----                            +--*  LCL_VAR   int    V04 loc2         u:2 (last use) $448
N002 (  1,  1) [000117] -----+-----                            \--*  CNS_INT   int    -1 $c2
----------------------------------------------------
         [RangeCheck::GetRangeWorker] BB03 N003 (  3,  3) [000118] -----+-----                         *  ADD       int    $5a3
N001 (  1,  1) [000116] -----+-----                         +--*  LCL_VAR   int    V04 loc2         u:2 (last use) $448
N002 (  1,  1) [000117] -----+-----                         \--*  CNS_INT   int    -1 $c2
         {
            [RangeCheck::GetRangeWorker] BB03 N001 (  1,  1) [000116] -----+-----                         *  LCL_VAR   int    V04 loc2         u:2 (last use) $448
            {
----------------------------------------------------
N004 (  0,  0) [000582] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:2 $VN.Void
N003 (  0,  0) [000581] -----------                         \--*  PHI       int    $448
N001 (  0,  0) [000611] ----------- pred BB03                  +--*  PHI_ARG   int    V04 loc2         u:3
N002 (  0,  0) [000604] ----------- pred BB46                  \--*  PHI_ARG   int    V04 loc2         u:1 $444
----------------------------------------------------
               [RangeCheck::GetRangeWorker] BB04 N003 (  0,  0) [000581] -----------                         *  PHI       int    $448
N001 (  0,  0) [000611] ----------- pred BB03               +--*  PHI_ARG   int    V04 loc2         u:3
N002 (  0,  0) [000604] ----------- pred BB46               \--*  PHI_ARG   int    V04 loc2         u:1 $444
               {
PhiArg [000611] is already being computed
Merging assertions from pred edges of BB04 for op [000611] $ffffffff
Merge assertions created by BB03 for BB04
#02 #03 #04 #05 #07 #08 #09 #10 #13 #27
Merging ranges <Undef, Undef> <Dependent, Dependent>:<Dependent, Dependent>
                  [RangeCheck::GetRangeWorker] BB04 N002 (  0,  0) [000604] -----------                         *  PHI_ARG   int    V04 loc2         u:1 $444
                  {
----------------------------------------------------
N002 (  1,  3) [000031] DA---+-----                         *  STORE_LCL_VAR int    V04 loc2         d:1 $VN.Void
N001 (  1,  1) [000030] -----+-----                         \--*  LCL_VAR   int    V02 loc0         u:2 $444
----------------------------------------------------
                     [RangeCheck::GetRangeWorker] BB02 N001 (  1,  1) [000030] -----+-----                         *  LCL_VAR   int    V02 loc0         u:2 $444
                     {
----------------------------------------------------
N004 (  0,  0) [000580] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:2 $VN.Void
N003 (  0,  0) [000579] -----------                         \--*  PHI       int    $444
N001 (  0,  0) [000622] ----------- pred BB06                  +--*  PHI_ARG   int    V02 loc0         u:3
N002 (  0,  0) [000603] ----------- pred BB26                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0
----------------------------------------------------
                        [RangeCheck::GetRangeWorker] BB07 N003 (  0,  0) [000579] -----------                         *  PHI       int    $444
N001 (  0,  0) [000622] ----------- pred BB06               +--*  PHI_ARG   int    V02 loc0         u:3
N002 (  0,  0) [000603] ----------- pred BB26               \--*  PHI_ARG   int    V02 loc0         u:1 $c0
                        {
                           [RangeCheck::GetRangeWorker] BB07 N001 (  0,  0) [000622] -----------                         *  PHI_ARG   int    V02 loc0         u:3
                           {
----------------------------------------------------
N002 (  1,  3) [000059] DA---+-----                         *  STORE_LCL_VAR int    V02 loc0         d:3 $VN.Void
N001 (  1,  1) [000645] -----------                         \--*  LCL_VAR   int    V20 cse2         u:1 $369
----------------------------------------------------
                              [RangeCheck::GetRangeWorker] BB06 N001 (  1,  1) [000645] -----------                         *  LCL_VAR   int    V20 cse2         u:1 $369
                              {
----------------------------------------------------
N004 (  3,  3) [000641] DA---------                         *  STORE_LCL_VAR int    V20 cse2         d:1 $VN.Void
N003 (  3,  3) [000013] -----+-----                         \--*  ADD       int    $369
N001 (  1,  1) [000011] -----+-----                            +--*  LCL_VAR   int    V02 loc0         u:2 $444
N002 (  1,  1) [000012] -----+-----                            \--*  CNS_INT   int    1 $c1
----------------------------------------------------
                                 [RangeCheck::GetRangeWorker] BB02 N003 (  3,  3) [000013] -----+-----                         *  ADD       int    $369
N001 (  1,  1) [000011] -----+-----                         +--*  LCL_VAR   int    V02 loc0         u:2 $444
N002 (  1,  1) [000012] -----+-----                         \--*  CNS_INT   int    1 $c1
                                 {
                                    [RangeCheck::GetRangeWorker] BB02 N001 (  1,  1) [000011] -----+-----                         *  LCL_VAR   int    V02 loc0         u:2 $444
                                    {
----------------------------------------------------
N004 (  0,  0) [000580] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:2 $VN.Void
N003 (  0,  0) [000579] -----------                         \--*  PHI       int    $444
N001 (  0,  0) [000622] ----------- pred BB06                  +--*  PHI_ARG   int    V02 loc0         u:3
N002 (  0,  0) [000603] ----------- pred BB26                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0
----------------------------------------------------
                                       [RangeCheck::GetRangeWorker] BB07 N003 (  0,  0) [000579] -----------                         *  PHI       int    $444
N001 (  0,  0) [000622] ----------- pred BB06               +--*  PHI_ARG   int    V02 loc0         u:3
N002 (  0,  0) [000603] ----------- pred BB26               \--*  PHI_ARG   int    V02 loc0         u:1 $c0
                                       {
PhiArg [000622] is already being computed
Merging assertions from pred edges of BB07 for op [000622] $ffffffff
Merge assertions created by BB06 for BB07
#02 #03 #26 #27
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Merging ranges <Undef, Undef> <0, $300 + -1>:<0, $300 + -1>
                                          [RangeCheck::GetRangeWorker] BB07 N002 (  0,  0) [000603] -----------                         *  PHI_ARG   int    V02 loc0         u:1 $c0
                                          {
                                             Computed Range [000603] => <0, 0>
                                          }
Merging assertions from pred edges of BB07 for op [000603] $c0
Merge assertions created by BB26 for BB07
#02
Merging ranges <0, $300 + -1> <0, 0>:<0, Unknown>
                                          Computed Range [000579] => <0, Unknown>
                                       }
Merge assertions from BB02: #02 #27 for definition [000580]
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB02 for op [000011] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                       Computed Range [000011] => <0, $300 + -2>
                                    }
Merging assertions from pred edges of BB02 for op [000011] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                    [RangeCheck::GetRangeWorker] BB02 N002 (  1,  1) [000012] -----+-----                         *  CNS_INT   int    1 $c1
                                    {
                                       Computed Range [000012] => <1, 1>
                                    }
Merging assertions from pred edges of BB02 for op [000012] $c1
BinOp add ranges <0, $300 + -2> <1, 1> = <1, $300 + -1>
                                    Computed Range [000013] => <1, $300 + -1>
                                 }
Merge assertions from BB06: #02 #03 #27 for definition [000641]
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
done merging
Merging assertions from pred edges of BB06 for op [000645] $369
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
                                 Computed Range [000645] => <1, $300 + -1>
                              }
Merge assertions from BB07: #02 for definition [000059]
done merging
Merging assertions from pred edges of BB07 for op [000622] $ffffffff
Merge assertions created by BB06 for BB07
#02 #03 #26 #27
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
                              Computed Range [000622] => <1, $300 + -1>
                           }
Merging assertions from pred edges of BB07 for op [000622] $ffffffff
Merge assertions created by BB06 for BB07
#02 #03 #26 #27
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
Merging ranges <Undef, Undef> <1, $300 + -1>:<1, $300 + -1>
                           [RangeCheck::GetRangeWorker] BB07 N002 (  0,  0) [000603] -----------                         *  PHI_ARG   int    V02 loc0         u:1 $c0
                           {
                              Cached Range [000603] => <0, 0>
                           }
Merging assertions from pred edges of BB07 for op [000603] $c0
Merge assertions created by BB26 for BB07
#02
Merging ranges <1, $300 + -1> <0, 0>:<0, Unknown>
                           Computed Range [000579] => <0, Unknown>
                        }
Merge assertions from BB02: #02 #27 for definition [000580]
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB02 for op [000030] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                        Computed Range [000030] => <0, $300 + -2>
                     }
Merge assertions from BB04: #02 #03 #27 for definition [000031]
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB04 for op [000604] $444
Merge assertions created by BB46 for BB04
#02 #03 #27
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                     Computed Range [000604] => <0, $300 + -2>
                  }
Merging assertions from pred edges of BB04 for op [000604] $444
Merge assertions created by BB46 for BB04
#02 #03 #27
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Merging ranges <Dependent, Dependent> <0, $300 + -2>:<Dependent, Dependent>
                  Computed Range [000581] => <Dependent, Dependent>
               }
Merge assertions from BB03: #02 #03 #05 #07 #08 #09 #10 #13 #27 for definition [000582]
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
done merging
Merging assertions from pred edges of BB03 for op [000116] $448
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
               Computed Range [000116] => <0, $300 + -1>
            }
Merging assertions from pred edges of BB03 for op [000116] $448
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
            [RangeCheck::GetRangeWorker] BB03 N002 (  1,  1) [000117] -----+-----                         *  CNS_INT   int    -1 $c2
            {
               Computed Range [000117] => <-1, -1>
            }
Merging assertions from pred edges of BB03 for op [000117] $c2
BinOp add ranges <0, $300 + -1> <-1, -1> = <-1, $300 + -2>
            Computed Range [000118] => <-1, $300 + -2>
         }
Merge assertions from BB04: #02 #03 #27 for definition [000119]
done merging
Merging assertions from pred edges of BB04 for op [000611] $ffffffff
Merge assertions created by BB03 for BB04
#02 #03 #04 #05 #07 #08 #09 #10 #13 #27
         Computed Range [000611] => <-1, $300 + -2>
      }
Merging assertions from pred edges of BB04 for op [000611] $ffffffff
Merge assertions created by BB03 for BB04
#02 #03 #04 #05 #07 #08 #09 #10 #13 #27
Merging ranges <Undef, Undef> <-1, $300 + -2>:<-1, $300 + -2>
      [RangeCheck::GetRangeWorker] BB04 N002 (  0,  0) [000604] -----------                         *  PHI_ARG   int    V04 loc2         u:1 $444
      {
         Cached Range [000604] => <0, $300 + -2>
      }
Merging assertions from pred edges of BB04 for op [000604] $444
Merge assertions created by BB46 for BB04
#02 #03 #27
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Merging ranges <-1, $300 + -2> <0, $300 + -2>:<-1, $300 + -2>
      Computed Range [000581] => <-1, $300 + -2>
   }
Merge assertions from BB05: #02 #03 #07 #27 for definition [000582]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<-1, $300 + -2>] with assertedRange: [<0, Unknown>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB05 for op [000063] $448
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<0, Unknown>] into [<0, $300 + -2>]
   Computed Range [000063] => <0, $300 + -2>
}
Does overflow [000063]?
Merging assertions from pred edges of BB05 for op [000063] $448
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, Unknown>] into [<0, Unknown>]
Does overflow [000581]?
Does overflow [000611]?
Merging assertions from pred edges of BB04 for op [000611] $ffffffff
Merge assertions created by BB03 for BB04
#02 #03 #04 #05 #07 #08 #09 #10 #13 #27
Does overflow [000118]?
Does overflow [000116]?
Merging assertions from pred edges of BB03 for op [000116] $448
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Does overflow [000581]?
Does overflow [000604]?
Merging assertions from pred edges of BB04 for op [000604] $444
Merge assertions created by BB46 for BB04
#02 #03 #27
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000030]?
Merging assertions from pred edges of BB02 for op [000030] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000579]?
Does overflow [000622]?
Merging assertions from pred edges of BB07 for op [000622] $ffffffff
Merge assertions created by BB06 for BB07
#02 #03 #26 #27
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Does overflow [000645]?
Merging assertions from pred edges of BB06 for op [000645] $369
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Does overflow [000013]?
Does overflow [000011]?
Merging assertions from pred edges of BB02 for op [000011] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000579]?
Does overflow [000603]?
[000603] does not overflow
[000579] does not overflow
[000011] does not overflow
Does overflow [000012]?
[000012] does not overflow
Checking bin op overflow ADD <0, $300 + -2> <1, 1>
[000013] does not overflow
[000645] does not overflow
[000622] does not overflow
[000579] does not overflow
[000030] does not overflow
[000604] does not overflow
[000581] does not overflow
[000116] does not overflow
Does overflow [000117]?
[000117] does not overflow
Checking bin op overflow ADD <0, $300 + -1> <-1, -1>
[000118] does not overflow
[000611] does not overflow
[000581] does not overflow
[000063] does not overflow
Range value <0, $300 + -2>
[RangeCheck::Widen] BB05, 
[000063]
<0, $300 + -2> BetweenBounds <0, [000067]>
$300 upper bound is:  {MemOpaque:NotInLoop}
Array size is: 0
[RangeCheck::OptimizeRangeCheck] Between bounds
Before optRemoveRangeCheck:
N011 ( 12, 15) [000075] ---XG+-----                         *  COMMA     int    <l:$58d, c:$58c>
N003 (  6,  9) [000068] ---XG+-----                         +--*  BOUNDS_CHECK_Rng void   <l:$5d9, c:$5d8>
N001 (  1,  1) [000063] -----+-----                         |  +--*  LCL_VAR   int    V04 loc2         u:2 $448
N002 (  1,  1) [000067] -----+-----                         |  \--*  LCL_VAR   int    V16 tmp11        u:1 <l:$2c0, c:$300>
N010 (  6,  6) [000227] ---XG+-----                         \--*  IND       int    <l:$58b, c:$58a>
N009 (  4,  5) [000074] ----G+-N---                            \--*  ADD       byref  <l:$29f, c:$2a0>
N004 (  1,  1) [000073] -----+-----                               +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N008 (  3,  4) [000071] -----+-N---                               \--*  LSH       long   $42a
N006 (  2,  3) [000069] -----+---U-                                  +--*  CAST      long <- uint $429
N005 (  1,  1) [000064] -----+-----                                  |  \--*  LCL_VAR   int    V04 loc2         u:2 $448
N007 (  1,  1) [000070] -----+-----                                  \--*  CNS_INT   long   2 $242
After optRemoveRangeCheck for [000075]:
N012 ( 12, 15) [000122] DA-XG+-----                         *  STORE_LCL_VAR int    V07 tmp2         d:1 <l:$5df, c:$5de>
N011 ( 12, 15) [000075] ---XG+-N---                         \--*  COMMA     int    <l:$58d, c:$58c>
N003 (  6,  9) [000068] -----+-----                            +--*  NOP       void  
N010 (  6,  6) [000227] ---XG+-----                            \--*  IND       int    <l:$58b, c:$58a>
N009 (  4,  5) [000074] ----G+-N---                               \--*  ADD       byref  <l:$29f, c:$2a0>
N004 (  1,  1) [000073] -----+-----                                  +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N008 (  3,  4) [000071] -----+-N---                                  \--*  LSH       long   $42a
N006 (  2,  3) [000069] -----+---U-                                     +--*  CAST      long <- uint $429
N005 (  1,  1) [000064] -----+-----                                     |  \--*  LCL_VAR   int    V04 loc2         u:2 $448
N007 (  1,  1) [000070] -----+-----                                     \--*  CNS_INT   long   2 $242
Looking for array size assertions for: $314
ArrSize for lengthVN:314 = 0
[RangeCheck::GetRangeWorker] BB10 N001 (  1,  1) [000138] -----+-----                         *  LCL_VAR   int    V03 loc1         u:1 <l:$2c4, c:$309>
{
----------------------------------------------------
N013 (  9,  9) [000029] DA-XG+-----                         *  STORE_LCL_VAR int    V03 loc1         d:1 <l:$558, c:$557>
N012 (  9,  9) [000027] -A-XG+-N---                         \--*  COMMA     int    <l:$36d, c:$36c>
N004 (  3,  3) [000641] DA---------                            +--*  STORE_LCL_VAR int    V20 cse2         d:1 $VN.Void
N003 (  3,  3) [000013] -----+-----                            |  \--*  ADD       int    $369
N001 (  1,  1) [000011] -----+-----                            |     +--*  LCL_VAR   int    V02 loc0         u:2 $444
N002 (  1,  1) [000012] -----+-----                            |     \--*  CNS_INT   int    1 $c1
N011 (  6,  6) [000226] ---XG+-----                            \--*  IND       int    <l:$36b, c:$36a>
N010 (  4,  5) [000026] ----G+-N---                               \--*  ADD       byref  <l:$291, c:$292>
N005 (  1,  1) [000025] -----+-----                                  +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N009 (  3,  4) [000023] -----+-N---                                  \--*  LSH       long   $416
N007 (  2,  3) [000021] -----+---U-                                     +--*  CAST      long <- uint $415
N006 (  1,  1) [000644] -----------                                     |  \--*  LCL_VAR   int    V20 cse2         u:1 $369
N008 (  1,  1) [000022] -----+-----                                     \--*  CNS_INT   long   2 $242
----------------------------------------------------
   [RangeCheck::GetRangeWorker] BB02 N012 (  9,  9) [000027] -A-XG+-N---                         *  COMMA     int    <l:$36d, c:$36c>
N004 (  3,  3) [000641] DA---------                         +--*  STORE_LCL_VAR int    V20 cse2         d:1 $VN.Void
N003 (  3,  3) [000013] -----+-----                         |  \--*  ADD       int    $369
N001 (  1,  1) [000011] -----+-----                         |     +--*  LCL_VAR   int    V02 loc0         u:2 $444
N002 (  1,  1) [000012] -----+-----                         |     \--*  CNS_INT   int    1 $c1
N011 (  6,  6) [000226] ---XG+-----                         \--*  IND       int    <l:$36b, c:$36a>
N010 (  4,  5) [000026] ----G+-N---                            \--*  ADD       byref  <l:$291, c:$292>
N005 (  1,  1) [000025] -----+-----                               +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N009 (  3,  4) [000023] -----+-N---                               \--*  LSH       long   $416
N007 (  2,  3) [000021] -----+---U-                                  +--*  CAST      long <- uint $415
N006 (  1,  1) [000644] -----------                                  |  \--*  LCL_VAR   int    V20 cse2         u:1 $369
N008 (  1,  1) [000022] -----+-----                                  \--*  CNS_INT   long   2 $242
   {
      [RangeCheck::GetRangeWorker] BB02 N011 (  6,  6) [000226] ---XG+-----                         *  IND       int    <l:$36b, c:$36a>
N010 (  4,  5) [000026] ----G+-N---                         \--*  ADD       byref  <l:$291, c:$292>
N005 (  1,  1) [000025] -----+-----                            +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N009 (  3,  4) [000023] -----+-N---                            \--*  LSH       long   $416
N007 (  2,  3) [000021] -----+---U-                               +--*  CAST      long <- uint $415
N006 (  1,  1) [000644] -----------                               |  \--*  LCL_VAR   int    V20 cse2         u:1 $369
N008 (  1,  1) [000022] -----+-----                               \--*  CNS_INT   long   2 $242
      {
         Computed Range [000226] => <Unknown, Unknown>
      }
      Computed Range [000027] => <Unknown, Unknown>
   }
Merge assertions from BB10: #02 #03 #05 #07 #27 for definition [000029]
done merging
Merging assertions from pred edges of BB10 for op [000138] $309
   Computed Range [000138] => <Unknown, Unknown>
}
Range is completely unknown.
Failed to get range
Looking for array size assertions for: $314
ArrSize for lengthVN:314 = 0
[RangeCheck::GetRangeWorker] BB10 N001 (  1,  1) [000139] -----+-----                         *  LCL_VAR   int    V07 tmp2         u:1 <l:$2c7, c:$311>
{
----------------------------------------------------
N010 (  6,  6) [000122] DA-XG+-----                         *  STORE_LCL_VAR int    V07 tmp2         d:1 <l:$5df, c:$5de>
N009 (  6,  6) [000075] ---XG+-N---                         \--*  COMMA     int    <l:$58d, c:$58c>
N001 (  0,  0) [000068] -----+-----                            +--*  NOP       void  
N008 (  6,  6) [000227] ---XG+-----                            \--*  IND       int    <l:$58b, c:$58a>
N007 (  4,  5) [000074] ----G+-N---                               \--*  ADD       byref  <l:$29f, c:$2a0>
N002 (  1,  1) [000073] -----+-----                                  +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N006 (  3,  4) [000071] -----+-N---                                  \--*  LSH       long   $42a
N004 (  2,  3) [000069] -----+---U-                                     +--*  CAST      long <- uint $429
N003 (  1,  1) [000064] -----+-----                                     |  \--*  LCL_VAR   int    V04 loc2         u:2 $448
N005 (  1,  1) [000070] -----+-----                                     \--*  CNS_INT   long   2 $242
----------------------------------------------------
   [RangeCheck::GetRangeWorker] BB05 N009 (  6,  6) [000075] ---XG+-N---                         *  COMMA     int    <l:$58d, c:$58c>
N001 (  0,  0) [000068] -----+-----                         +--*  NOP       void  
N008 (  6,  6) [000227] ---XG+-----                         \--*  IND       int    <l:$58b, c:$58a>
N007 (  4,  5) [000074] ----G+-N---                            \--*  ADD       byref  <l:$29f, c:$2a0>
N002 (  1,  1) [000073] -----+-----                               +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N006 (  3,  4) [000071] -----+-N---                               \--*  LSH       long   $42a
N004 (  2,  3) [000069] -----+---U-                                  +--*  CAST      long <- uint $429
N003 (  1,  1) [000064] -----+-----                                  |  \--*  LCL_VAR   int    V04 loc2         u:2 $448
N005 (  1,  1) [000070] -----+-----                                  \--*  CNS_INT   long   2 $242
   {
      [RangeCheck::GetRangeWorker] BB05 N008 (  6,  6) [000227] ---XG+-----                         *  IND       int    <l:$58b, c:$58a>
N007 (  4,  5) [000074] ----G+-N---                         \--*  ADD       byref  <l:$29f, c:$2a0>
N002 (  1,  1) [000073] -----+-----                            +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N006 (  3,  4) [000071] -----+-N---                            \--*  LSH       long   $42a
N004 (  2,  3) [000069] -----+---U-                               +--*  CAST      long <- uint $429
N003 (  1,  1) [000064] -----+-----                               |  \--*  LCL_VAR   int    V04 loc2         u:2 $448
N005 (  1,  1) [000070] -----+-----                               \--*  CNS_INT   long   2 $242
      {
         Computed Range [000227] => <Unknown, Unknown>
      }
      Computed Range [000075] => <Unknown, Unknown>
   }
Merge assertions from BB10: #02 #03 #05 #07 #27 for definition [000122]
done merging
Merging assertions from pred edges of BB10 for op [000139] $311
   Computed Range [000139] => <Unknown, Unknown>
}
Range is completely unknown.
Failed to get range
Looking for array size assertions for: $300
ArrSize for lengthVN:300 = 0
[RangeCheck::GetRangeWorker] BB06 N006 (  4,  4) [000648] -A---------                         *  COMMA     int    $5a4
N004 (  3,  3) [000646] DA---------                         +--*  STORE_LCL_VAR int    V21 cse3         d:1 $VN.Void
N003 (  3,  3) [000039] -----+-----                         |  \--*  ADD       int    $5a4
N001 (  1,  1) [000037] -----+-----                         |     +--*  LCL_VAR   int    V04 loc2         u:6 $44b
N002 (  1,  1) [000038] -----+-----                         |     \--*  CNS_INT   int    1 $c1
N005 (  1,  1) [000647] -----------                         \--*  LCL_VAR   int    V21 cse3         u:1 $5a4
{
   [RangeCheck::GetRangeWorker] BB06 N005 (  1,  1) [000647] -----------                         *  LCL_VAR   int    V21 cse3         u:1 $5a4
   {
----------------------------------------------------
N004 (  3,  3) [000646] DA---------                         *  STORE_LCL_VAR int    V21 cse3         d:1 $VN.Void
N003 (  3,  3) [000039] -----+-----                         \--*  ADD       int    $5a4
N001 (  1,  1) [000037] -----+-----                            +--*  LCL_VAR   int    V04 loc2         u:6 $44b
N002 (  1,  1) [000038] -----+-----                            \--*  CNS_INT   int    1 $c1
----------------------------------------------------
      [RangeCheck::GetRangeWorker] BB06 N003 (  3,  3) [000039] -----+-----                         *  ADD       int    $5a4
N001 (  1,  1) [000037] -----+-----                         +--*  LCL_VAR   int    V04 loc2         u:6 $44b
N002 (  1,  1) [000038] -----+-----                         \--*  CNS_INT   int    1 $c1
      {
         [RangeCheck::GetRangeWorker] BB06 N001 (  1,  1) [000037] -----+-----                         *  LCL_VAR   int    V04 loc2         u:6 $44b
         {
----------------------------------------------------
N004 (  0,  0) [000584] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:6 $VN.Void
N003 (  0,  0) [000583] -----------                         \--*  PHI       int    $44b
N001 (  0,  0) [000621] ----------- pred BB64                  +--*  PHI_ARG   int    V04 loc2         u:4 $445
N002 (  0,  0) [000612] ----------- pred BB63                  \--*  PHI_ARG   int    V04 loc2         u:2 $448
----------------------------------------------------
            [RangeCheck::GetRangeWorker] BB06 N003 (  0,  0) [000583] -----------                         *  PHI       int    $44b
N001 (  0,  0) [000621] ----------- pred BB64               +--*  PHI_ARG   int    V04 loc2         u:4 $445
N002 (  0,  0) [000612] ----------- pred BB63               \--*  PHI_ARG   int    V04 loc2         u:2 $448
            {
               [RangeCheck::GetRangeWorker] BB06 N001 (  0,  0) [000621] -----------                         *  PHI_ARG   int    V04 loc2         u:4 $445
               {
----------------------------------------------------
N004 (  0,  0) [000590] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:4 $VN.Void
N003 (  0,  0) [000589] -----------                         \--*  PHI       int    $445
N001 (  0,  0) [000620] ----------- pred BB60                  +--*  PHI_ARG   int    V04 loc2         u:5
N002 (  0,  0) [000613] ----------- pred BB47                  \--*  PHI_ARG   int    V04 loc2         u:1 $444
----------------------------------------------------
                  [RangeCheck::GetRangeWorker] BB48 N003 (  0,  0) [000589] -----------                         *  PHI       int    $445
N001 (  0,  0) [000620] ----------- pred BB60               +--*  PHI_ARG   int    V04 loc2         u:5
N002 (  0,  0) [000613] ----------- pred BB47               \--*  PHI_ARG   int    V04 loc2         u:1 $444
                  {
                     [RangeCheck::GetRangeWorker] BB48 N001 (  0,  0) [000620] -----------                         *  PHI_ARG   int    V04 loc2         u:5
                     {
----------------------------------------------------
N004 (  3,  3) [000564] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:5 $VN.Void
N003 (  3,  3) [000565] -----------                         \--*  ADD       int    $588
N001 (  1,  1) [000566] -----------                            +--*  LCL_VAR   int    V04 loc2         u:4 (last use) $445
N002 (  1,  1) [000567] -----------                            \--*  CNS_INT   int    -1 $c2
----------------------------------------------------
                        [RangeCheck::GetRangeWorker] BB60 N003 (  3,  3) [000565] -----------                         *  ADD       int    $588
N001 (  1,  1) [000566] -----------                         +--*  LCL_VAR   int    V04 loc2         u:4 (last use) $445
N002 (  1,  1) [000567] -----------                         \--*  CNS_INT   int    -1 $c2
                        {
                           [RangeCheck::GetRangeWorker] BB60 N001 (  1,  1) [000566] -----------                         *  LCL_VAR   int    V04 loc2         u:4 (last use) $445
                           {
----------------------------------------------------
N004 (  0,  0) [000590] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:4 $VN.Void
N003 (  0,  0) [000589] -----------                         \--*  PHI       int    $445
N001 (  0,  0) [000620] ----------- pred BB60                  +--*  PHI_ARG   int    V04 loc2         u:5
N002 (  0,  0) [000613] ----------- pred BB47                  \--*  PHI_ARG   int    V04 loc2         u:1 $444
----------------------------------------------------
                              [RangeCheck::GetRangeWorker] BB48 N003 (  0,  0) [000589] -----------                         *  PHI       int    $445
N001 (  0,  0) [000620] ----------- pred BB60               +--*  PHI_ARG   int    V04 loc2         u:5
N002 (  0,  0) [000613] ----------- pred BB47               \--*  PHI_ARG   int    V04 loc2         u:1 $444
                              {
PhiArg [000620] is already being computed
Merging assertions from pred edges of BB48 for op [000620] $ffffffff
Merge assertions created by BB60 for BB48
#01 #02 #03 #04 #05 #06 #07 #08 #09 #10 #11 #12 #13 #14 #15 #16 #17 #18 #19 #20 #21 #22 #23 #24 #25 #26 #27 #28 #29 #30 #31 #32 #33 #34 #35 #36 #37 #38 #39 #40 #41 #42
Merging ranges <Undef, Undef> <Dependent, Dependent>:<Dependent, Dependent>
                                 [RangeCheck::GetRangeWorker] BB48 N002 (  0,  0) [000613] -----------                         *  PHI_ARG   int    V04 loc2         u:1 $444
                                 {
----------------------------------------------------
N002 (  1,  3) [000031] DA---+-----                         *  STORE_LCL_VAR int    V04 loc2         d:1 $VN.Void
N001 (  1,  1) [000030] -----+-----                         \--*  LCL_VAR   int    V02 loc0         u:2 $444
----------------------------------------------------
                                    [RangeCheck::GetRangeWorker] BB02 N001 (  1,  1) [000030] -----+-----                         *  LCL_VAR   int    V02 loc0         u:2 $444
                                    {
----------------------------------------------------
N004 (  0,  0) [000580] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:2 $VN.Void
N003 (  0,  0) [000579] -----------                         \--*  PHI       int    $444
N001 (  0,  0) [000622] ----------- pred BB06                  +--*  PHI_ARG   int    V02 loc0         u:3
N002 (  0,  0) [000603] ----------- pred BB26                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0
----------------------------------------------------
                                       [RangeCheck::GetRangeWorker] BB07 N003 (  0,  0) [000579] -----------                         *  PHI       int    $444
N001 (  0,  0) [000622] ----------- pred BB06               +--*  PHI_ARG   int    V02 loc0         u:3
N002 (  0,  0) [000603] ----------- pred BB26               \--*  PHI_ARG   int    V02 loc0         u:1 $c0
                                       {
                                          [RangeCheck::GetRangeWorker] BB07 N001 (  0,  0) [000622] -----------                         *  PHI_ARG   int    V02 loc0         u:3
                                          {
----------------------------------------------------
N002 (  1,  3) [000059] DA---+-----                         *  STORE_LCL_VAR int    V02 loc0         d:3 $VN.Void
N001 (  1,  1) [000645] -----------                         \--*  LCL_VAR   int    V20 cse2         u:1 $369
----------------------------------------------------
                                             [RangeCheck::GetRangeWorker] BB06 N001 (  1,  1) [000645] -----------                         *  LCL_VAR   int    V20 cse2         u:1 $369
                                             {
----------------------------------------------------
N004 (  3,  3) [000641] DA---------                         *  STORE_LCL_VAR int    V20 cse2         d:1 $VN.Void
N003 (  3,  3) [000013] -----+-----                         \--*  ADD       int    $369
N001 (  1,  1) [000011] -----+-----                            +--*  LCL_VAR   int    V02 loc0         u:2 $444
N002 (  1,  1) [000012] -----+-----                            \--*  CNS_INT   int    1 $c1
----------------------------------------------------
                                                [RangeCheck::GetRangeWorker] BB02 N003 (  3,  3) [000013] -----+-----                         *  ADD       int    $369
N001 (  1,  1) [000011] -----+-----                         +--*  LCL_VAR   int    V02 loc0         u:2 $444
N002 (  1,  1) [000012] -----+-----                         \--*  CNS_INT   int    1 $c1
                                                {
                                                   [RangeCheck::GetRangeWorker] BB02 N001 (  1,  1) [000011] -----+-----                         *  LCL_VAR   int    V02 loc0         u:2 $444
                                                   {
----------------------------------------------------
N004 (  0,  0) [000580] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:2 $VN.Void
N003 (  0,  0) [000579] -----------                         \--*  PHI       int    $444
N001 (  0,  0) [000622] ----------- pred BB06                  +--*  PHI_ARG   int    V02 loc0         u:3
N002 (  0,  0) [000603] ----------- pred BB26                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0
----------------------------------------------------
                                                      [RangeCheck::GetRangeWorker] BB07 N003 (  0,  0) [000579] -----------                         *  PHI       int    $444
N001 (  0,  0) [000622] ----------- pred BB06               +--*  PHI_ARG   int    V02 loc0         u:3
N002 (  0,  0) [000603] ----------- pred BB26               \--*  PHI_ARG   int    V02 loc0         u:1 $c0
                                                      {
PhiArg [000622] is already being computed
Merging assertions from pred edges of BB07 for op [000622] $ffffffff
Merge assertions created by BB06 for BB07
#02 #03 #26 #27
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Merging ranges <Undef, Undef> <0, $300 + -1>:<0, $300 + -1>
                                                         [RangeCheck::GetRangeWorker] BB07 N002 (  0,  0) [000603] -----------                         *  PHI_ARG   int    V02 loc0         u:1 $c0
                                                         {
                                                            Computed Range [000603] => <0, 0>
                                                         }
Merging assertions from pred edges of BB07 for op [000603] $c0
Merge assertions created by BB26 for BB07
#02
Merging ranges <0, $300 + -1> <0, 0>:<0, Unknown>
                                                         Computed Range [000579] => <0, Unknown>
                                                      }
Merge assertions from BB02: #02 #27 for definition [000580]
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB02 for op [000011] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                                      Computed Range [000011] => <0, $300 + -2>
                                                   }
Merging assertions from pred edges of BB02 for op [000011] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                                   [RangeCheck::GetRangeWorker] BB02 N002 (  1,  1) [000012] -----+-----                         *  CNS_INT   int    1 $c1
                                                   {
                                                      Computed Range [000012] => <1, 1>
                                                   }
Merging assertions from pred edges of BB02 for op [000012] $c1
BinOp add ranges <0, $300 + -2> <1, 1> = <1, $300 + -1>
                                                   Computed Range [000013] => <1, $300 + -1>
                                                }
Merge assertions from BB06: #02 #03 #27 for definition [000641]
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
done merging
Merging assertions from pred edges of BB06 for op [000645] $369
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
                                                Computed Range [000645] => <1, $300 + -1>
                                             }
Merge assertions from BB07: #02 for definition [000059]
done merging
Merging assertions from pred edges of BB07 for op [000622] $ffffffff
Merge assertions created by BB06 for BB07
#02 #03 #26 #27
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
                                             Computed Range [000622] => <1, $300 + -1>
                                          }
Merging assertions from pred edges of BB07 for op [000622] $ffffffff
Merge assertions created by BB06 for BB07
#02 #03 #26 #27
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
Merging ranges <Undef, Undef> <1, $300 + -1>:<1, $300 + -1>
                                          [RangeCheck::GetRangeWorker] BB07 N002 (  0,  0) [000603] -----------                         *  PHI_ARG   int    V02 loc0         u:1 $c0
                                          {
                                             Cached Range [000603] => <0, 0>
                                          }
Merging assertions from pred edges of BB07 for op [000603] $c0
Merge assertions created by BB26 for BB07
#02
Merging ranges <1, $300 + -1> <0, 0>:<0, Unknown>
                                          Computed Range [000579] => <0, Unknown>
                                       }
Merge assertions from BB02: #02 #27 for definition [000580]
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB02 for op [000030] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                       Computed Range [000030] => <0, $300 + -2>
                                    }
Merge assertions from BB48: #01 #02 #03 #04 #05 #06 #07 #08 #09 #10 #11 #12 #13 #14 #15 #16 #17 #18 #19 #20 #21 #22 #23 #24 #25 #26 #27 #28 #29 #30 #31 #32 #33 #34 #35 #36 #37 #38 #39 #40 #41 #42 for definition [000031]
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is  {IntCns 0}, index = #28
assertedRange is invalid: [<$300 + -1, $300 + -2>] - bail out
done merging
Merging assertions from pred edges of BB48 for op [000613] $444
Merge assertions created by BB47 for BB48
#01 #02 #03 #04 #05 #06 #07 #08 #09 #10 #11 #12 #13 #14 #15 #16 #17 #18 #19 #20 #21 #22 #23 #24 #25 #26 #27 #28 #29 #30 #31 #32 #33 #34 #35 #36 #37 #38 #39 #40 #41 #42
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is  {IntCns 0}, index = #28
assertedRange is invalid: [<$300 + -1, $300 + -2>] - bail out
                                    Computed Range [000613] => <0, $300 + -2>
                                 }
Merging assertions from pred edges of BB48 for op [000613] $444
Merge assertions created by BB47 for BB48
#01 #02 #03 #04 #05 #06 #07 #08 #09 #10 #11 #12 #13 #14 #15 #16 #17 #18 #19 #20 #21 #22 #23 #24 #25 #26 #27 #28 #29 #30 #31 #32 #33 #34 #35 #36 #37 #38 #39 #40 #41 #42
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is  {IntCns 0}, index = #28
assertedRange is invalid: [<$300 + -1, $300 + -2>] - bail out
Merging ranges <Dependent, Dependent> <0, $300 + -2>:<Dependent, Dependent>
                                 Computed Range [000589] => <Dependent, Dependent>
                              }
Merge assertions from BB60: #01 #02 #03 #04 #05 #06 #07 #08 #09 #10 #11 #12 #13 #14 #15 #16 #17 #18 #19 #20 #21 #22 #23 #24 #25 #26 #27 #28 #29 #30 #31 #32 #33 #34 #35 #36 #37 #38 #39 #40 #41 #42 for definition [000590]
Constant Assertion: ($36e,$c0) Const_Loop_Bnd {LT($445, $c0)} is not  {IntCns 0}, index = #15
Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<Unknown, -1>] into [<Dependent, -1>]
Constant Assertion: ($36e,$c0) Const_Loop_Bnd {LT($445, $c0)} is  {IntCns 0}, index = #16
assertedRange is invalid: [<0, -1>] - bail out
done merging
Merging assertions from pred edges of BB60 for op [000566] $445
Constant Assertion: ($36e,$c0) Const_Loop_Bnd {LT($445, $c0)} is not  {IntCns 0}, index = #15
Tightening pRange: [<Dependent, -1>] with assertedRange: [<Unknown, -1>] into [<Dependent, -1>]
Constant Assertion: ($36e,$c0) Const_Loop_Bnd {LT($445, $c0)} is  {IntCns 0}, index = #16
assertedRange is invalid: [<0, -1>] - bail out
                              Computed Range [000566] => <Dependent, -1>
                           }
Merging assertions from pred edges of BB60 for op [000566] $445
Constant Assertion: ($36e,$c0) Const_Loop_Bnd {LT($445, $c0)} is not  {IntCns 0}, index = #15
Tightening pRange: [<Dependent, -1>] with assertedRange: [<Unknown, -1>] into [<Dependent, -1>]
Constant Assertion: ($36e,$c0) Const_Loop_Bnd {LT($445, $c0)} is  {IntCns 0}, index = #16
assertedRange is invalid: [<0, -1>] - bail out
                           [RangeCheck::GetRangeWorker] BB60 N002 (  1,  1) [000567] -----------                         *  CNS_INT   int    -1 $c2
                           {
                              Computed Range [000567] => <-1, -1>
                           }
Merging assertions from pred edges of BB60 for op [000567] $c2
BinOp add ranges <Dependent, -1> <-1, -1> = <Dependent, -2>
                           Computed Range [000565] => <Dependent, -2>
                        }
Merge assertions from BB48: #01 #02 #03 #04 #05 #06 #07 #08 #09 #10 #11 #12 #13 #14 #15 #16 #17 #18 #19 #20 #21 #22 #23 #24 #25 #26 #27 #28 #29 #30 #31 #32 #33 #34 #35 #36 #37 #38 #39 #40 #41 #42 for definition [000564]
done merging
Merging assertions from pred edges of BB48 for op [000620] $ffffffff
Merge assertions created by BB60 for BB48
#01 #02 #03 #04 #05 #06 #07 #08 #09 #10 #11 #12 #13 #14 #15 #16 #17 #18 #19 #20 #21 #22 #23 #24 #25 #26 #27 #28 #29 #30 #31 #32 #33 #34 #35 #36 #37 #38 #39 #40 #41 #42
                        Computed Range [000620] => <Dependent, -2>
                     }
Merging assertions from pred edges of BB48 for op [000620] $ffffffff
Merge assertions created by BB60 for BB48
#01 #02 #03 #04 #05 #06 #07 #08 #09 #10 #11 #12 #13 #14 #15 #16 #17 #18 #19 #20 #21 #22 #23 #24 #25 #26 #27 #28 #29 #30 #31 #32 #33 #34 #35 #36 #37 #38 #39 #40 #41 #42
Merging ranges <Undef, Undef> <Dependent, -2>:<Dependent, -2>
                     [RangeCheck::GetRangeWorker] BB48 N002 (  0,  0) [000613] -----------                         *  PHI_ARG   int    V04 loc2         u:1 $444
                     {
                        Cached Range [000613] => <0, $300 + -2>
                     }
Merging assertions from pred edges of BB48 for op [000613] $444
Merge assertions created by BB47 for BB48
#01 #02 #03 #04 #05 #06 #07 #08 #09 #10 #11 #12 #13 #14 #15 #16 #17 #18 #19 #20 #21 #22 #23 #24 #25 #26 #27 #28 #29 #30 #31 #32 #33 #34 #35 #36 #37 #38 #39 #40 #41 #42
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is  {IntCns 0}, index = #28
assertedRange is invalid: [<$300 + -1, $300 + -2>] - bail out
Merging ranges <Dependent, -2> <0, $300 + -2>:<Dependent, Unknown>
                     Computed Range [000589] => <Dependent, Unknown>
                  }
Merge assertions from BB06: #02 #03 #27 for definition [000590]
done merging
Merging assertions from pred edges of BB06 for op [000621] $445
Merge assertions created by BB64 for BB06
#01 #02 #03 #04 #05 #06 #07 #08 #09 #10 #11 #12 #13 #14 #15 #16 #17 #18 #19 #20 #21 #22 #23 #24 #25 #26 #27 #28 #29 #30 #31 #32 #33 #34 #35 #36 #37 #38 #39 #40 #41 #42
Constant Assertion: ($36e,$c0) Const_Loop_Bnd {LT($445, $c0)} is not  {IntCns 0}, index = #15
Tightening pRange: [<Dependent, Unknown>] with assertedRange: [<Unknown, -1>] into [<Dependent, -1>]
Constant Assertion: ($36e,$c0) Const_Loop_Bnd {LT($445, $c0)} is  {IntCns 0}, index = #16
assertedRange is invalid: [<0, -1>] - bail out
                  Computed Range [000621] => <Dependent, -1>
               }
Merging assertions from pred edges of BB06 for op [000621] $445
Merge assertions created by BB64 for BB06
#01 #02 #03 #04 #05 #06 #07 #08 #09 #10 #11 #12 #13 #14 #15 #16 #17 #18 #19 #20 #21 #22 #23 #24 #25 #26 #27 #28 #29 #30 #31 #32 #33 #34 #35 #36 #37 #38 #39 #40 #41 #42
Constant Assertion: ($36e,$c0) Const_Loop_Bnd {LT($445, $c0)} is not  {IntCns 0}, index = #15
Tightening pRange: [<Dependent, -1>] with assertedRange: [<Unknown, -1>] into [<Dependent, -1>]
Constant Assertion: ($36e,$c0) Const_Loop_Bnd {LT($445, $c0)} is  {IntCns 0}, index = #16
assertedRange is invalid: [<0, -1>] - bail out
Merging ranges <Undef, Undef> <Dependent, -1>:<Dependent, -1>
               [RangeCheck::GetRangeWorker] BB06 N002 (  0,  0) [000612] -----------                         *  PHI_ARG   int    V04 loc2         u:2 $448
               {
----------------------------------------------------
N004 (  0,  0) [000582] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:2 $VN.Void
N003 (  0,  0) [000581] -----------                         \--*  PHI       int    $448
N001 (  0,  0) [000611] ----------- pred BB03                  +--*  PHI_ARG   int    V04 loc2         u:3
N002 (  0,  0) [000604] ----------- pred BB46                  \--*  PHI_ARG   int    V04 loc2         u:1 $444
----------------------------------------------------
                  [RangeCheck::GetRangeWorker] BB04 N003 (  0,  0) [000581] -----------                         *  PHI       int    $448
N001 (  0,  0) [000611] ----------- pred BB03               +--*  PHI_ARG   int    V04 loc2         u:3
N002 (  0,  0) [000604] ----------- pred BB46               \--*  PHI_ARG   int    V04 loc2         u:1 $444
                  {
                     [RangeCheck::GetRangeWorker] BB04 N001 (  0,  0) [000611] -----------                         *  PHI_ARG   int    V04 loc2         u:3
                     {
----------------------------------------------------
N004 (  3,  3) [000119] DA---+-----                         *  STORE_LCL_VAR int    V04 loc2         d:3 $VN.Void
N003 (  3,  3) [000118] -----+-----                         \--*  ADD       int    $5a3
N001 (  1,  1) [000116] -----+-----                            +--*  LCL_VAR   int    V04 loc2         u:2 (last use) $448
N002 (  1,  1) [000117] -----+-----                            \--*  CNS_INT   int    -1 $c2
----------------------------------------------------
                        [RangeCheck::GetRangeWorker] BB03 N003 (  3,  3) [000118] -----+-----                         *  ADD       int    $5a3
N001 (  1,  1) [000116] -----+-----                         +--*  LCL_VAR   int    V04 loc2         u:2 (last use) $448
N002 (  1,  1) [000117] -----+-----                         \--*  CNS_INT   int    -1 $c2
                        {
                           [RangeCheck::GetRangeWorker] BB03 N001 (  1,  1) [000116] -----+-----                         *  LCL_VAR   int    V04 loc2         u:2 (last use) $448
                           {
----------------------------------------------------
N004 (  0,  0) [000582] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:2 $VN.Void
N003 (  0,  0) [000581] -----------                         \--*  PHI       int    $448
N001 (  0,  0) [000611] ----------- pred BB03                  +--*  PHI_ARG   int    V04 loc2         u:3
N002 (  0,  0) [000604] ----------- pred BB46                  \--*  PHI_ARG   int    V04 loc2         u:1 $444
----------------------------------------------------
                              [RangeCheck::GetRangeWorker] BB04 N003 (  0,  0) [000581] -----------                         *  PHI       int    $448
N001 (  0,  0) [000611] ----------- pred BB03               +--*  PHI_ARG   int    V04 loc2         u:3
N002 (  0,  0) [000604] ----------- pred BB46               \--*  PHI_ARG   int    V04 loc2         u:1 $444
                              {
PhiArg [000611] is already being computed
Merging assertions from pred edges of BB04 for op [000611] $ffffffff
Merge assertions created by BB03 for BB04
#02 #03 #04 #05 #07 #08 #09 #10 #13 #27
Merging ranges <Undef, Undef> <Dependent, Dependent>:<Dependent, Dependent>
                                 [RangeCheck::GetRangeWorker] BB04 N002 (  0,  0) [000604] -----------                         *  PHI_ARG   int    V04 loc2         u:1 $444
                                 {
----------------------------------------------------
N002 (  1,  3) [000031] DA---+-----                         *  STORE_LCL_VAR int    V04 loc2         d:1 $VN.Void
N001 (  1,  1) [000030] -----+-----                         \--*  LCL_VAR   int    V02 loc0         u:2 $444
----------------------------------------------------
                                    [RangeCheck::GetRangeWorker] BB02 N001 (  1,  1) [000030] -----+-----                         *  LCL_VAR   int    V02 loc0         u:2 $444
                                    {
                                       Cached Range [000030] => <0, $300 + -2>
                                    }
Merge assertions from BB04: #02 #03 #27 for definition [000031]
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB04 for op [000604] $444
Merge assertions created by BB46 for BB04
#02 #03 #27
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                    Computed Range [000604] => <0, $300 + -2>
                                 }
Merging assertions from pred edges of BB04 for op [000604] $444
Merge assertions created by BB46 for BB04
#02 #03 #27
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Merging ranges <Dependent, Dependent> <0, $300 + -2>:<Dependent, Dependent>
                                 Computed Range [000581] => <Dependent, Dependent>
                              }
Merge assertions from BB03: #02 #03 #05 #07 #08 #09 #10 #13 #27 for definition [000582]
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
done merging
Merging assertions from pred edges of BB03 for op [000116] $448
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
                              Computed Range [000116] => <0, $300 + -1>
                           }
Merging assertions from pred edges of BB03 for op [000116] $448
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
                           [RangeCheck::GetRangeWorker] BB03 N002 (  1,  1) [000117] -----+-----                         *  CNS_INT   int    -1 $c2
                           {
                              Computed Range [000117] => <-1, -1>
                           }
Merging assertions from pred edges of BB03 for op [000117] $c2
BinOp add ranges <0, $300 + -1> <-1, -1> = <-1, $300 + -2>
                           Computed Range [000118] => <-1, $300 + -2>
                        }
Merge assertions from BB04: #02 #03 #27 for definition [000119]
done merging
Merging assertions from pred edges of BB04 for op [000611] $ffffffff
Merge assertions created by BB03 for BB04
#02 #03 #04 #05 #07 #08 #09 #10 #13 #27
                        Computed Range [000611] => <-1, $300 + -2>
                     }
Merging assertions from pred edges of BB04 for op [000611] $ffffffff
Merge assertions created by BB03 for BB04
#02 #03 #04 #05 #07 #08 #09 #10 #13 #27
Merging ranges <Undef, Undef> <-1, $300 + -2>:<-1, $300 + -2>
                     [RangeCheck::GetRangeWorker] BB04 N002 (  0,  0) [000604] -----------                         *  PHI_ARG   int    V04 loc2         u:1 $444
                     {
                        Cached Range [000604] => <0, $300 + -2>
                     }
Merging assertions from pred edges of BB04 for op [000604] $444
Merge assertions created by BB46 for BB04
#02 #03 #27
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Merging ranges <-1, $300 + -2> <0, $300 + -2>:<-1, $300 + -2>
                     Computed Range [000581] => <-1, $300 + -2>
                  }
Merge assertions from BB06: #02 #03 #27 for definition [000582]
done merging
Merging assertions from pred edges of BB06 for op [000612] $448
Merge assertions created by BB63 for BB06
#02 #03 #27
                  Computed Range [000612] => <-1, $300 + -2>
               }
Merging assertions from pred edges of BB06 for op [000612] $448
Merge assertions created by BB63 for BB06
#02 #03 #27
Merging ranges <Dependent, -1> <-1, $300 + -2>:<Dependent, Unknown>
               Computed Range [000583] => <Dependent, Unknown>
            }
Merge assertions from BB06: #02 #03 #27 for definition [000584]
done merging
Merging assertions from pred edges of BB06 for op [000037] $44b
            Computed Range [000037] => <Dependent, Unknown>
         }
Merging assertions from pred edges of BB06 for op [000037] $44b
         [RangeCheck::GetRangeWorker] BB06 N002 (  1,  1) [000038] -----+-----                         *  CNS_INT   int    1 $c1
         {
            Computed Range [000038] => <1, 1>
         }
Merging assertions from pred edges of BB06 for op [000038] $c1
BinOp add ranges <Dependent, Unknown> <1, 1> = <Dependent, Unknown>
         Computed Range [000039] => <Dependent, Unknown>
      }
Merge assertions from BB06: #02 #03 #27 for definition [000646]
done merging
Merging assertions from pred edges of BB06 for op [000647] $5a4
      Computed Range [000647] => <Dependent, Unknown>
   }
   Computed Range [000648] => <Dependent, Unknown>
}
Does overflow [000648]?
Does overflow [000647]?
Merging assertions from pred edges of BB06 for op [000647] $5a4
Does overflow [000039]?
Does overflow [000037]?
Merging assertions from pred edges of BB06 for op [000037] $44b
Does overflow [000583]?
Does overflow [000621]?
Merging assertions from pred edges of BB06 for op [000621] $445
Merge assertions created by BB64 for BB06
#01 #02 #03 #04 #05 #06 #07 #08 #09 #10 #11 #12 #13 #14 #15 #16 #17 #18 #19 #20 #21 #22 #23 #24 #25 #26 #27 #28 #29 #30 #31 #32 #33 #34 #35 #36 #37 #38 #39 #40 #41 #42
Constant Assertion: ($36e,$c0) Const_Loop_Bnd {LT($445, $c0)} is not  {IntCns 0}, index = #15
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, -1>] into [<Unknown, -1>]
Constant Assertion: ($36e,$c0) Const_Loop_Bnd {LT($445, $c0)} is  {IntCns 0}, index = #16
assertedRange is invalid: [<0, -1>] - bail out
Does overflow [000589]?
Does overflow [000620]?
Merging assertions from pred edges of BB48 for op [000620] $ffffffff
Merge assertions created by BB60 for BB48
#01 #02 #03 #04 #05 #06 #07 #08 #09 #10 #11 #12 #13 #14 #15 #16 #17 #18 #19 #20 #21 #22 #23 #24 #25 #26 #27 #28 #29 #30 #31 #32 #33 #34 #35 #36 #37 #38 #39 #40 #41 #42
Does overflow [000565]?
Does overflow [000566]?
Merging assertions from pred edges of BB60 for op [000566] $445
Constant Assertion: ($36e,$c0) Const_Loop_Bnd {LT($445, $c0)} is not  {IntCns 0}, index = #15
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, -1>] into [<Unknown, -1>]
Constant Assertion: ($36e,$c0) Const_Loop_Bnd {LT($445, $c0)} is  {IntCns 0}, index = #16
assertedRange is invalid: [<0, -1>] - bail out
Does overflow [000589]?
Does overflow [000613]?
Merging assertions from pred edges of BB48 for op [000613] $444
Merge assertions created by BB47 for BB48
#01 #02 #03 #04 #05 #06 #07 #08 #09 #10 #11 #12 #13 #14 #15 #16 #17 #18 #19 #20 #21 #22 #23 #24 #25 #26 #27 #28 #29 #30 #31 #32 #33 #34 #35 #36 #37 #38 #39 #40 #41 #42
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is  {IntCns 0}, index = #28
assertedRange is invalid: [<$300 + -1, $300 + -2>] - bail out
Does overflow [000030]?
Merging assertions from pred edges of BB02 for op [000030] $444
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000579]?
Does overflow [000622]?
Merging assertions from pred edges of BB07 for op [000622] $ffffffff
Merge assertions created by BB06 for BB07
#02 #03 #26 #27
ArrBnds  Assertion: ($0,$0) [idx: $369 {ADD($444, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #03
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
[000622] does not overflow
Does overflow [000603]?
[000603] does not overflow
[000579] does not overflow
[000030] does not overflow
[000613] does not overflow
[000589] does not overflow
[000566] does not overflow
Does overflow [000567]?
[000567] does not overflow
Checking bin op overflow ADD <Dependent, -1> <-1, -1>
[000565] does not overflow
[000620] does not overflow
[000589] does not overflow
[000621] does not overflow
Does overflow [000612]?
Merging assertions from pred edges of BB06 for op [000612] $448
Merge assertions created by BB63 for BB06
#02 #03 #27
Does overflow [000581]?
Does overflow [000611]?
Merging assertions from pred edges of BB04 for op [000611] $ffffffff
Merge assertions created by BB03 for BB04
#02 #03 #04 #05 #07 #08 #09 #10 #13 #27
Does overflow [000118]?
Does overflow [000116]?
Merging assertions from pred edges of BB03 for op [000116] $448
ArrBnds  Assertion: ($0,$0) [idx: $448 {PhiDef(V04 d:2, u:3, u:1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #05
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Constant Assertion: ($589,$c0) Const_Loop_Bnd {LT($448, $c0)} is  {IntCns 0}, index = #07
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
[000116] does not overflow
Does overflow [000117]?
[000117] does not overflow
Checking bin op overflow ADD <0, $300 + -1> <-1, -1>
[000118] does not overflow
[000611] does not overflow
Does overflow [000604]?
Merging assertions from pred edges of BB04 for op [000604] $444
Merge assertions created by BB46 for BB04
#02 #03 #27
Constant Assertion: ($368,$c0) Oper_Bnd { {PhiDef(V02 d:2, u:3, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #27
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
[000604] does not overflow
[000581] does not overflow
[000612] does not overflow
[000583] does not overflow
[000037] does not overflow
Does overflow [000038]?
[000038] does not overflow
Checking bin op overflow ADD <Dependent, Unknown> <1, 1>
[000039] overflows
[000647] overflows
[000648] overflows
Range determined to overflow.
Failed to get range
Looking for array size assertions for: $300
ArrSize for lengthVN:300 = 0
[RangeCheck::GetRangeWorker] BB29 N003 (  3,  3) [000266] -----------                         *  ADD       int    $347
N001 (  1,  1) [000267] -----------                         +--*  LCL_VAR   int    V02 loc0         u:4 $440
N002 (  1,  1) [000268] -----------                         \--*  CNS_INT   int    1 $c1
{
   [RangeCheck::GetRangeWorker] BB29 N001 (  1,  1) [000267] -----------                         *  LCL_VAR   int    V02 loc0         u:4 $440
   {
----------------------------------------------------
N004 (  0,  0) [000596] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:4 $VN.Void
N003 (  0,  0) [000595] -----------                         \--*  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43                  +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0
----------------------------------------------------
      [RangeCheck::GetRangeWorker] BB28 N003 (  0,  0) [000595] -----------                         *  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43               +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27               \--*  PHI_ARG   int    V02 loc0         u:1 $c0
      {
         [RangeCheck::GetRangeWorker] BB28 N001 (  0,  0) [000632] -----------                         *  PHI_ARG   int    V02 loc0         u:5
         {
----------------------------------------------------
N004 (  3,  3) [000425] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:5 $VN.Void
N003 (  3,  3) [000426] -----------                         \--*  ADD       int    $347
N001 (  1,  1) [000427] -----------                            +--*  LCL_VAR   int    V02 loc0         u:4 (last use) $440
N002 (  1,  1) [000428] -----------                            \--*  CNS_INT   int    1 $c1
----------------------------------------------------
            [RangeCheck::GetRangeWorker] BB43 N003 (  3,  3) [000426] -----------                         *  ADD       int    $347
N001 (  1,  1) [000427] -----------                         +--*  LCL_VAR   int    V02 loc0         u:4 (last use) $440
N002 (  1,  1) [000428] -----------                         \--*  CNS_INT   int    1 $c1
            {
               [RangeCheck::GetRangeWorker] BB43 N001 (  1,  1) [000427] -----------                         *  LCL_VAR   int    V02 loc0         u:4 (last use) $440
               {
----------------------------------------------------
N004 (  0,  0) [000596] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:4 $VN.Void
N003 (  0,  0) [000595] -----------                         \--*  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43                  +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0
----------------------------------------------------
                  [RangeCheck::GetRangeWorker] BB28 N003 (  0,  0) [000595] -----------                         *  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43               +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27               \--*  PHI_ARG   int    V02 loc0         u:1 $c0
                  {
PhiArg [000632] is already being computed
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Merging ranges <Undef, Undef> <0, $300 + -1>:<0, $300 + -1>
                     [RangeCheck::GetRangeWorker] BB28 N002 (  0,  0) [000623] -----------                         *  PHI_ARG   int    V02 loc0         u:1 $c0
                     {
                        Computed Range [000623] => <0, 0>
                     }
Merging assertions from pred edges of BB28 for op [000623] $c0
Merging ranges <0, $300 + -1> <0, 0>:<0, Unknown>
                     Computed Range [000595] => <0, Unknown>
                  }
Merge assertions from BB43: #29 #31 for definition [000596]
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB43 for op [000427] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                  Computed Range [000427] => <0, $300 + -2>
               }
Merging assertions from pred edges of BB43 for op [000427] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
               [RangeCheck::GetRangeWorker] BB43 N002 (  1,  1) [000428] -----------                         *  CNS_INT   int    1 $c1
               {
                  Computed Range [000428] => <1, 1>
               }
Merging assertions from pred edges of BB43 for op [000428] $c1
BinOp add ranges <0, $300 + -2> <1, 1> = <1, $300 + -1>
               Computed Range [000426] => <1, $300 + -1>
            }
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
            Computed Range [000632] => <1, $300 + -1>
         }
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
Merging ranges <Undef, Undef> <1, $300 + -1>:<1, $300 + -1>
         [RangeCheck::GetRangeWorker] BB28 N002 (  0,  0) [000623] -----------                         *  PHI_ARG   int    V02 loc0         u:1 $c0
         {
            Cached Range [000623] => <0, 0>
         }
Merging assertions from pred edges of BB28 for op [000623] $c0
Merging ranges <1, $300 + -1> <0, 0>:<0, Unknown>
         Computed Range [000595] => <0, Unknown>
      }
Merge assertions from BB29: #29 for definition [000596]
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB29 for op [000267] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
      Computed Range [000267] => <0, $300 + -2>
   }
Merging assertions from pred edges of BB29 for op [000267] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
   [RangeCheck::GetRangeWorker] BB29 N002 (  1,  1) [000268] -----------                         *  CNS_INT   int    1 $c1
   {
      Computed Range [000268] => <1, 1>
   }
Merging assertions from pred edges of BB29 for op [000268] $c1
BinOp add ranges <0, $300 + -2> <1, 1> = <1, $300 + -1>
   Computed Range [000266] => <1, $300 + -1>
}
Does overflow [000266]?
Does overflow [000267]?
Merging assertions from pred edges of BB29 for op [000267] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000595]?
Does overflow [000632]?
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Does overflow [000426]?
Does overflow [000427]?
Merging assertions from pred edges of BB43 for op [000427] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000595]?
Does overflow [000623]?
[000623] does not overflow
[000595] does not overflow
[000427] does not overflow
Does overflow [000428]?
[000428] does not overflow
Checking bin op overflow ADD <0, $300 + -2> <1, 1>
[000426] does not overflow
[000632] does not overflow
[000595] does not overflow
[000267] does not overflow
Does overflow [000268]?
[000268] does not overflow
Checking bin op overflow ADD <0, $300 + -2> <1, 1>
[000266] does not overflow
Range value <1, $300 + -1>
[RangeCheck::Widen] BB29, 
[000266]
<1, $300 + -1> BetweenBounds <0, [000269]>
$300 upper bound is:  {MemOpaque:NotInLoop}
Array size is: 0
[RangeCheck::OptimizeRangeCheck] Between bounds
Before optRemoveRangeCheck:
N015 ( 16, 19) [000264] ---XGO-----                         *  COMMA     int    <l:$34b, c:$34a>
N005 (  8, 11) [000265] ---XGO-----                         +--*  BOUNDS_CHECK_Rng void   <l:$3c7, c:$3c6>
N003 (  3,  3) [000266] -----------                         |  +--*  ADD       int    $347
N001 (  1,  1) [000267] -----------                         |  |  +--*  LCL_VAR   int    V02 loc0         u:4 $440
N002 (  1,  1) [000268] -----------                         |  |  \--*  CNS_INT   int    1 $c1
N004 (  1,  1) [000269] -----------                         |  \--*  LCL_VAR   int    V16 tmp11        u:1 <l:$2c0, c:$300>
N014 (  8,  8) [000270] ---XGO-----                         \--*  IND       int    <l:$349, c:$348>
N013 (  6,  7) [000271] ----GO-N---                            \--*  ADD       byref  <l:$282, c:$283>
N006 (  1,  1) [000272] -----------                               +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N012 (  5,  6) [000273] -------N---                               \--*  LSH       long   $402
N010 (  4,  5) [000274] ---------U-                                  +--*  CAST      long <- uint $401
N009 (  3,  3) [000275] -----------                                  |  \--*  ADD       int    $347
N007 (  1,  1) [000276] -----------                                  |     +--*  LCL_VAR   int    V02 loc0         u:4 $440
N008 (  1,  1) [000277] -----------                                  |     \--*  CNS_INT   int    1 $c1
N011 (  1,  1) [000278] -----------                                  \--*  CNS_INT   long   2 $242
After optRemoveRangeCheck for [000264]:
N016 ( 16, 19) [000263] DA-XGO-----                         *  STORE_LCL_VAR int    V03 loc1         d:2 <l:$3cd, c:$3cc>
N015 ( 16, 19) [000264] ---XGO-N---                         \--*  COMMA     int    <l:$34b, c:$34a>
N005 (  8, 11) [000265] -----------                            +--*  NOP       void  
N014 (  8,  8) [000270] ---XGO-----                            \--*  IND       int    <l:$349, c:$348>
N013 (  6,  7) [000271] ----GO-N---                               \--*  ADD       byref  <l:$282, c:$283>
N006 (  1,  1) [000272] -----------                                  +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N012 (  5,  6) [000273] -------N---                                  \--*  LSH       long   $402
N010 (  4,  5) [000274] ---------U-                                     +--*  CAST      long <- uint $401
N009 (  3,  3) [000275] -----------                                     |  \--*  ADD       int    $347
N007 (  1,  1) [000276] -----------                                     |     +--*  LCL_VAR   int    V02 loc0         u:4 $440
N008 (  1,  1) [000277] -----------                                     |     \--*  CNS_INT   int    1 $c1
N011 (  1,  1) [000278] -----------                                     \--*  CNS_INT   long   2 $242
Looking for array size assertions for: $300
ArrSize for lengthVN:300 = 0
[RangeCheck::GetRangeWorker] BB31 N001 (  1,  1) [000288] -----------                         *  LCL_VAR   int    V04 loc2         u:8 $441
{
----------------------------------------------------
N004 (  0,  0) [000598] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:8 $VN.Void
N003 (  0,  0) [000597] -----------                         \--*  PHI       int    $441
N001 (  0,  0) [000631] ----------- pred BB42                  +--*  PHI_ARG   int    V04 loc2         u:9
N002 (  0,  0) [000624] ----------- pred BB29                  \--*  PHI_ARG   int    V04 loc2         u:7 $440
----------------------------------------------------
   [RangeCheck::GetRangeWorker] BB30 N003 (  0,  0) [000597] -----------                         *  PHI       int    $441
N001 (  0,  0) [000631] ----------- pred BB42               +--*  PHI_ARG   int    V04 loc2         u:9
N002 (  0,  0) [000624] ----------- pred BB29               \--*  PHI_ARG   int    V04 loc2         u:7 $440
   {
      [RangeCheck::GetRangeWorker] BB30 N001 (  0,  0) [000631] -----------                         *  PHI_ARG   int    V04 loc2         u:9
      {
----------------------------------------------------
N004 (  3,  3) [000405] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:9 $VN.Void
N003 (  3,  3) [000406] -----------                         \--*  ADD       int    $366
N001 (  1,  1) [000407] -----------                            +--*  LCL_VAR   int    V04 loc2         u:8 (last use) $441
N002 (  1,  1) [000408] -----------                            \--*  CNS_INT   int    -1 $c2
----------------------------------------------------
         [RangeCheck::GetRangeWorker] BB42 N003 (  3,  3) [000406] -----------                         *  ADD       int    $366
N001 (  1,  1) [000407] -----------                         +--*  LCL_VAR   int    V04 loc2         u:8 (last use) $441
N002 (  1,  1) [000408] -----------                         \--*  CNS_INT   int    -1 $c2
         {
            [RangeCheck::GetRangeWorker] BB42 N001 (  1,  1) [000407] -----------                         *  LCL_VAR   int    V04 loc2         u:8 (last use) $441
            {
----------------------------------------------------
N004 (  0,  0) [000598] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:8 $VN.Void
N003 (  0,  0) [000597] -----------                         \--*  PHI       int    $441
N001 (  0,  0) [000631] ----------- pred BB42                  +--*  PHI_ARG   int    V04 loc2         u:9
N002 (  0,  0) [000624] ----------- pred BB29                  \--*  PHI_ARG   int    V04 loc2         u:7 $440
----------------------------------------------------
               [RangeCheck::GetRangeWorker] BB30 N003 (  0,  0) [000597] -----------                         *  PHI       int    $441
N001 (  0,  0) [000631] ----------- pred BB42               +--*  PHI_ARG   int    V04 loc2         u:9
N002 (  0,  0) [000624] ----------- pred BB29               \--*  PHI_ARG   int    V04 loc2         u:7 $440
               {
PhiArg [000631] is already being computed
Merging assertions from pred edges of BB30 for op [000631] $ffffffff
Merge assertions created by BB42 for BB30
#02 #29 #31 #33 #34 #40 #42
Merging ranges <Undef, Undef> <Dependent, Dependent>:<Dependent, Dependent>
                  [RangeCheck::GetRangeWorker] BB30 N002 (  0,  0) [000624] -----------                         *  PHI_ARG   int    V04 loc2         u:7 $440
                  {
----------------------------------------------------
N002 (  1,  3) [000279] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:7 $VN.Void
N001 (  1,  1) [000280] -----------                         \--*  LCL_VAR   int    V02 loc0         u:4 $440
----------------------------------------------------
                     [RangeCheck::GetRangeWorker] BB29 N001 (  1,  1) [000280] -----------                         *  LCL_VAR   int    V02 loc0         u:4 $440
                     {
----------------------------------------------------
N004 (  0,  0) [000596] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:4 $VN.Void
N003 (  0,  0) [000595] -----------                         \--*  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43                  +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0
----------------------------------------------------
                        [RangeCheck::GetRangeWorker] BB28 N003 (  0,  0) [000595] -----------                         *  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43               +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27               \--*  PHI_ARG   int    V02 loc0         u:1 $c0
                        {
                           [RangeCheck::GetRangeWorker] BB28 N001 (  0,  0) [000632] -----------                         *  PHI_ARG   int    V02 loc0         u:5
                           {
----------------------------------------------------
N004 (  3,  3) [000425] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:5 $VN.Void
N003 (  3,  3) [000426] -----------                         \--*  ADD       int    $347
N001 (  1,  1) [000427] -----------                            +--*  LCL_VAR   int    V02 loc0         u:4 (last use) $440
N002 (  1,  1) [000428] -----------                            \--*  CNS_INT   int    1 $c1
----------------------------------------------------
                              [RangeCheck::GetRangeWorker] BB43 N003 (  3,  3) [000426] -----------                         *  ADD       int    $347
N001 (  1,  1) [000427] -----------                         +--*  LCL_VAR   int    V02 loc0         u:4 (last use) $440
N002 (  1,  1) [000428] -----------                         \--*  CNS_INT   int    1 $c1
                              {
                                 [RangeCheck::GetRangeWorker] BB43 N001 (  1,  1) [000427] -----------                         *  LCL_VAR   int    V02 loc0         u:4 (last use) $440
                                 {
----------------------------------------------------
N004 (  0,  0) [000596] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:4 $VN.Void
N003 (  0,  0) [000595] -----------                         \--*  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43                  +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0
----------------------------------------------------
                                    [RangeCheck::GetRangeWorker] BB28 N003 (  0,  0) [000595] -----------                         *  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43               +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27               \--*  PHI_ARG   int    V02 loc0         u:1 $c0
                                    {
PhiArg [000632] is already being computed
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Merging ranges <Undef, Undef> <0, $300 + -1>:<0, $300 + -1>
                                       [RangeCheck::GetRangeWorker] BB28 N002 (  0,  0) [000623] -----------                         *  PHI_ARG   int    V02 loc0         u:1 $c0
                                       {
                                          Computed Range [000623] => <0, 0>
                                       }
Merging assertions from pred edges of BB28 for op [000623] $c0
Merging ranges <0, $300 + -1> <0, 0>:<0, Unknown>
                                       Computed Range [000595] => <0, Unknown>
                                    }
Merge assertions from BB43: #29 #31 for definition [000596]
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB43 for op [000427] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                    Computed Range [000427] => <0, $300 + -2>
                                 }
Merging assertions from pred edges of BB43 for op [000427] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                 [RangeCheck::GetRangeWorker] BB43 N002 (  1,  1) [000428] -----------                         *  CNS_INT   int    1 $c1
                                 {
                                    Computed Range [000428] => <1, 1>
                                 }
Merging assertions from pred edges of BB43 for op [000428] $c1
BinOp add ranges <0, $300 + -2> <1, 1> = <1, $300 + -1>
                                 Computed Range [000426] => <1, $300 + -1>
                              }
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
                              Computed Range [000632] => <1, $300 + -1>
                           }
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
Merging ranges <Undef, Undef> <1, $300 + -1>:<1, $300 + -1>
                           [RangeCheck::GetRangeWorker] BB28 N002 (  0,  0) [000623] -----------                         *  PHI_ARG   int    V02 loc0         u:1 $c0
                           {
                              Cached Range [000623] => <0, 0>
                           }
Merging assertions from pred edges of BB28 for op [000623] $c0
Merging ranges <1, $300 + -1> <0, 0>:<0, Unknown>
                           Computed Range [000595] => <0, Unknown>
                        }
Merge assertions from BB29: #29 for definition [000596]
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB29 for op [000280] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                        Computed Range [000280] => <0, $300 + -2>
                     }
Merge assertions from BB30: #29 #31 for definition [000279]
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB30 for op [000624] $440
Merge assertions created by BB29 for BB30
#29 #31
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                     Computed Range [000624] => <0, $300 + -2>
                  }
Merging assertions from pred edges of BB30 for op [000624] $440
Merge assertions created by BB29 for BB30
#29 #31
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Merging ranges <Dependent, Dependent> <0, $300 + -2>:<Dependent, Dependent>
                  Computed Range [000597] => <Dependent, Dependent>
               }
Merge assertions from BB42: #02 #29 #31 #33 #34 #40 for definition [000598]
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<0, Unknown>] into [<0, Dependent>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, Dependent>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
done merging
Merging assertions from pred edges of BB42 for op [000407] $441
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, Unknown>] into [<0, $300 + -1>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
               Computed Range [000407] => <0, $300 + -1>
            }
Merging assertions from pred edges of BB42 for op [000407] $441
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, Unknown>] into [<0, $300 + -1>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
            [RangeCheck::GetRangeWorker] BB42 N002 (  1,  1) [000408] -----------                         *  CNS_INT   int    -1 $c2
            {
               Computed Range [000408] => <-1, -1>
            }
Merging assertions from pred edges of BB42 for op [000408] $c2
BinOp add ranges <0, $300 + -1> <-1, -1> = <-1, $300 + -2>
            Computed Range [000406] => <-1, $300 + -2>
         }
Merge assertions from BB30: #29 #31 for definition [000405]
done merging
Merging assertions from pred edges of BB30 for op [000631] $ffffffff
Merge assertions created by BB42 for BB30
#02 #29 #31 #33 #34 #40 #42
         Computed Range [000631] => <-1, $300 + -2>
      }
Merging assertions from pred edges of BB30 for op [000631] $ffffffff
Merge assertions created by BB42 for BB30
#02 #29 #31 #33 #34 #40 #42
Merging ranges <Undef, Undef> <-1, $300 + -2>:<-1, $300 + -2>
      [RangeCheck::GetRangeWorker] BB30 N002 (  0,  0) [000624] -----------                         *  PHI_ARG   int    V04 loc2         u:7 $440
      {
         Cached Range [000624] => <0, $300 + -2>
      }
Merging assertions from pred edges of BB30 for op [000624] $440
Merge assertions created by BB29 for BB30
#29 #31
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Merging ranges <-1, $300 + -2> <0, $300 + -2>:<-1, $300 + -2>
      Computed Range [000597] => <-1, $300 + -2>
   }
Merge assertions from BB31: #29 #31 #33 for definition [000598]
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<-1, $300 + -2>] with assertedRange: [<0, Unknown>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB31 for op [000288] $441
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<0, Unknown>] into [<0, $300 + -2>]
   Computed Range [000288] => <0, $300 + -2>
}
Does overflow [000288]?
Merging assertions from pred edges of BB31 for op [000288] $441
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, Unknown>] into [<0, Unknown>]
Does overflow [000597]?
Does overflow [000631]?
Merging assertions from pred edges of BB30 for op [000631] $ffffffff
Merge assertions created by BB42 for BB30
#02 #29 #31 #33 #34 #40 #42
Does overflow [000406]?
Does overflow [000407]?
Merging assertions from pred edges of BB42 for op [000407] $441
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, Unknown>] into [<0, Unknown>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Does overflow [000597]?
Does overflow [000624]?
Merging assertions from pred edges of BB30 for op [000624] $440
Merge assertions created by BB29 for BB30
#29 #31
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000280]?
Merging assertions from pred edges of BB29 for op [000280] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000595]?
Does overflow [000632]?
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Does overflow [000426]?
Does overflow [000427]?
Merging assertions from pred edges of BB43 for op [000427] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000595]?
Does overflow [000623]?
[000623] does not overflow
[000595] does not overflow
[000427] does not overflow
Does overflow [000428]?
[000428] does not overflow
Checking bin op overflow ADD <0, $300 + -2> <1, 1>
[000426] does not overflow
[000632] does not overflow
[000595] does not overflow
[000280] does not overflow
[000624] does not overflow
[000597] does not overflow
[000407] does not overflow
Does overflow [000408]?
[000408] does not overflow
Checking bin op overflow ADD <0, $300 + -1> <-1, -1>
[000406] does not overflow
[000631] does not overflow
[000597] does not overflow
[000288] does not overflow
Range value <0, $300 + -2>
[RangeCheck::Widen] BB31, 
[000288]
<0, $300 + -2> BetweenBounds <0, [000289]>
$300 upper bound is:  {MemOpaque:NotInLoop}
Array size is: 0
[RangeCheck::OptimizeRangeCheck] Between bounds
Before optRemoveRangeCheck:
N011 ( 12, 15) [000286] ---XGO-----                         *  COMMA     int    <l:$350, c:$34f>
N003 (  6,  9) [000287] ---XGO-----                         +--*  BOUNDS_CHECK_Rng void   <l:$3d3, c:$3d2>
N001 (  1,  1) [000288] -----------                         |  +--*  LCL_VAR   int    V04 loc2         u:8 $441
N002 (  1,  1) [000289] -----------                         |  \--*  LCL_VAR   int    V16 tmp11        u:1 <l:$2c0, c:$300>
N010 (  6,  6) [000290] ---XGO-----                         \--*  IND       int    <l:$34e, c:$34d>
N009 (  4,  5) [000291] ----GO-N---                            \--*  ADD       byref  <l:$284, c:$285>
N004 (  1,  1) [000292] -----------                               +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N008 (  3,  4) [000293] -------N---                               \--*  LSH       long   $404
N006 (  2,  3) [000294] ---------U-                                  +--*  CAST      long <- uint $403
N005 (  1,  1) [000295] -----------                                  |  \--*  LCL_VAR   int    V04 loc2         u:8 $441
N007 (  1,  1) [000296] -----------                                  \--*  CNS_INT   long   2 $242
After optRemoveRangeCheck for [000286]:
N012 ( 12, 15) [000285] DA-XGO-----                         *  STORE_LCL_VAR int    V07 tmp2         d:3 <l:$3d9, c:$3d8>
N011 ( 12, 15) [000286] ---XGO-N---                         \--*  COMMA     int    <l:$350, c:$34f>
N003 (  6,  9) [000287] -----------                            +--*  NOP       void  
N010 (  6,  6) [000290] ---XGO-----                            \--*  IND       int    <l:$34e, c:$34d>
N009 (  4,  5) [000291] ----GO-N---                               \--*  ADD       byref  <l:$284, c:$285>
N004 (  1,  1) [000292] -----------                                  +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N008 (  3,  4) [000293] -------N---                                  \--*  LSH       long   $404
N006 (  2,  3) [000294] ---------U-                                     +--*  CAST      long <- uint $403
N005 (  1,  1) [000295] -----------                                     |  \--*  LCL_VAR   int    V04 loc2         u:8 $441
N007 (  1,  1) [000296] -----------                                     \--*  CNS_INT   long   2 $242
Looking for array size assertions for: $305
ArrSize for lengthVN:305 = 0
[RangeCheck::GetRangeWorker] BB33 N001 (  1,  1) [000320] -----------                         *  LCL_VAR   int    V03 loc1         u:2 <l:$2c1, c:$301>
{
----------------------------------------------------
N012 (  8,  8) [000263] DA-XGO-----                         *  STORE_LCL_VAR int    V03 loc1         d:2 <l:$3cd, c:$3cc>
N011 (  8,  8) [000264] ---XGO-N---                         \--*  COMMA     int    <l:$34b, c:$34a>
N001 (  0,  0) [000265] -----------                            +--*  NOP       void  
N010 (  8,  8) [000270] ---XGO-----                            \--*  IND       int    <l:$349, c:$348>
N009 (  6,  7) [000271] ----GO-N---                               \--*  ADD       byref  <l:$282, c:$283>
N002 (  1,  1) [000272] -----------                                  +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N008 (  5,  6) [000273] -------N---                                  \--*  LSH       long   $402
N006 (  4,  5) [000274] ---------U-                                     +--*  CAST      long <- uint $401
N005 (  3,  3) [000275] -----------                                     |  \--*  ADD       int    $347
N003 (  1,  1) [000276] -----------                                     |     +--*  LCL_VAR   int    V02 loc0         u:4 $440
N004 (  1,  1) [000277] -----------                                     |     \--*  CNS_INT   int    1 $c1
N007 (  1,  1) [000278] -----------                                     \--*  CNS_INT   long   2 $242
----------------------------------------------------
   [RangeCheck::GetRangeWorker] BB29 N011 (  8,  8) [000264] ---XGO-N---                         *  COMMA     int    <l:$34b, c:$34a>
N001 (  0,  0) [000265] -----------                         +--*  NOP       void  
N010 (  8,  8) [000270] ---XGO-----                         \--*  IND       int    <l:$349, c:$348>
N009 (  6,  7) [000271] ----GO-N---                            \--*  ADD       byref  <l:$282, c:$283>
N002 (  1,  1) [000272] -----------                               +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N008 (  5,  6) [000273] -------N---                               \--*  LSH       long   $402
N006 (  4,  5) [000274] ---------U-                                  +--*  CAST      long <- uint $401
N005 (  3,  3) [000275] -----------                                  |  \--*  ADD       int    $347
N003 (  1,  1) [000276] -----------                                  |     +--*  LCL_VAR   int    V02 loc0         u:4 $440
N004 (  1,  1) [000277] -----------                                  |     \--*  CNS_INT   int    1 $c1
N007 (  1,  1) [000278] -----------                                  \--*  CNS_INT   long   2 $242
   {
      [RangeCheck::GetRangeWorker] BB29 N010 (  8,  8) [000270] ---XGO-----                         *  IND       int    <l:$349, c:$348>
N009 (  6,  7) [000271] ----GO-N---                         \--*  ADD       byref  <l:$282, c:$283>
N002 (  1,  1) [000272] -----------                            +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N008 (  5,  6) [000273] -------N---                            \--*  LSH       long   $402
N006 (  4,  5) [000274] ---------U-                               +--*  CAST      long <- uint $401
N005 (  3,  3) [000275] -----------                               |  \--*  ADD       int    $347
N003 (  1,  1) [000276] -----------                               |     +--*  LCL_VAR   int    V02 loc0         u:4 $440
N004 (  1,  1) [000277] -----------                               |     \--*  CNS_INT   int    1 $c1
N007 (  1,  1) [000278] -----------                               \--*  CNS_INT   long   2 $242
      {
         Computed Range [000270] => <Unknown, Unknown>
      }
      Computed Range [000264] => <Unknown, Unknown>
   }
Merge assertions from BB33: #02 #29 #31 #33 #34 for definition [000263]
done merging
Merging assertions from pred edges of BB33 for op [000320] $301
   Computed Range [000320] => <Unknown, Unknown>
}
Range is completely unknown.
Failed to get range
Looking for array size assertions for: $305
ArrSize for lengthVN:305 = 0
[RangeCheck::GetRangeWorker] BB33 N001 (  1,  1) [000336] -----------                         *  LCL_VAR   int    V07 tmp2         u:3 <l:$2c2, c:$302>
{
----------------------------------------------------
N010 (  6,  6) [000285] DA-XGO-----                         *  STORE_LCL_VAR int    V07 tmp2         d:3 <l:$3d9, c:$3d8>
N009 (  6,  6) [000286] ---XGO-N---                         \--*  COMMA     int    <l:$350, c:$34f>
N001 (  0,  0) [000287] -----------                            +--*  NOP       void  
N008 (  6,  6) [000290] ---XGO-----                            \--*  IND       int    <l:$34e, c:$34d>
N007 (  4,  5) [000291] ----GO-N---                               \--*  ADD       byref  <l:$284, c:$285>
N002 (  1,  1) [000292] -----------                                  +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N006 (  3,  4) [000293] -------N---                                  \--*  LSH       long   $404
N004 (  2,  3) [000294] ---------U-                                     +--*  CAST      long <- uint $403
N003 (  1,  1) [000295] -----------                                     |  \--*  LCL_VAR   int    V04 loc2         u:8 $441
N005 (  1,  1) [000296] -----------                                     \--*  CNS_INT   long   2 $242
----------------------------------------------------
   [RangeCheck::GetRangeWorker] BB31 N009 (  6,  6) [000286] ---XGO-N---                         *  COMMA     int    <l:$350, c:$34f>
N001 (  0,  0) [000287] -----------                         +--*  NOP       void  
N008 (  6,  6) [000290] ---XGO-----                         \--*  IND       int    <l:$34e, c:$34d>
N007 (  4,  5) [000291] ----GO-N---                            \--*  ADD       byref  <l:$284, c:$285>
N002 (  1,  1) [000292] -----------                               +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N006 (  3,  4) [000293] -------N---                               \--*  LSH       long   $404
N004 (  2,  3) [000294] ---------U-                                  +--*  CAST      long <- uint $403
N003 (  1,  1) [000295] -----------                                  |  \--*  LCL_VAR   int    V04 loc2         u:8 $441
N005 (  1,  1) [000296] -----------                                  \--*  CNS_INT   long   2 $242
   {
      [RangeCheck::GetRangeWorker] BB31 N008 (  6,  6) [000290] ---XGO-----                         *  IND       int    <l:$34e, c:$34d>
N007 (  4,  5) [000291] ----GO-N---                         \--*  ADD       byref  <l:$284, c:$285>
N002 (  1,  1) [000292] -----------                            +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N006 (  3,  4) [000293] -------N---                            \--*  LSH       long   $404
N004 (  2,  3) [000294] ---------U-                               +--*  CAST      long <- uint $403
N003 (  1,  1) [000295] -----------                               |  \--*  LCL_VAR   int    V04 loc2         u:8 $441
N005 (  1,  1) [000296] -----------                               \--*  CNS_INT   long   2 $242
      {
         Computed Range [000290] => <Unknown, Unknown>
      }
      Computed Range [000286] => <Unknown, Unknown>
   }
Merge assertions from BB33: #02 #29 #31 #33 #34 for definition [000285]
done merging
Merging assertions from pred edges of BB33 for op [000336] $302
   Computed Range [000336] => <Unknown, Unknown>
}
Range is completely unknown.
Failed to get range
Looking for array size assertions for: $300
ArrSize for lengthVN:300 = 0
[RangeCheck::GetRangeWorker] BB42 N006 ( 10,  8) [000652] -A---------                         *  COMMA     int    $361
N004 (  7,  6) [000650] DA---------                         +--*  STORE_LCL_VAR int    V22 cse4         d:1 $VN.Void
N003 (  3,  3) [000382] -----------                         |  \--*  ADD       int    $361
N001 (  1,  1) [000383] -----------                         |     +--*  LCL_VAR   int    V04 loc2         u:8 $441
N002 (  1,  1) [000384] -----------                         |     \--*  CNS_INT   int    1 $c1
N005 (  3,  2) [000651] -----------                         \--*  LCL_VAR   int    V22 cse4         u:1 $361
{
   [RangeCheck::GetRangeWorker] BB42 N005 (  3,  2) [000651] -----------                         *  LCL_VAR   int    V22 cse4         u:1 $361
   {
----------------------------------------------------
N004 (  7,  6) [000650] DA---------                         *  STORE_LCL_VAR int    V22 cse4         d:1 $VN.Void
N003 (  3,  3) [000382] -----------                         \--*  ADD       int    $361
N001 (  1,  1) [000383] -----------                            +--*  LCL_VAR   int    V04 loc2         u:8 $441
N002 (  1,  1) [000384] -----------                            \--*  CNS_INT   int    1 $c1
----------------------------------------------------
      [RangeCheck::GetRangeWorker] BB42 N003 (  3,  3) [000382] -----------                         *  ADD       int    $361
N001 (  1,  1) [000383] -----------                         +--*  LCL_VAR   int    V04 loc2         u:8 $441
N002 (  1,  1) [000384] -----------                         \--*  CNS_INT   int    1 $c1
      {
         [RangeCheck::GetRangeWorker] BB42 N001 (  1,  1) [000383] -----------                         *  LCL_VAR   int    V04 loc2         u:8 $441
         {
----------------------------------------------------
N004 (  0,  0) [000598] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:8 $VN.Void
N003 (  0,  0) [000597] -----------                         \--*  PHI       int    $441
N001 (  0,  0) [000631] ----------- pred BB42                  +--*  PHI_ARG   int    V04 loc2         u:9
N002 (  0,  0) [000624] ----------- pred BB29                  \--*  PHI_ARG   int    V04 loc2         u:7 $440
----------------------------------------------------
            [RangeCheck::GetRangeWorker] BB30 N003 (  0,  0) [000597] -----------                         *  PHI       int    $441
N001 (  0,  0) [000631] ----------- pred BB42               +--*  PHI_ARG   int    V04 loc2         u:9
N002 (  0,  0) [000624] ----------- pred BB29               \--*  PHI_ARG   int    V04 loc2         u:7 $440
            {
               [RangeCheck::GetRangeWorker] BB30 N001 (  0,  0) [000631] -----------                         *  PHI_ARG   int    V04 loc2         u:9
               {
----------------------------------------------------
N004 (  3,  3) [000405] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:9 $VN.Void
N003 (  3,  3) [000406] -----------                         \--*  ADD       int    $366
N001 (  1,  1) [000407] -----------                            +--*  LCL_VAR   int    V04 loc2         u:8 (last use) $441
N002 (  1,  1) [000408] -----------                            \--*  CNS_INT   int    -1 $c2
----------------------------------------------------
                  [RangeCheck::GetRangeWorker] BB42 N003 (  3,  3) [000406] -----------                         *  ADD       int    $366
N001 (  1,  1) [000407] -----------                         +--*  LCL_VAR   int    V04 loc2         u:8 (last use) $441
N002 (  1,  1) [000408] -----------                         \--*  CNS_INT   int    -1 $c2
                  {
                     [RangeCheck::GetRangeWorker] BB42 N001 (  1,  1) [000407] -----------                         *  LCL_VAR   int    V04 loc2         u:8 (last use) $441
                     {
----------------------------------------------------
N004 (  0,  0) [000598] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:8 $VN.Void
N003 (  0,  0) [000597] -----------                         \--*  PHI       int    $441
N001 (  0,  0) [000631] ----------- pred BB42                  +--*  PHI_ARG   int    V04 loc2         u:9
N002 (  0,  0) [000624] ----------- pred BB29                  \--*  PHI_ARG   int    V04 loc2         u:7 $440
----------------------------------------------------
                        [RangeCheck::GetRangeWorker] BB30 N003 (  0,  0) [000597] -----------                         *  PHI       int    $441
N001 (  0,  0) [000631] ----------- pred BB42               +--*  PHI_ARG   int    V04 loc2         u:9
N002 (  0,  0) [000624] ----------- pred BB29               \--*  PHI_ARG   int    V04 loc2         u:7 $440
                        {
PhiArg [000631] is already being computed
Merging assertions from pred edges of BB30 for op [000631] $ffffffff
Merge assertions created by BB42 for BB30
#02 #29 #31 #33 #34 #40 #42
Merging ranges <Undef, Undef> <Dependent, Dependent>:<Dependent, Dependent>
                           [RangeCheck::GetRangeWorker] BB30 N002 (  0,  0) [000624] -----------                         *  PHI_ARG   int    V04 loc2         u:7 $440
                           {
----------------------------------------------------
N002 (  1,  3) [000279] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:7 $VN.Void
N001 (  1,  1) [000280] -----------                         \--*  LCL_VAR   int    V02 loc0         u:4 $440
----------------------------------------------------
                              [RangeCheck::GetRangeWorker] BB29 N001 (  1,  1) [000280] -----------                         *  LCL_VAR   int    V02 loc0         u:4 $440
                              {
----------------------------------------------------
N004 (  0,  0) [000596] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:4 $VN.Void
N003 (  0,  0) [000595] -----------                         \--*  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43                  +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0
----------------------------------------------------
                                 [RangeCheck::GetRangeWorker] BB28 N003 (  0,  0) [000595] -----------                         *  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43               +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27               \--*  PHI_ARG   int    V02 loc0         u:1 $c0
                                 {
                                    [RangeCheck::GetRangeWorker] BB28 N001 (  0,  0) [000632] -----------                         *  PHI_ARG   int    V02 loc0         u:5
                                    {
----------------------------------------------------
N004 (  3,  3) [000425] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:5 $VN.Void
N003 (  3,  3) [000426] -----------                         \--*  ADD       int    $347
N001 (  1,  1) [000427] -----------                            +--*  LCL_VAR   int    V02 loc0         u:4 (last use) $440
N002 (  1,  1) [000428] -----------                            \--*  CNS_INT   int    1 $c1
----------------------------------------------------
                                       [RangeCheck::GetRangeWorker] BB43 N003 (  3,  3) [000426] -----------                         *  ADD       int    $347
N001 (  1,  1) [000427] -----------                         +--*  LCL_VAR   int    V02 loc0         u:4 (last use) $440
N002 (  1,  1) [000428] -----------                         \--*  CNS_INT   int    1 $c1
                                       {
                                          [RangeCheck::GetRangeWorker] BB43 N001 (  1,  1) [000427] -----------                         *  LCL_VAR   int    V02 loc0         u:4 (last use) $440
                                          {
----------------------------------------------------
N004 (  0,  0) [000596] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:4 $VN.Void
N003 (  0,  0) [000595] -----------                         \--*  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43                  +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0
----------------------------------------------------
                                             [RangeCheck::GetRangeWorker] BB28 N003 (  0,  0) [000595] -----------                         *  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43               +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27               \--*  PHI_ARG   int    V02 loc0         u:1 $c0
                                             {
PhiArg [000632] is already being computed
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Merging ranges <Undef, Undef> <0, $300 + -1>:<0, $300 + -1>
                                                [RangeCheck::GetRangeWorker] BB28 N002 (  0,  0) [000623] -----------                         *  PHI_ARG   int    V02 loc0         u:1 $c0
                                                {
                                                   Computed Range [000623] => <0, 0>
                                                }
Merging assertions from pred edges of BB28 for op [000623] $c0
Merging ranges <0, $300 + -1> <0, 0>:<0, Unknown>
                                                Computed Range [000595] => <0, Unknown>
                                             }
Merge assertions from BB43: #29 #31 for definition [000596]
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB43 for op [000427] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                             Computed Range [000427] => <0, $300 + -2>
                                          }
Merging assertions from pred edges of BB43 for op [000427] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                          [RangeCheck::GetRangeWorker] BB43 N002 (  1,  1) [000428] -----------                         *  CNS_INT   int    1 $c1
                                          {
                                             Computed Range [000428] => <1, 1>
                                          }
Merging assertions from pred edges of BB43 for op [000428] $c1
BinOp add ranges <0, $300 + -2> <1, 1> = <1, $300 + -1>
                                          Computed Range [000426] => <1, $300 + -1>
                                       }
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
                                       Computed Range [000632] => <1, $300 + -1>
                                    }
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
Merging ranges <Undef, Undef> <1, $300 + -1>:<1, $300 + -1>
                                    [RangeCheck::GetRangeWorker] BB28 N002 (  0,  0) [000623] -----------                         *  PHI_ARG   int    V02 loc0         u:1 $c0
                                    {
                                       Cached Range [000623] => <0, 0>
                                    }
Merging assertions from pred edges of BB28 for op [000623] $c0
Merging ranges <1, $300 + -1> <0, 0>:<0, Unknown>
                                    Computed Range [000595] => <0, Unknown>
                                 }
Merge assertions from BB29: #29 for definition [000596]
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB29 for op [000280] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                 Computed Range [000280] => <0, $300 + -2>
                              }
Merge assertions from BB30: #29 #31 for definition [000279]
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB30 for op [000624] $440
Merge assertions created by BB29 for BB30
#29 #31
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                              Computed Range [000624] => <0, $300 + -2>
                           }
Merging assertions from pred edges of BB30 for op [000624] $440
Merge assertions created by BB29 for BB30
#29 #31
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Merging ranges <Dependent, Dependent> <0, $300 + -2>:<Dependent, Dependent>
                           Computed Range [000597] => <Dependent, Dependent>
                        }
Merge assertions from BB42: #02 #29 #31 #33 #34 #40 for definition [000598]
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<0, Unknown>] into [<0, Dependent>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, Dependent>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
done merging
Merging assertions from pred edges of BB42 for op [000407] $441
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, Unknown>] into [<0, $300 + -1>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
                        Computed Range [000407] => <0, $300 + -1>
                     }
Merging assertions from pred edges of BB42 for op [000407] $441
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, Unknown>] into [<0, $300 + -1>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
                     [RangeCheck::GetRangeWorker] BB42 N002 (  1,  1) [000408] -----------                         *  CNS_INT   int    -1 $c2
                     {
                        Computed Range [000408] => <-1, -1>
                     }
Merging assertions from pred edges of BB42 for op [000408] $c2
BinOp add ranges <0, $300 + -1> <-1, -1> = <-1, $300 + -2>
                     Computed Range [000406] => <-1, $300 + -2>
                  }
Merge assertions from BB30: #29 #31 for definition [000405]
done merging
Merging assertions from pred edges of BB30 for op [000631] $ffffffff
Merge assertions created by BB42 for BB30
#02 #29 #31 #33 #34 #40 #42
                  Computed Range [000631] => <-1, $300 + -2>
               }
Merging assertions from pred edges of BB30 for op [000631] $ffffffff
Merge assertions created by BB42 for BB30
#02 #29 #31 #33 #34 #40 #42
Merging ranges <Undef, Undef> <-1, $300 + -2>:<-1, $300 + -2>
               [RangeCheck::GetRangeWorker] BB30 N002 (  0,  0) [000624] -----------                         *  PHI_ARG   int    V04 loc2         u:7 $440
               {
                  Cached Range [000624] => <0, $300 + -2>
               }
Merging assertions from pred edges of BB30 for op [000624] $440
Merge assertions created by BB29 for BB30
#29 #31
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Merging ranges <-1, $300 + -2> <0, $300 + -2>:<-1, $300 + -2>
               Computed Range [000597] => <-1, $300 + -2>
            }
Merge assertions from BB42: #02 #29 #31 #33 #34 #40 for definition [000598]
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<-1, $300 + -2>] with assertedRange: [<0, Unknown>] into [<0, $300 + -2>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB42 for op [000383] $441
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<0, Unknown>] into [<0, $300 + -2>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -2>]
            Computed Range [000383] => <0, $300 + -2>
         }
Merging assertions from pred edges of BB42 for op [000383] $441
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<0, Unknown>] into [<0, $300 + -2>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -2>]
         [RangeCheck::GetRangeWorker] BB42 N002 (  1,  1) [000384] -----------                         *  CNS_INT   int    1 $c1
         {
            Computed Range [000384] => <1, 1>
         }
Merging assertions from pred edges of BB42 for op [000384] $c1
BinOp add ranges <0, $300 + -2> <1, 1> = <1, $300 + -1>
         Computed Range [000382] => <1, $300 + -1>
      }
Merge assertions from BB42: #02 #29 #31 #33 #34 #40 for definition [000650]
done merging
Merging assertions from pred edges of BB42 for op [000651] $361
      Computed Range [000651] => <1, $300 + -1>
   }
   Computed Range [000652] => <1, $300 + -1>
}
Does overflow [000652]?
Does overflow [000651]?
Merging assertions from pred edges of BB42 for op [000651] $361
Does overflow [000382]?
Does overflow [000383]?
Merging assertions from pred edges of BB42 for op [000383] $441
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, Unknown>] into [<0, Unknown>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Does overflow [000597]?
Does overflow [000631]?
Merging assertions from pred edges of BB30 for op [000631] $ffffffff
Merge assertions created by BB42 for BB30
#02 #29 #31 #33 #34 #40 #42
Does overflow [000406]?
Does overflow [000407]?
Merging assertions from pred edges of BB42 for op [000407] $441
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, Unknown>] into [<0, Unknown>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Does overflow [000597]?
Does overflow [000624]?
Merging assertions from pred edges of BB30 for op [000624] $440
Merge assertions created by BB29 for BB30
#29 #31
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000280]?
Merging assertions from pred edges of BB29 for op [000280] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000595]?
Does overflow [000632]?
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Does overflow [000426]?
Does overflow [000427]?
Merging assertions from pred edges of BB43 for op [000427] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000595]?
Does overflow [000623]?
[000623] does not overflow
[000595] does not overflow
[000427] does not overflow
Does overflow [000428]?
[000428] does not overflow
Checking bin op overflow ADD <0, $300 + -2> <1, 1>
[000426] does not overflow
[000632] does not overflow
[000595] does not overflow
[000280] does not overflow
[000624] does not overflow
[000597] does not overflow
[000407] does not overflow
Does overflow [000408]?
[000408] does not overflow
Checking bin op overflow ADD <0, $300 + -1> <-1, -1>
[000406] does not overflow
[000631] does not overflow
[000597] does not overflow
[000383] does not overflow
Does overflow [000384]?
[000384] does not overflow
Checking bin op overflow ADD <0, $300 + -2> <1, 1>
[000382] does not overflow
[000651] does not overflow
[000652] does not overflow
Range value <1, $300 + -1>
[RangeCheck::Widen] BB42, 
[000652]
<1, $300 + -1> BetweenBounds <0, [000385]>
$300 upper bound is:  {MemOpaque:NotInLoop}
Array size is: 0
[RangeCheck::OptimizeRangeCheck] Between bounds
Before optRemoveRangeCheck:
N015 ( 20, 21) [000380] -A-XGO-----                         *  COMMA     byref  <l:$290, c:$28f>
N008 ( 15, 16) [000381] -A-XGO-----                         +--*  BOUNDS_CHECK_Rng void   <l:$3fa, c:$3f9>
N006 ( 10,  8) [000652] -A---------                         |  +--*  COMMA     int    $361
N004 (  7,  6) [000650] DA---------                         |  |  +--*  STORE_LCL_VAR int    V22 cse4         d:1 $VN.Void
N003 (  3,  3) [000382] -----------                         |  |  |  \--*  ADD       int    $361
N001 (  1,  1) [000383] -----------                         |  |  |     +--*  LCL_VAR   int    V04 loc2         u:8 $441
N002 (  1,  1) [000384] -----------                         |  |  |     \--*  CNS_INT   int    1 $c1
N005 (  3,  2) [000651] -----------                         |  |  \--*  LCL_VAR   int    V22 cse4         u:1 $361
N007 (  1,  1) [000385] -----------                         |  \--*  LCL_VAR   int    V16 tmp11        u:1 <l:$2c0, c:$300>
N014 (  6,  6) [000386] ----GO-N---                         \--*  ADD       byref  <l:$28d, c:$28e>
N009 (  1,  1) [000387] -----------                            +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N013 (  5,  5) [000388] -------N---                            \--*  LSH       long   $414
N011 (  4,  4) [000389] ---------U-                               +--*  CAST      long <- uint $413
N010 (  3,  2) [000656] -----------                               |  \--*  LCL_VAR   int    V22 cse4         u:1 $361
N012 (  1,  1) [000393] -----------                               \--*  CNS_INT   long   2 $242
After optRemoveRangeCheck for [000380]:
N023 ( 30, 30) [000379] -A-XGO-----                         *  STOREIND  int    <l:$548, c:$545>
N015 ( 20, 21) [000380] -A--GO-N---                         +--*  COMMA     byref  <l:$290, c:$28f>
N004 (  7,  6) [000650] DA---------                         |  +--*  STORE_LCL_VAR int    V22 cse4         d:1 $VN.Void
N003 (  3,  3) [000382] -----------                         |  |  \--*  ADD       int    $361
N001 (  1,  1) [000383] -----------                         |  |     +--*  LCL_VAR   int    V04 loc2         u:8 $441
N002 (  1,  1) [000384] -----------                         |  |     \--*  CNS_INT   int    1 $c1
N014 (  6,  6) [000386] ----GO-N---                         |  \--*  ADD       byref  <l:$28d, c:$28e>
N009 (  1,  1) [000387] -----------                         |     +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N013 (  5,  5) [000388] -------N---                         |     \--*  LSH       long   $414
N011 (  4,  4) [000389] ---------U-                         |        +--*  CAST      long <- uint $413
N010 (  3,  2) [000656] -----------                         |        |  \--*  LCL_VAR   int    V22 cse4         u:1 $361
N012 (  1,  1) [000393] -----------                         |        \--*  CNS_INT   long   2 $242
N022 (  6,  6) [000398] ---XGO-N---                         \--*  IND       int    <l:$363, c:$362>
N021 (  4,  5) [000399] ----GO-N---                            \--*  ADD       byref  <l:$284, c:$285>
N016 (  1,  1) [000400] -----------                               +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N020 (  3,  4) [000401] -------N---                               \--*  LSH       long   $404
N018 (  2,  3) [000402] ---------U-                                  +--*  CAST      long <- uint $403
N017 (  1,  1) [000403] -----------                                  |  \--*  LCL_VAR   int    V04 loc2         u:8 $441
N019 (  1,  1) [000404] -----------                                  \--*  CNS_INT   long   2 $242
Looking for array size assertions for: $300
ArrSize for lengthVN:300 = 0
[RangeCheck::GetRangeWorker] BB43 N006 ( 10,  8) [000655] -A---------                         *  COMMA     int    $361
N004 (  7,  6) [000653] DA---------                         +--*  STORE_LCL_VAR int    V22 cse4         d:2 $VN.Void
N003 (  3,  3) [000412] -----------                         |  \--*  ADD       int    $361
N001 (  1,  1) [000413] -----------                         |     +--*  LCL_VAR   int    V04 loc2         u:8 $441
N002 (  1,  1) [000414] -----------                         |     \--*  CNS_INT   int    1 $c1
N005 (  3,  2) [000654] -----------                         \--*  LCL_VAR   int    V22 cse4         u:2 $361
{
   [RangeCheck::GetRangeWorker] BB43 N005 (  3,  2) [000654] -----------                         *  LCL_VAR   int    V22 cse4         u:2 $361
   {
----------------------------------------------------
N004 (  7,  6) [000653] DA---------                         *  STORE_LCL_VAR int    V22 cse4         d:2 $VN.Void
N003 (  3,  3) [000412] -----------                         \--*  ADD       int    $361
N001 (  1,  1) [000413] -----------                            +--*  LCL_VAR   int    V04 loc2         u:8 $441
N002 (  1,  1) [000414] -----------                            \--*  CNS_INT   int    1 $c1
----------------------------------------------------
      [RangeCheck::GetRangeWorker] BB43 N003 (  3,  3) [000412] -----------                         *  ADD       int    $361
N001 (  1,  1) [000413] -----------                         +--*  LCL_VAR   int    V04 loc2         u:8 $441
N002 (  1,  1) [000414] -----------                         \--*  CNS_INT   int    1 $c1
      {
         [RangeCheck::GetRangeWorker] BB43 N001 (  1,  1) [000413] -----------                         *  LCL_VAR   int    V04 loc2         u:8 $441
         {
----------------------------------------------------
N004 (  0,  0) [000598] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:8 $VN.Void
N003 (  0,  0) [000597] -----------                         \--*  PHI       int    $441
N001 (  0,  0) [000631] ----------- pred BB42                  +--*  PHI_ARG   int    V04 loc2         u:9
N002 (  0,  0) [000624] ----------- pred BB29                  \--*  PHI_ARG   int    V04 loc2         u:7 $440
----------------------------------------------------
            [RangeCheck::GetRangeWorker] BB30 N003 (  0,  0) [000597] -----------                         *  PHI       int    $441
N001 (  0,  0) [000631] ----------- pred BB42               +--*  PHI_ARG   int    V04 loc2         u:9
N002 (  0,  0) [000624] ----------- pred BB29               \--*  PHI_ARG   int    V04 loc2         u:7 $440
            {
               [RangeCheck::GetRangeWorker] BB30 N001 (  0,  0) [000631] -----------                         *  PHI_ARG   int    V04 loc2         u:9
               {
----------------------------------------------------
N004 (  3,  3) [000405] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:9 $VN.Void
N003 (  3,  3) [000406] -----------                         \--*  ADD       int    $366
N001 (  1,  1) [000407] -----------                            +--*  LCL_VAR   int    V04 loc2         u:8 (last use) $441
N002 (  1,  1) [000408] -----------                            \--*  CNS_INT   int    -1 $c2
----------------------------------------------------
                  [RangeCheck::GetRangeWorker] BB42 N003 (  3,  3) [000406] -----------                         *  ADD       int    $366
N001 (  1,  1) [000407] -----------                         +--*  LCL_VAR   int    V04 loc2         u:8 (last use) $441
N002 (  1,  1) [000408] -----------                         \--*  CNS_INT   int    -1 $c2
                  {
                     [RangeCheck::GetRangeWorker] BB42 N001 (  1,  1) [000407] -----------                         *  LCL_VAR   int    V04 loc2         u:8 (last use) $441
                     {
----------------------------------------------------
N004 (  0,  0) [000598] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:8 $VN.Void
N003 (  0,  0) [000597] -----------                         \--*  PHI       int    $441
N001 (  0,  0) [000631] ----------- pred BB42                  +--*  PHI_ARG   int    V04 loc2         u:9
N002 (  0,  0) [000624] ----------- pred BB29                  \--*  PHI_ARG   int    V04 loc2         u:7 $440
----------------------------------------------------
                        [RangeCheck::GetRangeWorker] BB30 N003 (  0,  0) [000597] -----------                         *  PHI       int    $441
N001 (  0,  0) [000631] ----------- pred BB42               +--*  PHI_ARG   int    V04 loc2         u:9
N002 (  0,  0) [000624] ----------- pred BB29               \--*  PHI_ARG   int    V04 loc2         u:7 $440
                        {
PhiArg [000631] is already being computed
Merging assertions from pred edges of BB30 for op [000631] $ffffffff
Merge assertions created by BB42 for BB30
#02 #29 #31 #33 #34 #40 #42
Merging ranges <Undef, Undef> <Dependent, Dependent>:<Dependent, Dependent>
                           [RangeCheck::GetRangeWorker] BB30 N002 (  0,  0) [000624] -----------                         *  PHI_ARG   int    V04 loc2         u:7 $440
                           {
----------------------------------------------------
N002 (  1,  3) [000279] DA---------                         *  STORE_LCL_VAR int    V04 loc2         d:7 $VN.Void
N001 (  1,  1) [000280] -----------                         \--*  LCL_VAR   int    V02 loc0         u:4 $440
----------------------------------------------------
                              [RangeCheck::GetRangeWorker] BB29 N001 (  1,  1) [000280] -----------                         *  LCL_VAR   int    V02 loc0         u:4 $440
                              {
----------------------------------------------------
N004 (  0,  0) [000596] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:4 $VN.Void
N003 (  0,  0) [000595] -----------                         \--*  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43                  +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0
----------------------------------------------------
                                 [RangeCheck::GetRangeWorker] BB28 N003 (  0,  0) [000595] -----------                         *  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43               +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27               \--*  PHI_ARG   int    V02 loc0         u:1 $c0
                                 {
                                    [RangeCheck::GetRangeWorker] BB28 N001 (  0,  0) [000632] -----------                         *  PHI_ARG   int    V02 loc0         u:5
                                    {
----------------------------------------------------
N004 (  3,  3) [000425] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:5 $VN.Void
N003 (  3,  3) [000426] -----------                         \--*  ADD       int    $347
N001 (  1,  1) [000427] -----------                            +--*  LCL_VAR   int    V02 loc0         u:4 (last use) $440
N002 (  1,  1) [000428] -----------                            \--*  CNS_INT   int    1 $c1
----------------------------------------------------
                                       [RangeCheck::GetRangeWorker] BB43 N003 (  3,  3) [000426] -----------                         *  ADD       int    $347
N001 (  1,  1) [000427] -----------                         +--*  LCL_VAR   int    V02 loc0         u:4 (last use) $440
N002 (  1,  1) [000428] -----------                         \--*  CNS_INT   int    1 $c1
                                       {
                                          [RangeCheck::GetRangeWorker] BB43 N001 (  1,  1) [000427] -----------                         *  LCL_VAR   int    V02 loc0         u:4 (last use) $440
                                          {
----------------------------------------------------
N004 (  0,  0) [000596] DA---------                         *  STORE_LCL_VAR int    V02 loc0         d:4 $VN.Void
N003 (  0,  0) [000595] -----------                         \--*  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43                  +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27                  \--*  PHI_ARG   int    V02 loc0         u:1 $c0
----------------------------------------------------
                                             [RangeCheck::GetRangeWorker] BB28 N003 (  0,  0) [000595] -----------                         *  PHI       int    $440
N001 (  0,  0) [000632] ----------- pred BB43               +--*  PHI_ARG   int    V02 loc0         u:5
N002 (  0,  0) [000623] ----------- pred BB27               \--*  PHI_ARG   int    V02 loc0         u:1 $c0
                                             {
PhiArg [000632] is already being computed
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
Merging ranges <Undef, Undef> <0, $300 + -1>:<0, $300 + -1>
                                                [RangeCheck::GetRangeWorker] BB28 N002 (  0,  0) [000623] -----------                         *  PHI_ARG   int    V02 loc0         u:1 $c0
                                                {
                                                   Computed Range [000623] => <0, 0>
                                                }
Merging assertions from pred edges of BB28 for op [000623] $c0
Merging ranges <0, $300 + -1> <0, 0>:<0, Unknown>
                                                Computed Range [000595] => <0, Unknown>
                                             }
Merge assertions from BB43: #29 #31 for definition [000596]
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB43 for op [000427] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                             Computed Range [000427] => <0, $300 + -2>
                                          }
Merging assertions from pred edges of BB43 for op [000427] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                          [RangeCheck::GetRangeWorker] BB43 N002 (  1,  1) [000428] -----------                         *  CNS_INT   int    1 $c1
                                          {
                                             Computed Range [000428] => <1, 1>
                                          }
Merging assertions from pred edges of BB43 for op [000428] $c1
BinOp add ranges <0, $300 + -2> <1, 1> = <1, $300 + -1>
                                          Computed Range [000426] => <1, $300 + -1>
                                       }
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
                                       Computed Range [000632] => <1, $300 + -1>
                                    }
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<1, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<1, $300 + -1>]
Merging ranges <Undef, Undef> <1, $300 + -1>:<1, $300 + -1>
                                    [RangeCheck::GetRangeWorker] BB28 N002 (  0,  0) [000623] -----------                         *  PHI_ARG   int    V02 loc0         u:1 $c0
                                    {
                                       Cached Range [000623] => <0, 0>
                                    }
Merging assertions from pred edges of BB28 for op [000623] $c0
Merging ranges <1, $300 + -1> <0, 0>:<0, Unknown>
                                    Computed Range [000595] => <0, Unknown>
                                 }
Merge assertions from BB29: #29 for definition [000596]
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB29 for op [000280] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                                 Computed Range [000280] => <0, $300 + -2>
                              }
Merge assertions from BB30: #29 #31 for definition [000279]
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
done merging
Merging assertions from pred edges of BB30 for op [000624] $440
Merge assertions created by BB29 for BB30
#29 #31
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
                              Computed Range [000624] => <0, $300 + -2>
                           }
Merging assertions from pred edges of BB30 for op [000624] $440
Merge assertions created by BB29 for BB30
#29 #31
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Merging ranges <Dependent, Dependent> <0, $300 + -2>:<Dependent, Dependent>
                           Computed Range [000597] => <Dependent, Dependent>
                        }
Merge assertions from BB42: #02 #29 #31 #33 #34 #40 for definition [000598]
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<Dependent, Dependent>] with assertedRange: [<0, Unknown>] into [<0, Dependent>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, Dependent>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
done merging
Merging assertions from pred edges of BB42 for op [000407] $441
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, Unknown>] into [<0, $300 + -1>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
                        Computed Range [000407] => <0, $300 + -1>
                     }
Merging assertions from pred edges of BB42 for op [000407] $441
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, Unknown>] into [<0, $300 + -1>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, $300 + -1>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
                     [RangeCheck::GetRangeWorker] BB42 N002 (  1,  1) [000408] -----------                         *  CNS_INT   int    -1 $c2
                     {
                        Computed Range [000408] => <-1, -1>
                     }
Merging assertions from pred edges of BB42 for op [000408] $c2
BinOp add ranges <0, $300 + -1> <-1, -1> = <-1, $300 + -2>
                     Computed Range [000406] => <-1, $300 + -2>
                  }
Merge assertions from BB30: #29 #31 for definition [000405]
done merging
Merging assertions from pred edges of BB30 for op [000631] $ffffffff
Merge assertions created by BB42 for BB30
#02 #29 #31 #33 #34 #40 #42
                  Computed Range [000631] => <-1, $300 + -2>
               }
Merging assertions from pred edges of BB30 for op [000631] $ffffffff
Merge assertions created by BB42 for BB30
#02 #29 #31 #33 #34 #40 #42
Merging ranges <Undef, Undef> <-1, $300 + -2>:<-1, $300 + -2>
               [RangeCheck::GetRangeWorker] BB30 N002 (  0,  0) [000624] -----------                         *  PHI_ARG   int    V04 loc2         u:7 $440
               {
                  Cached Range [000624] => <0, $300 + -2>
               }
Merging assertions from pred edges of BB30 for op [000624] $440
Merge assertions created by BB29 for BB30
#29 #31
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<0, $300 + -2>] with assertedRange: [<Unknown, $300 + -2>] into [<0, $300 + -2>]
Merging ranges <-1, $300 + -2> <0, $300 + -2>:<-1, $300 + -2>
               Computed Range [000597] => <-1, $300 + -2>
            }
Merge assertions from BB43: #29 #31 for definition [000598]
done merging
Merging assertions from pred edges of BB43 for op [000413] $441
            Computed Range [000413] => <-1, $300 + -2>
         }
Merging assertions from pred edges of BB43 for op [000413] $441
         [RangeCheck::GetRangeWorker] BB43 N002 (  1,  1) [000414] -----------                         *  CNS_INT   int    1 $c1
         {
            Computed Range [000414] => <1, 1>
         }
Merging assertions from pred edges of BB43 for op [000414] $c1
BinOp add ranges <-1, $300 + -2> <1, 1> = <0, $300 + -1>
         Computed Range [000412] => <0, $300 + -1>
      }
Merge assertions from BB43: #29 #31 for definition [000653]
done merging
Merging assertions from pred edges of BB43 for op [000654] $361
      Computed Range [000654] => <0, $300 + -1>
   }
   Computed Range [000655] => <0, $300 + -1>
}
Does overflow [000655]?
Does overflow [000654]?
Merging assertions from pred edges of BB43 for op [000654] $361
Does overflow [000412]?
Does overflow [000413]?
Merging assertions from pred edges of BB43 for op [000413] $441
Does overflow [000597]?
Does overflow [000631]?
Merging assertions from pred edges of BB30 for op [000631] $ffffffff
Merge assertions created by BB42 for BB30
#02 #29 #31 #33 #34 #40 #42
Does overflow [000406]?
Does overflow [000407]?
Merging assertions from pred edges of BB42 for op [000407] $441
Constant Assertion: ($34c,$c0) Const_Loop_Bnd {LT($441, $c0)} is  {IntCns 0}, index = #33
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, Unknown>] into [<0, Unknown>]
ArrBnds  Assertion: ($0,$0) [idx: $441 {PhiDef(V04 d:8, u:9, u:7)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #34
Tightening pRange: [<0, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
[000407] does not overflow
Does overflow [000408]?
[000408] does not overflow
Checking bin op overflow ADD <0, $300 + -1> <-1, -1>
[000406] does not overflow
[000631] does not overflow
Does overflow [000624]?
Merging assertions from pred edges of BB30 for op [000624] $440
Merge assertions created by BB29 for BB30
#29 #31
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000280]?
Merging assertions from pred edges of BB29 for op [000280] $440
Constant Assertion: ($346,$c0) Oper_Bnd { {PhiDef(V02 d:4, u:5, u:1)} LT  {MemOpaque:NotInLoop}ADD {IntCns -1}} is not  {IntCns 0}, index = #29
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<Unknown, $300 + -2>] into [<Unknown, $300 + -2>]
Does overflow [000595]?
Does overflow [000632]?
Merging assertions from pred edges of BB28 for op [000632] $ffffffff
Merge assertions created by BB43 for BB28
#29 #31 #42
ArrBnds  Assertion: ($0,$0) [idx: $347 {ADD($440, $c1)}; len: $300 {MemOpaque:NotInLoop}] in range , index = #31
Tightening pRange: [<Unknown, Unknown>] with assertedRange: [<0, $300 + -1>] into [<0, $300 + -1>]
[000632] does not overflow
Does overflow [000623]?
[000623] does not overflow
[000595] does not overflow
[000280] does not overflow
[000624] does not overflow
[000597] does not overflow
[000413] does not overflow
Does overflow [000414]?
[000414] does not overflow
Checking bin op overflow ADD <-1, $300 + -2> <1, 1>
[000412] does not overflow
[000654] does not overflow
[000655] does not overflow
Range value <0, $300 + -1>
[RangeCheck::Widen] BB43, 
[000655]
<0, $300 + -1> BetweenBounds <0, [000415]>
$300 upper bound is:  {MemOpaque:NotInLoop}
Array size is: 0
[RangeCheck::OptimizeRangeCheck] Between bounds
Before optRemoveRangeCheck:
N015 ( 20, 21) [000410] -A-XGO-----                         *  COMMA     byref  <l:$290, c:$28f>
N008 ( 15, 16) [000411] -A-XGO-----                         +--*  BOUNDS_CHECK_Rng void   <l:$3fa, c:$3f9>
N006 ( 10,  8) [000655] -A---------                         |  +--*  COMMA     int    $361
N004 (  7,  6) [000653] DA---------                         |  |  +--*  STORE_LCL_VAR int    V22 cse4         d:2 $VN.Void
N003 (  3,  3) [000412] -----------                         |  |  |  \--*  ADD       int    $361
N001 (  1,  1) [000413] -----------                         |  |  |     +--*  LCL_VAR   int    V04 loc2         u:8 $441
N002 (  1,  1) [000414] -----------                         |  |  |     \--*  CNS_INT   int    1 $c1
N005 (  3,  2) [000654] -----------                         |  |  \--*  LCL_VAR   int    V22 cse4         u:2 $361
N007 (  1,  1) [000415] -----------                         |  \--*  LCL_VAR   int    V16 tmp11        u:1 <l:$2c0, c:$300>
N014 (  6,  6) [000416] ----GO-N---                         \--*  ADD       byref  <l:$28d, c:$28e>
N009 (  1,  1) [000417] -----------                            +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N013 (  5,  5) [000418] -------N---                            \--*  LSH       long   $414
N011 (  4,  4) [000419] ---------U-                               +--*  CAST      long <- uint $413
N010 (  3,  2) [000657] -----------                               |  \--*  LCL_VAR   int    V22 cse4         u:2 $361
N012 (  1,  1) [000423] -----------                               \--*  CNS_INT   long   2 $242
After optRemoveRangeCheck for [000410]:
N017 ( 25, 25) [000409] -A-XGO-----                         *  STOREIND  int    <l:$54c, c:$54a>
N015 ( 20, 21) [000410] -A--GO-N---                         +--*  COMMA     byref  <l:$290, c:$28f>
N004 (  7,  6) [000653] DA---------                         |  +--*  STORE_LCL_VAR int    V22 cse4         d:2 $VN.Void
N003 (  3,  3) [000412] -----------                         |  |  \--*  ADD       int    $361
N001 (  1,  1) [000413] -----------                         |  |     +--*  LCL_VAR   int    V04 loc2         u:8 $441
N002 (  1,  1) [000414] -----------                         |  |     \--*  CNS_INT   int    1 $c1
N014 (  6,  6) [000416] ----GO-N---                         |  \--*  ADD       byref  <l:$28d, c:$28e>
N009 (  1,  1) [000417] -----------                         |     +--*  LCL_VAR   byref  V15 tmp10        u:2 <l:$200, c:$101>
N013 (  5,  5) [000418] -------N---                         |     \--*  LSH       long   $414
N011 (  4,  4) [000419] ---------U-                         |        +--*  CAST      long <- uint $413
N010 (  3,  2) [000657] -----------                         |        |  \--*  LCL_VAR   int    V22 cse4         u:2 $361
N012 (  1,  1) [000423] -----------                         |        \--*  CNS_INT   long   2 $242
N016 (  1,  1) [000424] -----------                         \--*  LCL_VAR   int    V03 loc1         u:2 (last use) <l:$2c1, c:$301>