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; Assembly listing for method Program:Run(int):long (Tier0-FullOpts)

; Emitting BLENDED_CODE for generic ARM - Unix

; Tier-0 switched to FullOpts code

; optimized code

; r11 based frame

; fully interruptible

; No PGO data

; Final local variable assignments

;

; V00 arg0 [V00,T03] ( 4, 11 ) int -> [sp+0x14] EH-live single-def

; V01 loc0 [V01,T02] ( 9, 30 ) long -> [sp+0x08] do-not-enreg[Z] EH-live

; V01 loc0 [V01,T02] ( 9, 18 ) long -> [sp+0x08] do-not-enreg[Z] EH-live

; V02 loc1 [V02,T01] ( 6, 34 ) int -> [sp+0x04] do-not-enreg[Z] EH-live

; V02 loc1 [V02,T00] ( 6, 30 ) int -> [sp+0x04] do-not-enreg[Z] EH-live

;# V03 OutArgs [V03 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"

; V04 PSPSym [V04,T05] ( 1, 1 ) int -> [sp+0x1C] do-not-enreg[V] "PSPSym"

; V05 rat0 [V05,T00] ( 3, 48 ) int -> r2 "ReplaceWithLclVar is creating a new local variable"

; V05 rat0 [V05,T01] ( 3, 24 ) int -> r2 "ReplaceWithLclVar is creating a new local variable"

; V06 rat1 [V06,T04] ( 3, 6 ) int -> r1 "ReplaceWithLclVar is creating a new local variable"

;

; Lcl frame size = 32

G_M6847_IG01:

push {r11,lr}

sub sp, 32

add r11, sp, 32

add r1, sp, 40

str r1, [sp+0x1C] // [V04 PSPSym]

str r0, [sp+0x14] // [V00 arg0]

;; size=16 bbWeight=1 PerfScore 6.00

G_M6847_IG02:

movs r1, 0

movs r3, 0

str r1, [sp+0x08]

str r3, [sp+0x0C]

;; size=8 bbWeight=1 PerfScore 4.00

G_M6847_IG03:

str r1, [sp+0x04] // [V02 loc1]

cmp r0, 0

ble SHORT G_M6847_IG07

ble SHORT G_M6847_IG08

;; size=6 bbWeight=1 PerfScore 3.00

G_M6847_IG04:

ldr r1, [sp+0x08] // [V01 loc0]

ldr r3, [sp+0x0C] // [V01 loc0+0x04]

ldr r2, [sp+0x04] // [V02 loc1]

asr lr, r2, 31

adds r1, r1, r2

adc r3, r3, lr

str r1, [sp+0x08] // [V01 loc0]

str r3, [sp+0x0C] // [V01 loc0+0x04]

movw lr, LOW ADDRESS G_M6847_IG06

;; size=20 bbWeight=4 PerfScore 32.00

movt lr, HIGH ADDRESS G_M6847_IG06

b SHORT G_M6847_IG09

;; size=30 bbWeight=8 PerfScore 88.00

G_M6847_IG05:

nop

bl G_M6847_IG10

;; size=2 bbWeight=1 PerfScore 1.00

;; size=4 bbWeight=8 PerfScore 8.00

G_M6847_IG06:

nop

;; size=2 bbWeight=8 PerfScore 8.00

G_M6847_IG07:

ldr r3, [sp+0x04] // [V02 loc1]

adds r3, r3, 1

str r3, [sp+0x04] // [V02 loc1]

ldr r3, [sp+0x04] // [V02 loc1]

ldr r0, [sp+0x14] // [V00 arg0]

cmp r3, r0

blt SHORT G_M6847_IG04

;; size=14 bbWeight=8 PerfScore 56.00

G_M6847_IG07:

G_M6847_IG08:

ldr r0, [sp+0x08] // [V01 loc0]

ldr r1, [sp+0x0C] // [V01 loc0+0x04]

;; size=4 bbWeight=1 PerfScore 2.00

G_M6847_IG08:

G_M6847_IG09:

add sp, 32

pop {r11,pc}

;; size=6 bbWeight=1 PerfScore 2.00

G_M6847_IG09:

G_M6847_IG10:

push {r2,r3,r11,lr}

add r3, r11, 8

str r3, [sp+0x04]

;; size=10 bbWeight=1 PerfScore 3.00

G_M6847_IG10:

G_M6847_IG11:

ldr r3, [r11-0x18] // [V01 loc0]

ldr r2, [r11-0x14] // [V01 loc0+0x04]

ldr r1, [r11-0x1C] // [V02 loc1]

lsls r1, r1, 1

asrs r0, r1, 31

adds r3, r3, r1

adcs r2, r0

str r3, [r11-0x18] // [V01 loc0]

str r2, [r11-0x14] // [V01 loc0+0x04]

;; size=28 bbWeight=1 PerfScore 9.00

G_M6847_IG11:

G_M6847_IG12:

pop {r2,r3,r11,pc}

;; size=4 bbWeight=1 PerfScore 1.00

; Total bytes of code 128, prolog size 16, PerfScore 187.80, instruction count 49, allocated bytes for code 128 (MethodHash=7582e540) for method Program:Run(int):long (Tier0-FullOpts)

; Total bytes of code 122, prolog size 16, PerfScore 146.20, instruction count 47, allocated bytes for code 122 (MethodHash=7582e540) for method Program:Run(int):long (Tier0-FullOpts)

; ============================================================

; Assembly listing for method Program:Finally():int (Tier1)

; Emitting BLENDED_CODE for generic ARM - Unix

; Tier1 code

; optimized code

; optimized using Dynamic PGO

; r11 based frame

; fully interruptible

; with Dynamic PGO: edge weights are valid, and fgCalledCount is 44

; with Dynamic PGO: edge weights are valid, and fgCalledCount is 91

; Final local variable assignments

;

Diferencias guardadas

Texto original

Abrir archivo

; Assembly listing for method Program:Run(int):long (Tier0-FullOpts)
; Emitting BLENDED_CODE for generic ARM - Unix
; Tier-0 switched to FullOpts code
; optimized code
; r11 based frame
; fully interruptible
; No PGO data
; Final local variable assignments
;
;  V00 arg0         [V00,T03] (  4, 11   )     int  ->  [sp+0x14]  EH-live single-def
;  V01 loc0         [V01,T02] (  9, 30   )    long  ->  [sp+0x08]  do-not-enreg[Z] EH-live
;  V02 loc1         [V02,T01] (  6, 34   )     int  ->  [sp+0x04]  do-not-enreg[Z] EH-live
;# V03 OutArgs      [V03    ] (  1,  1   )  struct ( 0) [sp+0x00]  do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;  V04 PSPSym       [V04,T05] (  1,  1   )     int  ->  [sp+0x1C]  do-not-enreg[V] "PSPSym"
;  V05 rat0         [V05,T00] (  3, 48   )     int  ->   r2         "ReplaceWithLclVar is creating a new local variable"
;  V06 rat1         [V06,T04] (  3,  6   )     int  ->   r1         "ReplaceWithLclVar is creating a new local variable"
;
; Lcl frame size = 32

G_M6847_IG01:
            push    {r11,lr}
            sub     sp, 32
            add     r11, sp, 32
            add     r1, sp, 40
            str     r1, [sp+0x1C]       // [V04 PSPSym]
            str     r0, [sp+0x14]       // [V00 arg0]
                                                ;; size=16 bbWeight=1 PerfScore 6.00
G_M6847_IG02:
            movs    r1, 0
            movs    r3, 0
            str     r1, [sp+0x08]
            str     r3, [sp+0x0C]
                                                ;; size=8 bbWeight=1 PerfScore 4.00
G_M6847_IG03:
            str     r1, [sp+0x04]       // [V02 loc1]
            cmp     r0, 0
            ble     SHORT G_M6847_IG07
                                                ;; size=6 bbWeight=1 PerfScore 3.00
G_M6847_IG04:
            ldr     r1, [sp+0x08]       // [V01 loc0]
            ldr     r3, [sp+0x0C]       // [V01 loc0+0x04]
            ldr     r2, [sp+0x04]       // [V02 loc1]
            asr     lr, r2, 31
            adds    r1, r1, r2
            adc     r3, r3, lr
            str     r1, [sp+0x08]       // [V01 loc0]
            str     r3, [sp+0x0C]       // [V01 loc0+0x04]
            movw    lr, LOW ADDRESS G_M6847_IG06
            movt    lr, HIGH ADDRESS G_M6847_IG06
            b       SHORT G_M6847_IG09
                                                ;; size=30 bbWeight=8 PerfScore 88.00
G_M6847_IG05:
            nop
                                                ;; size=2 bbWeight=1 PerfScore 1.00
G_M6847_IG06:
            ldr     r3, [sp+0x04]       // [V02 loc1]
            adds    r3, r3, 1
            str     r3, [sp+0x04]       // [V02 loc1]
            ldr     r3, [sp+0x04]       // [V02 loc1]
            ldr     r0, [sp+0x14]       // [V00 arg0]
            cmp     r3, r0
            blt     SHORT G_M6847_IG04
                                                ;; size=14 bbWeight=8 PerfScore 56.00
G_M6847_IG07:
            ldr     r0, [sp+0x08]       // [V01 loc0]
            ldr     r1, [sp+0x0C]       // [V01 loc0+0x04]
                                                ;; size=4 bbWeight=1 PerfScore 2.00
G_M6847_IG08:
            add     sp, 32
            pop     {r11,pc}
                                                ;; size=6 bbWeight=1 PerfScore 2.00
G_M6847_IG09:
            push    {r2,r3,r11,lr}
            add     r3, r11, 8
            str     r3, [sp+0x04]
                                                ;; size=10 bbWeight=1 PerfScore 3.00
G_M6847_IG10:
            ldr     r3, [r11-0x18]      // [V01 loc0]
            ldr     r2, [r11-0x14]      // [V01 loc0+0x04]
            ldr     r1, [r11-0x1C]      // [V02 loc1]
            lsls    r1, r1, 1
            asrs    r0, r1, 31
            adds    r3, r3, r1
            adcs    r2, r0
            str     r3, [r11-0x18]      // [V01 loc0]
            str     r2, [r11-0x14]      // [V01 loc0+0x04]
                                                ;; size=28 bbWeight=1 PerfScore 9.00
G_M6847_IG11:
            pop     {r2,r3,r11,pc}
                                                ;; size=4 bbWeight=1 PerfScore 1.00

; Total bytes of code 128, prolog size 16, PerfScore 187.80, instruction count 49, allocated bytes for code 128 (MethodHash=7582e540) for method Program:Run(int):long (Tier0-FullOpts)
; ============================================================

; Assembly listing for method Program:Finally():int (Tier1)
; Emitting BLENDED_CODE for generic ARM - Unix
; Tier1 code
; optimized code
; optimized using Dynamic PGO
; r11 based frame
; fully interruptible
; with Dynamic PGO: edge weights are valid, and fgCalledCount is 44
; Final local variable assignments
;
;  V00 loc0         [V00,T00] (  5,  5   )     int  ->  [sp+0x04]  do-not-enreg[M] EH-live
;# V01 OutArgs      [V01    ] (  1,  1   )  struct ( 0) [sp+0x00]  do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;  V02 PSPSym       [V02,T01] (  1,  1   )     int  ->  [sp+0x0C]  do-not-enreg[V] "PSPSym"
;
; Lcl frame size = 16

G_M15973_IG01:
            push    {r11,lr}
            sub     sp, 16
            add     r11, sp, 16
            add     r0, sp, 24
            str     r0, [sp+0x0C]       // [V02 PSPSym]
                                                ;; size=14 bbWeight=1 PerfScore 5.00
G_M15973_IG02:
            movs    r0, 10
            str     r0, [sp+0x04]       // [V00 loc0]
                                                ;; size=4 bbWeight=1 PerfScore 2.00
G_M15973_IG03:
            movs    r0, 15
            str     r0, [sp+0x04]       // [V00 loc0]
            movw    lr, LOW ADDRESS G_M15973_IG05
            movt    lr, HIGH ADDRESS G_M15973_IG05
            b       SHORT G_M15973_IG07
                                                ;; size=14 bbWeight=1 PerfScore 5.00
G_M15973_IG04:
            nop
                                                ;; size=2 bbWeight=1 PerfScore 1.00
G_M15973_IG05:
            ldr     r0, [sp+0x04]       // [V00 loc0]
                                                ;; size=2 bbWeight=1 PerfScore 1.00
G_M15973_IG06:
            add     sp, 16
            pop     {r11,pc}
                                                ;; size=6 bbWeight=1 PerfScore 2.00
G_M15973_IG07:
            push    {r2,r3,r11,lr}
            add     r3, r11, 8
            str     r3, [sp+0x04]
                                                ;; size=10 bbWeight=1 PerfScore 3.00
G_M15973_IG08:
            ldr     r0, [r11-0x0C]      // [V00 loc0]
            adds    r0, 10
            str     r0, [r11-0x0C]      // [V00 loc0]
                                                ;; size=10 bbWeight=1 PerfScore 3.00
G_M15973_IG09:
            pop     {r2,r3,r11,pc}
                                                ;; size=4 bbWeight=1 PerfScore 1.00

; Total bytes of code 66, prolog size 14, PerfScore 29.60, instruction count 23, allocated bytes for code 66 (MethodHash=07b4c19a) for method Program:Finally():int (Tier1)
; ============================================================

Texto modificado

Abrir archivo

; Assembly listing for method Program:Run(int):long (Tier0-FullOpts)
; Emitting BLENDED_CODE for generic ARM - Unix
; Tier-0 switched to FullOpts code
; optimized code
; r11 based frame
; fully interruptible
; No PGO data
; Final local variable assignments
;
;  V00 arg0         [V00,T03] (  4, 11   )     int  ->  [sp+0x14]  EH-live single-def
;  V01 loc0         [V01,T02] (  9, 18   )    long  ->  [sp+0x08]  do-not-enreg[Z] EH-live
;  V02 loc1         [V02,T00] (  6, 30   )     int  ->  [sp+0x04]  do-not-enreg[Z] EH-live
;# V03 OutArgs      [V03    ] (  1,  1   )  struct ( 0) [sp+0x00]  do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;  V04 PSPSym       [V04,T05] (  1,  1   )     int  ->  [sp+0x1C]  do-not-enreg[V] "PSPSym"
;  V05 rat0         [V05,T01] (  3, 24   )     int  ->   r2         "ReplaceWithLclVar is creating a new local variable"
;  V06 rat1         [V06,T04] (  3,  6   )     int  ->   r1         "ReplaceWithLclVar is creating a new local variable"
;
; Lcl frame size = 32

G_M6847_IG01:
            push    {r11,lr}
            sub     sp, 32
            add     r11, sp, 32
            add     r1, sp, 40
            str     r1, [sp+0x1C]       // [V04 PSPSym]
            str     r0, [sp+0x14]       // [V00 arg0]
                                                ;; size=16 bbWeight=1 PerfScore 6.00
G_M6847_IG02:
            movs    r1, 0
            movs    r3, 0
            str     r1, [sp+0x08]
            str     r3, [sp+0x0C]
                                                ;; size=8 bbWeight=1 PerfScore 4.00
G_M6847_IG03:
            str     r1, [sp+0x04]       // [V02 loc1]
            cmp     r0, 0
            ble     SHORT G_M6847_IG08
                                                ;; size=6 bbWeight=1 PerfScore 3.00
G_M6847_IG04:
            ldr     r1, [sp+0x08]       // [V01 loc0]
            ldr     r3, [sp+0x0C]       // [V01 loc0+0x04]
            ldr     r2, [sp+0x04]       // [V02 loc1]
            asr     lr, r2, 31
            adds    r1, r1, r2
            adc     r3, r3, lr
            str     r1, [sp+0x08]       // [V01 loc0]
            str     r3, [sp+0x0C]       // [V01 loc0+0x04]
                                                ;; size=20 bbWeight=4 PerfScore 32.00
G_M6847_IG05:
            bl      G_M6847_IG10
                                                ;; size=4 bbWeight=8 PerfScore 8.00
G_M6847_IG06:
            nop
                                                ;; size=2 bbWeight=8 PerfScore 8.00
G_M6847_IG07:
            ldr     r3, [sp+0x04]       // [V02 loc1]
            adds    r3, r3, 1
            str     r3, [sp+0x04]       // [V02 loc1]
            ldr     r3, [sp+0x04]       // [V02 loc1]
            ldr     r0, [sp+0x14]       // [V00 arg0]
            cmp     r3, r0
            blt     SHORT G_M6847_IG04
                                                ;; size=14 bbWeight=8 PerfScore 56.00
G_M6847_IG08:
            ldr     r0, [sp+0x08]       // [V01 loc0]
            ldr     r1, [sp+0x0C]       // [V01 loc0+0x04]
                                                ;; size=4 bbWeight=1 PerfScore 2.00
G_M6847_IG09:
            add     sp, 32
            pop     {r11,pc}
                                                ;; size=6 bbWeight=1 PerfScore 2.00
G_M6847_IG10:
            push    {r2,r3,r11,lr}
            add     r3, r11, 8
            str     r3, [sp+0x04]
                                                ;; size=10 bbWeight=1 PerfScore 3.00
G_M6847_IG11:
            ldr     r3, [r11-0x18]      // [V01 loc0]
            ldr     r2, [r11-0x14]      // [V01 loc0+0x04]
            ldr     r1, [r11-0x1C]      // [V02 loc1]
            lsls    r1, r1, 1
            asrs    r0, r1, 31
            adds    r3, r3, r1
            adcs    r2, r0
            str     r3, [r11-0x18]      // [V01 loc0]
            str     r2, [r11-0x14]      // [V01 loc0+0x04]
                                                ;; size=28 bbWeight=1 PerfScore 9.00
G_M6847_IG12:
            pop     {r2,r3,r11,pc}
                                                ;; size=4 bbWeight=1 PerfScore 1.00

; Total bytes of code 122, prolog size 16, PerfScore 146.20, instruction count 47, allocated bytes for code 122 (MethodHash=7582e540) for method Program:Run(int):long (Tier0-FullOpts)
; ============================================================

; Assembly listing for method Program:Finally():int (Tier1)
; Emitting BLENDED_CODE for generic ARM - Unix
; Tier1 code
; optimized code
; optimized using Dynamic PGO
; r11 based frame
; fully interruptible
; with Dynamic PGO: edge weights are valid, and fgCalledCount is 91
; Final local variable assignments
;
;  V00 loc0         [V00,T00] (  5,  5   )     int  ->  [sp+0x04]  do-not-enreg[M] EH-live
;# V01 OutArgs      [V01    ] (  1,  1   )  struct ( 0) [sp+0x00]  do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;  V02 PSPSym       [V02,T01] (  1,  1   )     int  ->  [sp+0x0C]  do-not-enreg[V] "PSPSym"
;
; Lcl frame size = 16

G_M15973_IG01:
            push    {r11,lr}
            sub     sp, 16
            add     r11, sp, 16
            add     r0, sp, 24
            str     r0, [sp+0x0C]       // [V02 PSPSym]
                                                ;; size=14 bbWeight=1 PerfScore 5.00
G_M15973_IG02:
            movs    r0, 10
            str     r0, [sp+0x04]       // [V00 loc0]
                                                ;; size=4 bbWeight=1 PerfScore 2.00
G_M15973_IG03:
            movs    r0, 15
            str     r0, [sp+0x04]       // [V00 loc0]
                                                ;; size=4 bbWeight=1 PerfScore 2.00
G_M15973_IG04:
            bl      G_M15973_IG08
                                                ;; size=4 bbWeight=1 PerfScore 1.00
G_M15973_IG05:
            nop
                                                ;; size=2 bbWeight=1 PerfScore 1.00
G_M15973_IG06:
            ldr     r0, [sp+0x04]       // [V00 loc0]
                                                ;; size=2 bbWeight=1 PerfScore 1.00
G_M15973_IG07:
            add     sp, 16
            pop     {r11,pc}
                                                ;; size=6 bbWeight=1 PerfScore 2.00
G_M15973_IG08:
            push    {r2,r3,r11,lr}
            add     r3, r11, 8
            str     r3, [sp+0x04]
                                                ;; size=10 bbWeight=1 PerfScore 3.00
G_M15973_IG09:
            ldr     r0, [r11-0x0C]      // [V00 loc0]
            adds    r0, 10
            str     r0, [r11-0x0C]      // [V00 loc0]
                                                ;; size=10 bbWeight=1 PerfScore 3.00
G_M15973_IG10:
            pop     {r2,r3,r11,pc}
                                                ;; size=4 bbWeight=1 PerfScore 1.00

; Total bytes of code 60, prolog size 14, PerfScore 27.00, instruction count 21, allocated bytes for code 60 (MethodHash=07b4c19a) for method Program:Finally():int (Tier1)
; ============================================================