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Utf8Formatter:TryFormat
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; Assembly listing for method System.Buffers.Text.Utf8Formatter:TryFormat(System.TimeSpan,System.Span`1[System.Byte],byref,System.Buffers.StandardFormat):bool
; Assembly listing for method System.Buffers.Text.Utf8Formatter:TryFormat(System.TimeSpan,System.Span`1[System.Byte],byref,System.Buffers.StandardFormat):bool
; Emitting BLENDED_CODE for X64 CPU with SSE2 - Windows
; Emitting BLENDED_CODE for X64 CPU with SSE2 - Windows
; ReadyToRun compilation
; ReadyToRun compilation
; optimized code
; optimized code
; rsp based frame
; rsp based frame
; fully interruptible
; fully interruptible
; discarded IBC profile data due to mismatch in ILSize
; discarded IBC profile data due to mismatch in ILSize
; Final local variable assignments
; Final local variable assignments
;
;
;* V00 arg0 [V00 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op
;* V00 arg0 [V00 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op
; V01 arg1 [V01,T12] ( 4, 8 ) byref -> rdx ld-addr-op
; V01 arg1 [V01,T12] ( 4, 8 ) byref -> rdx ld-addr-op
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; V02 arg2 [V02,T27] ( 5, 3 ) byref -> [rsp+1
1
0H]
; V02 arg2 [V02,T27] ( 5, 3 ) byref -> [rsp+1
2
0H]
; V03 arg3 [V03,T24] ( 4, 3.25) struct ( 8) [rsp+1
1
8H] do-not-enreg[SF] ld-addr-op
; V03 arg3 [V03,T24] ( 4, 3.25) struct ( 8) [rsp+1
2
8H] do-not-enreg[SF] ld-addr-op
; V04 loc0 [V04,T13] ( 13, 8 ) ushort -> r14
; V04 loc0 [V04,T13] ( 13, 8 ) ushort -> r14
; V05 loc1 [V05,T16] ( 13, 7.50) int -> r15
; V05 loc1 [V05,T16] ( 13, 7.50) int -> r15
; V06 loc2 [V06,T29] ( 8, 4.50) int -> r13 ld-addr-op
; V06 loc2 [V06,T29] ( 8, 4.50) int -> r13 ld-addr-op
; V07 loc3 [V07,T69] ( 5, 3 ) long -> r12
; V07 loc3 [V07,T69] ( 5, 3 ) long -> r12
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; V08 loc4 [V08,T19] ( 11, 6.50) int -> [rsp+
A
CH]
; V08 loc4 [V08,T19] ( 11, 6.50) int -> [rsp+
B
CH]
; V09 loc5 [V09,T63] ( 5, 3.50) long -> [rsp+
A
0H]
; V09 loc5 [V09,T63] ( 5, 3.50) long -> [rsp+
B
0H]
; V10 loc6 [V10,T30] ( 4, 4.50) long -> [rsp+
9
8H]
; V10 loc6 [V10,T30] ( 4, 4.50) long -> [rsp+
A
8H]
; V11 loc7 [V11,T38] ( 5, 4 ) long -> r12
; V11 loc7 [V11,T38] ( 5, 4 ) long -> r12
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; V12 loc8 [V12,T31] ( 4, 4.50) long -> [rsp+
9
0H]
; V12 loc8 [V12,T31] ( 4, 4.50) long -> [rsp+
A
0H]
; V13 loc9 [V13,T64] ( 5, 3.50) int -> [rsp+
8
CH]
; V13 loc9 [V13,T64] ( 5, 3.50) int -> [rsp+
9
CH]
; V14 loc10 [V14,T39] ( 5, 4 ) int -> [rsp+
8
8H]
; V14 loc10 [V14,T39] ( 5, 4 ) int -> [rsp+
9
8H]
; V15 loc11 [V15,T62] ( 6, 3.50) int -> [rsp+
8
4H]
; V15 loc11 [V15,T62] ( 6, 3.50) int -> [rsp+
9
4H]
; V16 loc12 [V16,T25] ( 9, 5 ) int -> r12
; V16 loc12 [V16,T25] ( 9, 5 ) int -> r12
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; V17 loc13 [V17,T05] ( 31, 18.50) int -> [rsp+
8
0H]
; V17 loc13 [V17,T05] ( 31, 18.50) int -> [rsp+
9
0H]
; V18 loc14 [V18,T65] ( 5, 3.50) long -> rcx
; V18 loc14 [V18,T65] ( 5, 3.50) long -> rcx
;* V19 loc15 [V19 ] ( 0, 0 ) long -> zero-ref
;* V19 loc15 [V19 ] ( 0, 0 ) long -> zero-ref
; V20 OutArgs [V20 ] ( 1, 1 ) lclBlk (32) [rsp+00H] "OutgoingArgSpace"
; V20 OutArgs [V20 ] ( 1, 1 ) lclBlk (32) [rsp+00H] "OutgoingArgSpace"
;* V21 tmp1 [V21 ] ( 0, 0 ) struct (16) zero-ref "dup spill"
;* V21 tmp1 [V21 ] ( 0, 0 ) struct (16) zero-ref "dup spill"
;* V22 tmp2 [V22 ] ( 0, 0 ) struct (16) zero-ref "struct address for call/obj"
;* V22 tmp2 [V22 ] ( 0, 0 ) struct (16) zero-ref "struct address for call/obj"
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; V23 tmp3 [V23,T40] ( 4, 4 ) int -> r
a
x "impSpillLclRefs"
; V23 tmp3 [V23,T40] ( 4, 4 ) int -> r
d
x "impSpillLclRefs"
;* V24 tmp4 [V24 ] ( 0, 0 ) struct (16) zero-ref "struct address for call/obj"
;* V24 tmp4 [V24 ] ( 0, 0 ) struct (16) zero-ref "struct address for call/obj"
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; V25 tmp5 [V25,T41] ( 4, 4 ) int -> r
a
x "impSpillLclRefs"
; V25 tmp5 [V25,T41] ( 4, 4 ) int -> r
d
x "impSpillLclRefs"
;* V26 tmp6 [V26 ] ( 0, 0 ) struct (16) zero-ref "struct address for call/obj"
;* V26 tmp6 [V26 ] ( 0, 0 ) struct (16) zero-ref "struct address for call/obj"
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; V27 tmp7 [V27,T42] ( 4, 4 ) int -> r
c
x "impSpillLclRefs"
; V27 tmp7 [V27,T42] ( 4, 4 ) int -> r
d
x "impSpillLclRefs"
; V28 tmp8 [V28,T92] ( 2, 2 ) int ->
r14
"impAppendStmt"
; V28 tmp8 [V28,T92] ( 2, 2 ) int ->
rsi
"impAppendStmt"
;* V29 tmp9 [V29 ] ( 0, 0 ) struct (16) zero-ref "struct address for call/obj"
;* V29 tmp9 [V29 ] ( 0, 0 ) struct (16) zero-ref "struct address for call/obj"
;* V30 tmp10 [V30 ] ( 0, 0 ) struct (16) zero-ref "struct address for call/obj"
;* V30 tmp10 [V30 ] ( 0, 0 ) struct (16) zero-ref "struct address for call/obj"
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; V31 tmp11 [V31,T43] ( 4, 4 ) int -> r
c
x "impSpillLclRefs"
; V31 tmp11 [V31,T43] ( 4, 4 ) int -> r
d
x "impSpillLclRefs"
; V32 tmp12 [V32,T105] ( 3, 1.50) byref -> r
c
x
; V32 tmp12 [V32,T105] ( 3, 1.50) byref -> r
d
x
; V33 tmp13 [V33,T106] ( 3, 1.50) byref -> r
c
x
; V33 tmp13 [V33,T106] ( 3, 1.50) byref -> r
d
x
; V34 tmp14 [V34,T115] ( 3, 1.50) int ->
rdx
; V34 tmp14 [V34,T115] ( 3, 1.50) int ->
r9
;* V35 tmp15 [V35,T15
9
] ( 0, 0 ) int -> zero-ref "impSpillLclRefs"
;* V35 tmp15 [V35,T15
8
] ( 0, 0 ) int -> zero-ref "impSpillLclRefs"
;* V36 tmp16 [V36 ] ( 0, 0 ) struct ( 8) zero-ref "dup spill"
;* V36 tmp16 [V36 ] ( 0, 0 ) struct ( 8) zero-ref "dup spill"
;* V37 tmp17 [V37 ] ( 0, 0 ) struct (16) zero-ref "dup spill"
;* V37 tmp17 [V37 ] ( 0, 0 ) struct (16) zero-ref "dup spill"
;* V38 tmp18 [V38 ] ( 0, 0 ) struct (16) zero-ref "dup spill"
;* V38 tmp18 [V38 ] ( 0, 0 ) struct (16) zero-ref "dup spill"
; V39 tmp19 [V39,T68] ( 4, 3.25) ushort -> r14 "Inline stloc first use temp"
; V39 tmp19 [V39,T68] ( 4, 3.25) ushort -> r14 "Inline stloc first use temp"
; V40 tmp20 [V40,T93] ( 2, 2 ) bool -> rcx "Inlining Arg"
; V40 tmp20 [V40,T93] ( 2, 2 ) bool -> rcx "Inlining Arg"
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; V41 tmp21 [V41,T12
1
] ( 2, 1.50) ref -> rax class-hnd "Inlining Arg"
; V41 tmp21 [V41,T12
0
] ( 2, 1.50) ref -> rax class-hnd "Inlining Arg"
; V42 tmp22 [V42,T12
2
] ( 2, 1.50) ref -> rdx class-hnd "Inlining Arg"
; V42 tmp22 [V42,T12
1
] ( 2, 1.50) ref -> rdx class-hnd "Inlining Arg"
; V43 tmp23 [V43,T26] ( 6, 5 ) long -> r13 "Inlining Arg"
; V43 tmp23 [V43,T26] ( 6, 5 ) long -> r13 "Inlining Arg"
; V44 tmp24 [V44,T116] ( 3, 1.50) long -> r12 "Inline stloc first use temp"
; V44 tmp24 [V44,T116] ( 3, 1.50) long -> r12 "Inline stloc first use temp"
;* V45 tmp25 [V45 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp"
;* V45 tmp25 [V45 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp"
;* V46 tmp26 [V46 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V46 tmp26 [V46 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
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; V47 tmp27 [V47,T28] ( 4, 5 ) int ->
r9
"Inline stloc first use temp"
; V47 tmp27 [V47,T28] ( 4, 5 ) int ->
rax
"Inline stloc first use temp"
; V48 tmp28 [V48,T07] ( 5, 14 ) int -> r13 "Inlining Arg"
; V48 tmp28 [V48,T07] ( 5, 14 ) int -> r13 "Inlining Arg"
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; V49 tmp29 [V49,T2
3
] ( 3, 6 ) int -> r
d
x "Inline stloc first use temp"
; V49 tmp29 [V49,T2
2
] ( 3, 6 ) int -> r
c
x "Inline stloc first use temp"
; V50 tmp30 [V50,T50] ( 2, 4 ) bool -> rcx "Inlining Arg"
; V50 tmp30 [V50,T50] ( 2, 4 ) bool -> rcx "Inlining Arg"
; V51 tmp31 [V51,T81] ( 2, 2.50) ref -> r9 class-hnd "Inlining Arg"
; V51 tmp31 [V51,T81] ( 2, 2.50) ref -> r9 class-hnd "Inlining Arg"
; V52 tmp32 [V52,T82] ( 2, 2.50) ref -> rdx class-hnd "Inlining Arg"
; V52 tmp32 [V52,T82] ( 2, 2.50) ref -> rdx class-hnd "Inlining Arg"
; V53 tmp33 [V53,T117] ( 3, 1.50) long -> r9 "Inline stloc first use temp"
; V53 tmp33 [V53,T117] ( 3, 1.50) long -> r9 "Inline stloc first use temp"
;* V54 tmp34 [V54 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp"
;* V54 tmp34 [V54 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp"
;* V55 tmp35 [V55 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V55 tmp35 [V55 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
; V56 tmp36 [V56,T51] ( 2, 4 ) bool -> rcx "Inlining Arg"
; V56 tmp36 [V56,T51] ( 2, 4 ) bool -> rcx "Inlining Arg"
; V57 tmp37 [V57,T83] ( 2, 2.50) ref -> r11 class-hnd "Inlining Arg"
; V57 tmp37 [V57,T83] ( 2, 2.50) ref -> r11 class-hnd "Inlining Arg"
; V58 tmp38 [V58,T84] ( 2, 2.50) ref -> rdx class-hnd "Inlining Arg"
; V58 tmp38 [V58,T84] ( 2, 2.50) ref -> rdx class-hnd "Inlining Arg"
; V59 tmp39 [V59,T118] ( 3, 1.50) long -> r12 "Inline stloc first use temp"
; V59 tmp39 [V59,T118] ( 3, 1.50) long -> r12 "Inline stloc first use temp"
;* V60 tmp40 [V60 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp"
;* V60 tmp40 [V60 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp"
;* V61 tmp41 [V61 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V61 tmp41 [V61 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
; V62 tmp42 [V62,T52] ( 2, 4 ) bool -> rcx "Inlining Arg"
; V62 tmp42 [V62,T52] ( 2, 4 ) bool -> rcx "Inlining Arg"
; V63 tmp43 [V63,T85] ( 2, 2.50) ref -> r9 class-hnd "Inlining Arg"
; V63 tmp43 [V63,T85] ( 2, 2.50) ref -> r9 class-hnd "Inlining Arg"
; V64 tmp44 [V64,T86] ( 2, 2.50) ref -> rdx class-hnd "Inlining Arg"
; V64 tmp44 [V64,T86] ( 2, 2.50) ref -> rdx class-hnd "Inlining Arg"
; V65 tmp45 [V65,T53] ( 2, 4 ) bool -> rcx "Inlining Arg"
; V65 tmp45 [V65,T53] ( 2, 4 ) bool -> rcx "Inlining Arg"
; V66 tmp46 [V66,T87] ( 2, 2.50) ref -> r9 class-hnd "Inlining Arg"
; V66 tmp46 [V66,T87] ( 2, 2.50) ref -> r9 class-hnd "Inlining Arg"
; V67 tmp47 [V67,T88] ( 2, 2.50) ref -> rdx class-hnd "Inlining Arg"
; V67 tmp47 [V67,T88] ( 2, 2.50) ref -> rdx class-hnd "Inlining Arg"
; V68 tmp48 [V68,T78] ( 3, 3 ) int -> r12 "Inlining Arg"
; V68 tmp48 [V68,T78] ( 3, 3 ) int -> r12 "Inlining Arg"
; V69 tmp49 [V69,T119] ( 3, 1.50) int -> r9 "Inline stloc first use temp"
; V69 tmp49 [V69,T119] ( 3, 1.50) int -> r9 "Inline stloc first use temp"
;* V70 tmp50 [V70 ] ( 0, 0 ) struct ( 8) zero-ref "NewObj constructor temp"
;* V70 tmp50 [V70 ] ( 0, 0 ) struct ( 8) zero-ref "NewObj constructor temp"
;* V71 tmp51 [V71 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V71 tmp51 [V71 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
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; V72 tmp52 [V72,T54] ( 2, 4 ) bool -> r
d
x "Inlining Arg"
; V72 tmp52 [V72,T54] ( 2, 4 ) bool -> r
c
x "Inlining Arg"
; V73 tmp53 [V73,T89] ( 2, 2.50) ref -> rdi class-hnd "Inlining Arg"
; V73 tmp53 [V73,T89] ( 2, 2.50) ref -> rdi class-hnd "Inlining Arg"
; V74 tmp54 [V74,T90] ( 2, 2.50) ref -> r12 class-hnd "Inlining Arg"
; V74 tmp54 [V74,T90] ( 2, 2.50) ref -> r12 class-hnd "Inlining Arg"
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; V75 tmp55 [V75,T67] ( 11, 3.25) int ->
[rsp+7CH]
"Inline stloc first use temp"
; V75 tmp55 [V75,T67] ( 11, 3.25) int ->
r12
"Inline stloc first use temp"
; V76 tmp56 [V76,T2
0
] (
10
,
6
) int ->
r12
"Inlining Arg"
; V76 tmp56 [V76,T2
3
] (
9
,
5.50
) int ->
rcx
"Inlining Arg"
; V77 tmp57 [V77,T14
6
] ( 2, 1 ) bool -> [rsp+
78
H] "Inlining Arg"
; V77 tmp57 [V77,T14
5
] ( 2, 1 ) bool -> [rsp+
8C
H] "Inlining Arg"
; V78 tmp58 [V78,T16
1
] ( 2, 0.75) ref -> [rsp+
50H
] class-hnd "Inlining Arg"
; V78 tmp58 [V78,T16
0
] ( 2, 0.75) ref -> [rsp+
68H
] class-hnd "Inlining Arg"
; V79 tmp59 [V79,T16
2
] ( 2, 0.75) ref ->
r12
class-hnd "Inlining Arg"
; V79 tmp59 [V79,T16
1
] ( 2, 0.75) ref ->
[rsp+60H]
class-hnd "Inlining Arg"
;* V80 tmp60 [V80 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp"
;* V80 tmp60 [V80 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp"
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;* V81 tmp61 [V81,T15
7
] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V81 tmp61 [V81,T15
6
] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V82 tmp62 [V82 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V82 tmp62 [V82 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V83 tmp63 [V83 ] ( 0, 0 ) struct ( 8) zero-ref "NewObj constructor temp"
;* V83 tmp63 [V83 ] ( 0, 0 ) struct ( 8) zero-ref "NewObj constructor temp"
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; V84 tmp64 [V84,T94] ( 2, 2 ) bool -> [rsp+
74H
] "Inlining Arg"
; V84 tmp64 [V84,T94] ( 2, 2 ) bool -> [rsp+
88H
] "Inlining Arg"
; V85 tmp65 [V85,T12
3
] ( 2, 1.50) ref -> [rsp+
4
8H] class-hnd "Inlining Arg"
; V85 tmp65 [V85,T12
2
] ( 2, 1.50) ref -> [rsp+
5
8H] class-hnd "Inlining Arg"
; V86 tmp66 [V86,T12
4
] ( 2, 1.50) ref -> rsi class-hnd "Inlining Arg"
; V86 tmp66 [V86,T12
3
] ( 2, 1.50) ref -> rsi class-hnd "Inlining Arg"
;* V87 tmp67 [V87 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V87 tmp67 [V87 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
; V88 tmp68 [V88,T08] ( 7, 11 ) int -> rsi "Inline stloc first use temp"
; V88 tmp68 [V88,T08] ( 7, 11 ) int -> rsi "Inline stloc first use temp"
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; V89 tmp69 [V89,T02] ( 7, 19 ) int ->
[rsp+70H]
"Inlining Arg"
; V89 tmp69 [V89,T02] ( 7, 19 ) int ->
registers
"Inlining Arg"
; V90 tmp70 [V90,T55] ( 2, 4 ) int -> r
c
x "Inline stloc first use temp"
; V90 tmp70 [V90,T55] ( 2, 4 ) int -> r
d
x "Inline stloc first use temp"
; V91 tmp71 [V91,T95] ( 2, 2 ) bool -> r
c
x "Inlining Arg"
; V91 tmp71 [V91,T95] ( 2, 2 ) bool -> r
d
x "Inlining Arg"
; V92 tmp72 [V92,T12
5
] ( 2, 1.50) ref ->
rax
class-hnd "Inlining Arg"
; V92 tmp72 [V92,T12
4
] ( 2, 1.50) ref ->
rsi
class-hnd "Inlining Arg"
; V93 tmp73 [V93,T12
6
] ( 2, 1.50) ref ->
rdx
class-hnd "Inlining Arg"
; V93 tmp73 [V93,T12
5
] ( 2, 1.50) ref ->
r9
class-hnd "Inlining Arg"
;* V94 tmp74 [V94 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp"
;* V94 tmp74 [V94 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp"
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;* V95 tmp75 [V95,T15
8
] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V95 tmp75 [V95,T15
7
] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V96 tmp76 [V96 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V96 tmp76 [V96 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V97 tmp77 [V97 ] ( 0, 0 ) struct ( 8) zero-ref "NewObj constructor temp"
;* V97 tmp77 [V97 ] ( 0, 0 ) struct ( 8) zero-ref "NewObj constructor temp"
; V98 tmp78 [V98,T96] ( 2, 2 ) bool -> r9 "Inlining Arg"
; V98 tmp78 [V98,T96] ( 2, 2 ) bool -> r9 "Inlining Arg"
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; V99 tmp79 [V99,T12
7
] ( 2, 1.50) ref -> r14 class-hnd "Inlining Arg"
; V99 tmp79 [V99,T12
6
] ( 2, 1.50) ref -> r14 class-hnd "Inlining Arg"
; V100 tmp80 [V100,T12
8
] ( 2, 1.50) ref -> rsi class-hnd "Inlining Arg"
; V100 tmp80 [V100,T12
7
] ( 2, 1.50) ref -> rsi class-hnd "Inlining Arg"
;* V101 tmp81 [V101 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V101 tmp81 [V101 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
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; V102 tmp82 [V102,T09] ( 7, 11 ) int -> r
c
x "Inline stloc first use temp"
; V102 tmp82 [V102,T09] ( 7, 11 ) int -> r
d
x "Inline stloc first use temp"
; V103 tmp83 [V103,T03] ( 7, 19 ) int -> r12 "Inlining Arg"
; V103 tmp83 [V103,T03] ( 7, 19 ) int -> r12 "Inlining Arg"
; V104 tmp84 [V104,T56] ( 2, 4 ) int -> r9 "Inline stloc first use temp"
; V104 tmp84 [V104,T56] ( 2, 4 ) int -> r9 "Inline stloc first use temp"
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; V105 tmp85 [V105,T97] ( 2, 2 ) bool -> r
c
x "Inlining Arg"
; V105 tmp85 [V105,T97] ( 2, 2 ) bool -> r
d
x "Inlining Arg"
; V106 tmp86 [V106,T12
9
] ( 2, 1.50) ref ->
rax
class-hnd "Inlining Arg"
; V106 tmp86 [V106,T12
8
] ( 2, 1.50) ref ->
rdi
class-hnd "Inlining Arg"
; V107 tmp87 [V107,
T130
] ( 2, 1.50) ref ->
rdx
class-hnd "Inlining Arg"
; V107 tmp87 [V107,
T129
] ( 2, 1.50) ref ->
r9
class-hnd "Inlining Arg"
;* V108 tmp88 [V108 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp"
;* V108 tmp88 [V108 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp"
;* V109 tmp89 [V109 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V109 tmp89 [V109 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V110 tmp90 [V110 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V110 tmp90 [V110 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V111 tmp91 [V111 ] ( 0, 0 ) struct ( 8) zero-ref "NewObj constructor temp"
;* V111 tmp91 [V111 ] ( 0, 0 ) struct ( 8) zero-ref "NewObj constructor temp"
;* V112 tmp92 [V112 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V112 tmp92 [V112 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V113 tmp93 [V113 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V113 tmp93 [V113 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
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; V114 tmp94 [V114,T00] ( 7, 25 ) int ->
r14
"Inlining Arg"
; V114 tmp94 [V114,T00] ( 7, 25 ) int ->
rdi
"Inlining Arg"
; V115 tmp95 [V115,T57] ( 2, 4 ) int -> r
c
x "Inline stloc first use temp"
; V115 tmp95 [V115,T57] ( 2, 4 ) int -> r
d
x "Inline stloc first use temp"
; V116 tmp96 [V116,T14] ( 2, 8 ) bool -> r
c
x "Inlining Arg"
; V116 tmp96 [V116,T14] ( 2, 8 ) bool -> r
d
x "Inlining Arg"
; V117 tmp97 [V117,T34] ( 2, 4.50) ref ->
rax
class-hnd "Inlining Arg"
; V117 tmp97 [V117,T34] ( 2, 4.50) ref ->
r11
class-hnd "Inlining Arg"
; V118 tmp98 [V118,T35] ( 2, 4.50) ref ->
rdx
class-hnd "Inlining Arg"
; V118 tmp98 [V118,T35] ( 2, 4.50) ref ->
r9
class-hnd "Inlining Arg"
;* V119 tmp99 [V119 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp"
;* V119 tmp99 [V119 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp"
;* V120 tmp100 [V120 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V120 tmp100 [V120 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V121 tmp101 [V121 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V121 tmp101 [V121 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V122 tmp102 [V122 ] ( 0, 0 ) struct ( 8) zero-ref "NewObj constructor temp"
;* V122 tmp102 [V122 ] ( 0, 0 ) struct ( 8) zero-ref "NewObj constructor temp"
;* V123 tmp103 [V123 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V123 tmp103 [V123 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V124 tmp104 [V124 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V124 tmp104 [V124 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
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; V125 tmp105 [V125,T01] ( 7, 25 ) int ->
r14
"Inlining Arg"
; V125 tmp105 [V125,T01] ( 7, 25 ) int ->
rdi
"Inlining Arg"
; V126 tmp106 [V126,T58] ( 2, 4 ) int -> r
c
x "Inline stloc first use temp"
; V126 tmp106 [V126,T58] ( 2, 4 ) int -> r
d
x "Inline stloc first use temp"
; V127 tmp107 [V127,T15] ( 2, 8 ) bool -> r
c
x "Inlining Arg"
; V127 tmp107 [V127,T15] ( 2, 8 ) bool -> r
d
x "Inlining Arg"
; V128 tmp108 [V128,T36] ( 2, 4.50) ref ->
rax
class-hnd "Inlining Arg"
; V128 tmp108 [V128,T36] ( 2, 4.50) ref ->
r10
class-hnd "Inlining Arg"
; V129 tmp109 [V129,T37] ( 2, 4.50) ref ->
rdx
class-hnd "Inlining Arg"
; V129 tmp109 [V129,T37] ( 2, 4.50) ref ->
r9
class-hnd "Inlining Arg"
;* V130 tmp110 [V130 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp"
;* V130 tmp110 [V130 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp"
; V131 tmp111 [V131,T91] ( 2, 2 ) byref -> rbx "Inlining Arg"
; V131 tmp111 [V131,T91] ( 2, 2 ) byref -> rbx "Inlining Arg"
;* V132 tmp112 [V132 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V132 tmp112 [V132 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V133 tmp113 [V133 ] ( 0, 0 ) struct ( 8) zero-ref "NewObj constructor temp"
;* V133 tmp113 [V133 ] ( 0, 0 ) struct ( 8) zero-ref "NewObj constructor temp"
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; V134 tmp114 [V134,T98] ( 2, 2 ) bool -> r
c
x "Inlining Arg"
; V134 tmp114 [V134,T98] ( 2, 2 ) bool -> r
d
x "Inlining Arg"
; V135 tmp115 [V135,T13
1
] ( 2, 1.50) ref ->
rax
class-hnd "Inlining Arg"
; V135 tmp115 [V135,T13
0
] ( 2, 1.50) ref ->
r10
class-hnd "Inlining Arg"
; V136 tmp116 [V136,T13
2
] ( 2, 1.50) ref ->
rdx
class-hnd "Inlining Arg"
; V136 tmp116 [V136,T13
1
] ( 2, 1.50) ref ->
r9
class-hnd "Inlining Arg"
;* V137 tmp117 [V137 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V137 tmp117 [V137 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
; V138 tmp118 [V138,T10] ( 7, 11 ) int -> r9 "Inline stloc first use temp"
; V138 tmp118 [V138,T10] ( 7, 11 ) int -> r9 "Inline stloc first use temp"
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; V139 tmp119 [V139,T04] ( 7, 19 ) int ->
r14
"Inlining Arg"
; V139 tmp119 [V139,T04] ( 7, 19 ) int ->
rsi
"Inlining Arg"
; V140 tmp120 [V140,T59] ( 2, 4 ) int -> r10 "Inline stloc first use temp"
; V140 tmp120 [V140,T59] ( 2, 4 ) int -> r10 "Inline stloc first use temp"
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; V141 tmp121 [V141,T99] ( 2, 2 ) bool -> r
c
x "Inlining Arg"
; V141 tmp121 [V141,T99] ( 2, 2 ) bool -> r
d
x "Inlining Arg"
; V142 tmp122 [V142,T13
3
] ( 2, 1.50) ref ->
rax
class-hnd "Inlining Arg"
; V142 tmp122 [V142,T13
2
] ( 2, 1.50) ref ->
r10
class-hnd "Inlining Arg"
; V143 tmp123 [V143,T13
4
] ( 2, 1.50) ref ->
rdx
class-hnd "Inlining Arg"
; V143 tmp123 [V143,T13
3
] ( 2, 1.50) ref ->
r9
class-hnd "Inlining Arg"
; V144 tmp124 [V144,T100] ( 2, 2 ) bool -> rcx "Inlining Arg"
; V144 tmp124 [V144,T100] ( 2, 2 ) bool -> rcx "Inlining Arg"
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; V145 tmp125 [V145,T13
5
] ( 2, 1.50) ref -> rax class-hnd "Inlining Arg"
; V145 tmp125 [V145,T13
4
] ( 2, 1.50) ref -> rax class-hnd "Inlining Arg"
; V146 tmp126 [V146,T13
6
] ( 2, 1.50) ref -> rdx class-hnd "Inlining Arg"
; V146 tmp126 [V146,T13
5
] ( 2, 1.50) ref -> rdx class-hnd "Inlining Arg"
; V147 tmp127 [V147,T18] ( 7, 4.75) long -> rsi V00._ticks(offs=0x00) P-INDEP "field V00._ticks (fldOffset=0x0)"
; V147 tmp127 [V147,T18] ( 7, 4.75) long -> rsi V00._ticks(offs=0x00) P-INDEP "field V00._ticks (fldOffset=0x0)"
; V148 tmp128 [V148,T11] ( 11, 9 ) byref -> rbx V201._pointer(offs=0x00) P-INDEP "field V01._pointer (fldOffset=0x0)"
; V148 tmp128 [V148,T11] ( 11, 9 ) byref -> rbx V201._pointer(offs=0x00) P-INDEP "field V01._pointer (fldOffset=0x0)"
; V149 tmp129 [V149,T17] ( 12, 7 ) int -> rbp V201._length(offs=0x08) P-INDEP "field V01._length (fldOffset=0x8)"
; V149 tmp129 [V149,T17] ( 12, 7 ) int -> rbp V201._length(offs=0x08) P-INDEP "field V01._length (fldOffset=0x8)"
;* V150 tmp130 [V150 ] ( 0, 0 ) long -> zero-ref V21.Item1(offs=0x00) P-INDEP "field V21.Item1 (fldOffset=0x0)"
;* V150 tmp130 [V150 ] ( 0, 0 ) long -> zero-ref V21.Item1(offs=0x00) P-INDEP "field V21.Item1 (fldOffset=0x0)"
;* V151 tmp131 [V151 ] ( 0, 0 ) long -> zero-ref V21.Item2(offs=0x08) P-INDEP "field V21.Item2 (fldOffset=0x8)"
;* V151 tmp131 [V151 ] ( 0, 0 ) long -> zero-ref V21.Item2(offs=0x08) P-INDEP "field V21.Item2 (fldOffset=0x8)"
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; V152 tmp132 [V152,T13
7
] ( 2, 1 ) byref -> rsi V22._pointer(offs=0x00) P-INDEP "field V22._pointer (fldOffset=0x0)"
; V152 tmp132 [V152,T13
6
] ( 2, 1 ) byref -> rsi V22._pointer(offs=0x00) P-INDEP "field V22._pointer (fldOffset=0x0)"
; V153 tmp133 [V153,T14
7
] ( 2, 1 ) int -> r14 V22._length(offs=0x08) P-INDEP "field V22._length (fldOffset=0x8)"
; V153 tmp133 [V153,T14
6
] ( 2, 1 ) int -> r14 V22._length(offs=0x08) P-INDEP "field V22._length (fldOffset=0x8)"
; V154 tmp134 [V154,T44] ( 2, 4 ) byref -> r
d
i V24._pointer(offs=0x00) P-INDEP "field V24._pointer (fldOffset=0x0)"
; V154 tmp134 [V154,T44] ( 2, 4 ) byref -> r
s
i V24._pointer(offs=0x00) P-INDEP "field V24._pointer (fldOffset=0x0)"
;* V155 tmp135 [V155,T60] ( 0, 0 ) int -> zero-ref V24._length(offs=0x08) P-INDEP "field V24._length (fldOffset=0x8)"
;* V155 tmp135 [V155,T60] ( 0, 0 ) int -> zero-ref V24._length(offs=0x08) P-INDEP "field V24._length (fldOffset=0x8)"
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; V156 tmp136 [V156,T45] ( 2, 4 ) byref -> r
d
i V26._pointer(offs=0x00) P-INDEP "field V26._pointer (fldOffset=0x0)"
; V156 tmp136 [V156,T45] ( 2, 4 ) byref -> r
s
i V26._pointer(offs=0x00) P-INDEP "field V26._pointer (fldOffset=0x0)"
;* V157 tmp137 [V157,T61] ( 0, 0 ) int -> zero-ref V26._length(offs=0x08) P-INDEP "field V26._length (fldOffset=0x8)"
;* V157 tmp137 [V157,T61] ( 0, 0 ) int -> zero-ref V26._length(offs=0x08) P-INDEP "field V26._length (fldOffset=0x8)"
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; V158 tmp138 [V158,T13
8
] ( 2, 1 ) byref ->
rbx
V29._pointer(offs=0x00) P-INDEP "field V29._pointer (fldOffset=0x0)"
; V158 tmp138 [V158,T13
7
] ( 2, 1 ) byref ->
rdi
V29._pointer(offs=0x00) P-INDEP "field V29._pointer (fldOffset=0x0)"
; V159 tmp139 [V159,T14
8
] ( 2, 1 ) int -> r
c
x V29._length(offs=0x08) P-INDEP "field V29._length (fldOffset=0x8)"
; V159 tmp139 [V159,T14
7
] ( 2, 1 ) int -> r
d
x V29._length(offs=0x08) P-INDEP "field V29._length (fldOffset=0x8)"
; V160 tmp140 [V160,T13
9
] ( 2, 1 ) byref -> [rsp+
4
0H] V30._pointer(offs=0x00) P-INDEP "field V30._pointer (fldOffset=0x0)"
; V160 tmp140 [V160,T13
8
] ( 2, 1 ) byref -> [rsp+
5
0H] V30._pointer(offs=0x00) P-INDEP "field V30._pointer (fldOffset=0x0)"
; V161 tmp141 [V161,T14
9
] ( 2, 1 ) int -> [rsp+
6CH
] V30._length(offs=0x08) P-INDEP "field V30._length (fldOffset=0x8)"
; V161 tmp141 [V161,T14
8
] ( 2, 1 ) int -> [rsp+
84H
] V30._length(offs=0x08) P-INDEP "field V30._length (fldOffset=0x8)"
;* V162 tmp142 [V162 ] ( 0, 0 ) int -> zero-ref V36.Item1(offs=0x00) P-INDEP "field V36.Item1 (fldOffset=0x0)"
;* V162 tmp142 [V162 ] ( 0, 0 ) int -> zero-ref V36.Item1(offs=0x00) P-INDEP "field V36.Item1 (fldOffset=0x0)"
;* V163 tmp143 [V163 ] ( 0, 0 ) int -> zero-ref V36.Item2(offs=0x04) P-INDEP "field V36.Item2 (fldOffset=0x4)"
;* V163 tmp143 [V163 ] ( 0, 0 ) int -> zero-ref V36.Item2(offs=0x04) P-INDEP "field V36.Item2 (fldOffset=0x4)"
;* V164 tmp144 [V164 ] ( 0, 0 ) long -> zero-ref V37.Item1(offs=0x00) P-INDEP "field V37.Item1 (fldOffset=0x0)"
;* V164 tmp144 [V164 ] ( 0, 0 ) long -> zero-ref V37.Item1(offs=0x00) P-INDEP "field V37.Item1 (fldOffset=0x0)"
;* V165 tmp145 [V165 ] ( 0, 0 ) long -> zero-ref V37.Item2(offs=0x08) P-INDEP "field V37.Item2 (fldOffset=0x8)"
;* V165 tmp145 [V165 ] ( 0, 0 ) long -> zero-ref V37.Item2(offs=0x08) P-INDEP "field V37.Item2 (fldOffset=0x8)"
;* V166 tmp146 [V166 ] ( 0, 0 ) long -> zero-ref V38.Item1(offs=0x00) P-INDEP "field V38.Item1 (fldOffset=0x0)"
;* V166 tmp146 [V166 ] ( 0, 0 ) long -> zero-ref V38.Item1(offs=0x00) P-INDEP "field V38.Item1 (fldOffset=0x0)"
;* V167 tmp147 [V167 ] ( 0, 0 ) long -> zero-ref V38.Item2(offs=0x08) P-INDEP "field V38.Item2 (fldOffset=0x8)"
;* V167 tmp147 [V167 ] ( 0, 0 ) long -> zero-ref V38.Item2(offs=0x08) P-INDEP "field V38.Item2 (fldOffset=0x8)"
;* V168 tmp148 [V168 ] ( 0, 0 ) long -> zero-ref V45.Item1(offs=0x00) P-INDEP "field V45.Item1 (fldOffset=0x0)"
;* V168 tmp148 [V168 ] ( 0, 0 ) long -> zero-ref V45.Item1(offs=0x00) P-INDEP "field V45.Item1 (fldOffset=0x0)"
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; V169 tmp149 [V169,
T150
] ( 2, 1 ) long -> r13 V45.Item2(offs=0x08) P-INDEP "field V45.Item2 (fldOffset=0x8)"
; V169 tmp149 [V169,
T149
] ( 2, 1 ) long -> r13 V45.Item2(offs=0x08) P-INDEP "field V45.Item2 (fldOffset=0x8)"
;* V170 tmp150 [V170 ] ( 0, 0 ) long -> zero-ref V54.Item1(offs=0x00) P-INDEP "field V54.Item1 (fldOffset=0x0)"
;* V170 tmp150 [V170 ] ( 0, 0 ) long -> zero-ref V54.Item1(offs=0x00) P-INDEP "field V54.Item1 (fldOffset=0x0)"
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; V171 tmp151 [V171,T15
1
] ( 2, 1 ) long -> r10 V54.Item2(offs=0x08) P-INDEP "field V54.Item2 (fldOffset=0x8)"
; V171 tmp151 [V171,T15
0
] ( 2, 1 ) long -> r10 V54.Item2(offs=0x08) P-INDEP "field V54.Item2 (fldOffset=0x8)"
;* V172 tmp152 [V172 ] ( 0, 0 ) long -> zero-ref V60.Item1(offs=0x00) P-INDEP "field V60.Item1 (fldOffset=0x0)"
;* V172 tmp152 [V172 ] ( 0, 0 ) long -> zero-ref V60.Item1(offs=0x00) P-INDEP "field V60.Item1 (fldOffset=0x0)"
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; V173 tmp153 [V173,T15
2
] ( 2, 1 ) long -> r11 V60.Item2(offs=0x08) P-INDEP "field V60.Item2 (fldOffset=0x8)"
; V173 tmp153 [V173,T15
1
] ( 2, 1 ) long -> r11 V60.Item2(offs=0x08) P-INDEP "field V60.Item2 (fldOffset=0x8)"
;* V174 tmp154 [V174 ] ( 0, 0 ) int -> zero-ref V70.Item1(offs=0x00) P-INDEP "field V70.Item1 (fldOffset=0x0)"
;* V174 tmp154 [V174 ] ( 0, 0 ) int -> zero-ref V70.Item1(offs=0x00) P-INDEP "field V70.Item1 (fldOffset=0x0)"
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; V175 tmp155 [V175,T15
3
] ( 2, 1 ) int -> r
c
x V70.Item2(offs=0x04) P-INDEP "field V70.Item2 (fldOffset=0x4)"
; V175 tmp155 [V175,T15
2
] ( 2, 1 ) int -> r
d
x V70.Item2(offs=0x04) P-INDEP "field V70.Item2 (fldOffset=0x4)"
; V176 tmp156 [V176,
T140
] ( 2, 1 ) byref -> [rsp+
3
8H] V80._pointer(offs=0x00) P-INDEP "field V80._pointer (fldOffset=0x0)"
; V176 tmp156 [V176,
T139
] ( 2, 1 ) byref -> [rsp+
4
8H] V80._pointer(offs=0x00) P-INDEP "field V80._pointer (fldOffset=0x0)"
; V177 tmp157 [V177,T15
4
] ( 2, 1 ) int -> [rsp+
68
H] V80._length(offs=0x08) P-INDEP "field V80._length (fldOffset=0x8)"
; V177 tmp157 [V177,T15
3
] ( 2, 1 ) int -> [rsp+
80
H] V80._length(offs=0x08) P-INDEP "field V80._length (fldOffset=0x8)"
; V178 tmp158 [V178,T14
1
] ( 2, 1 ) byref -> rsi V83._value(offs=0x00) P-INDEP "field V83._value (fldOffset=0x0)"
; V178 tmp158 [V178,T14
0
] ( 2, 1 ) byref -> rsi V83._value(offs=0x00) P-INDEP "field V83._value (fldOffset=0x0)"
; V179 tmp159 [V179,T70] ( 3, 3 ) byref -> [rsp+
3
0H] V87._pointer(offs=0x00) P-INDEP "field V87._pointer (fldOffset=0x0)"
; V179 tmp159 [V179,T70] ( 3, 3 ) byref -> [rsp+
4
0H] V87._pointer(offs=0x00) P-INDEP "field V87._pointer (fldOffset=0x0)"
; V180 tmp160 [V180,T79] ( 3, 3 ) int -> [rsp+
64H
] V87._length(offs=0x08) P-INDEP "field V87._length (fldOffset=0x8)"
; V180 tmp160 [V180,T79] ( 3, 3 ) int -> [rsp+
7CH
] V87._length(offs=0x08) P-INDEP "field V87._length (fldOffset=0x8)"
; V181 tmp161 [V181,T14
2
] ( 2, 1 ) byref -> rsi V94._pointer(offs=0x00) P-INDEP "field V94._pointer (fldOffset=0x0)"
; V181 tmp161 [V181,T14
1
] ( 2, 1 ) byref -> rsi V94._pointer(offs=0x00) P-INDEP "field V94._pointer (fldOffset=0x0)"
; V182 tmp162 [V182,T15
5
] ( 2, 1 ) int -> r14 V94._length(offs=0x08) P-INDEP "field V94._length (fldOffset=0x8)"
; V182 tmp162 [V182,T15
4
] ( 2, 1 ) int -> r14 V94._length(offs=0x08) P-INDEP "field V94._length (fldOffset=0x8)"
; V183 tmp163 [V183,T14
3
] ( 2, 1 ) byref -> rsi V97._value(offs=0x00) P-INDEP "field V97._value (fldOffset=0x0)"
; V183 tmp163 [V183,T14
2
] ( 2, 1 ) byref -> rsi V97._value(offs=0x00) P-INDEP "field V97._value (fldOffset=0x0)"
; V184 tmp164 [V184,T71] ( 3, 3 ) byref ->
rsi
V101._pointer(offs=0x00) P-INDEP "field V101._pointer (fldOffset=0x0)"
; V184 tmp164 [V184,T71] ( 3, 3 ) byref ->
[rsp+38H]
V101._pointer(offs=0x00) P-INDEP "field V101._pointer (fldOffset=0x0)"
; V185 tmp165 [V185,T66] ( 4, 3.50) int -> r14 V101._length(offs=0x08) P-INDEP "field V101._length (fldOffset=0x8)"
; V185 tmp165 [V185,T66] ( 4, 3.50) int -> r14 V101._length(offs=0x08) P-INDEP "field V101._length (fldOffset=0x8)"
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; V186 tmp166 [V186,T46] ( 2, 4 ) byref -> r
d
i V108._pointer(offs=0x00) P-INDEP "field V108._pointer (fldOffset=0x0)"
; V186 tmp166 [V186,T46] ( 2, 4 ) byref -> r
s
i V108._pointer(offs=0x00) P-INDEP "field V108._pointer (fldOffset=0x0)"
;* V187 tmp167 [V187,T101] ( 0, 0 ) int -> zero-ref V108._length(offs=0x08) P-INDEP "field V108._length (fldOffset=0x8)"
;* V187 tmp167 [V187,T101] ( 0, 0 ) int -> zero-ref V108._length(offs=0x08) P-INDEP "field V108._length (fldOffset=0x8)"
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; V188 tmp168 [V188,T47] ( 2, 4 ) byref -> r
d
i V111._value(offs=0x00) P-INDEP "field V111._value (fldOffset=0x0)"
; V188 tmp168 [V188,T47] ( 2, 4 ) byref -> r
s
i V111._value(offs=0x00) P-INDEP "field V111._value (fldOffset=0x0)"
; V189 tmp169 [V189,T32] ( 3, 4.50) byref -> r
d
i V112._pointer(offs=0x00) P-INDEP "field V112._pointer (fldOffset=0x0)"
; V189 tmp169 [V189,T32] ( 3, 4.50) byref -> r
s
i V112._pointer(offs=0x00) P-INDEP "field V112._pointer (fldOffset=0x0)"
;* V190 tmp170 [V190,T102] ( 0, 0 ) int -> zero-ref V112._length(offs=0x08) P-INDEP "field V112._length (fldOffset=0x8)"
;* V190 tmp170 [V190,T102] ( 0, 0 ) int -> zero-ref V112._length(offs=0x08) P-INDEP "field V112._length (fldOffset=0x8)"
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; V191 tmp171 [V191,T48] ( 2, 4 ) byref -> r
d
i V119._pointer(offs=0x00) P-INDEP "field V119._pointer (fldOffset=0x0)"
; V191 tmp171 [V191,T48] ( 2, 4 ) byref -> r
s
i V119._pointer(offs=0x00) P-INDEP "field V119._pointer (fldOffset=0x0)"
;* V192 tmp172 [V192,T103] ( 0, 0 ) int -> zero-ref V119._length(offs=0x08) P-INDEP "field V119._length (fldOffset=0x8)"
;* V192 tmp172 [V192,T103] ( 0, 0 ) int -> zero-ref V119._length(offs=0x08) P-INDEP "field V119._length (fldOffset=0x8)"
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; V193 tmp173 [V193,T49] ( 2, 4 ) byref -> r
d
i V122._value(offs=0x00) P-INDEP "field V122._value (fldOffset=0x0)"
; V193 tmp173 [V193,T49] ( 2, 4 ) byref -> r
s
i V122._value(offs=0x00) P-INDEP "field V122._value (fldOffset=0x0)"
; V194 tmp174 [V194,T33] ( 3, 4.50) byref -> r
d
i V123._pointer(offs=0x00) P-INDEP "field V123._pointer (fldOffset=0x0)"
; V194 tmp174 [V194,T33] ( 3, 4.50) byref -> r
s
i V123._pointer(offs=0x00) P-INDEP "field V123._pointer (fldOffset=0x0)"
;* V195 tmp175 [V195,T104] ( 0, 0 ) int -> zero-ref V123._length(offs=0x08) P-INDEP "field V123._length (fldOffset=0x8)"
;* V195 tmp175 [V195,T104] ( 0, 0 ) int -> zero-ref V123._length(offs=0x08) P-INDEP "field V123._length (fldOffset=0x8)"
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; V196 tmp176 [V196,T14
4
] ( 2, 1 ) byref ->
rbx
V130._pointer(offs=0x00) P-INDEP "field V130._pointer (fldOffset=0x0)"
; V196 tmp176 [V196,T14
3
] ( 2, 1 ) byref ->
rdi
V130._pointer(offs=0x00) P-INDEP "field V130._pointer (fldOffset=0x0)"
; V197 tmp177 [V197,T15
6
] ( 2, 1 ) int -> r
c
x V130._length(offs=0x08) P-INDEP "field V130._length (fldOffset=0x8)"
; V197 tmp177 [V197,T15
5
] ( 2, 1 ) int -> r
d
x V130._length(offs=0x08) P-INDEP "field V130._length (fldOffset=0x8)"
; V198 tmp178 [V198,T14
5
] ( 2, 1 ) byref ->
rbx
V133._value(offs=0x00) P-INDEP "field V133._value (fldOffset=0x0)"
; V198 tmp178 [V198,T14
4
] ( 2, 1 ) byref ->
rdi
V133._value(offs=0x00) P-INDEP "field V133._value (fldOffset=0x0)"
; V199 tmp179 [V199,T72] ( 3, 3 ) byref ->
rbx
V137._pointer(offs=0x00) P-INDEP "field V137._pointer (fldOffset=0x0)"
; V199 tmp179 [V199,T72] ( 3, 3 ) byref ->
rdi
V137._pointer(offs=0x00) P-INDEP "field V137._pointer (fldOffset=0x0)"
; V200 tmp180 [V200,T80] ( 3, 3 ) int -> r
c
x V137._length(offs=0x08) P-INDEP "field V137._length (fldOffset=0x8)"
; V200 tmp180 [V200,T80] ( 3, 3 ) int -> r
d
x V137._length(offs=0x08) P-INDEP "field V137._length (fldOffset=0x8)"
;* V201 tmp181 [V201 ] ( 0, 0 ) struct (16) zero-ref "Promoted implicit byref"
;* V201 tmp181 [V201 ] ( 0, 0 ) struct (16) zero-ref "Promoted implicit byref"
; V202 cse0 [V202,T73] ( 3, 3 ) ref -> rdx "CSE - conservative"
; V202 cse0 [V202,T73] ( 3, 3 ) ref -> rdx "CSE - conservative"
; V203 cse1 [V203,T74] ( 3, 3 ) ref -> rdx "CSE - conservative"
; V203 cse1 [V203,T74] ( 3, 3 ) ref -> rdx "CSE - conservative"
; V204 cse2 [V204,T75] ( 3, 3 ) ref -> rdx "CSE - conservative"
; V204 cse2 [V204,T75] ( 3, 3 ) ref -> rdx "CSE - conservative"
; V205 cse3 [V205,T76] ( 3, 3 ) ref -> rdx "CSE - conservative"
; V205 cse3 [V205,T76] ( 3, 3 ) ref -> rdx "CSE - conservative"
; V206 cse4 [V206,T77] ( 3, 3 ) ref -> r12 "CSE - conservative"
; V206 cse4 [V206,T77] ( 3, 3 ) ref -> r12 "CSE - conservative"
; V207 cse5 [V207,T107] ( 3, 1.50) ref -> rdx "CSE - conservative"
; V207 cse5 [V207,T107] ( 3, 1.50) ref -> rdx "CSE - conservative"
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; V208 cse6 [V208,T108] ( 3, 1.50) ref -> [rsp+
28H
] "CSE - conservative"
; V208 cse6 [V208,T108] ( 3, 1.50) ref -> [rsp+
30H
] "CSE - conservative"
; V209 cse7 [V209,T109] ( 3, 1.50) ref ->
rdx
"CSE - conservative"
; V209 cse7 [V209,T109] ( 3, 1.50) ref ->
r9
"CSE - conservative"
; V210 cse8 [V210,T110] ( 3, 1.50) ref -> rsi "CSE - conservative"
; V210 cse8 [V210,T110] ( 3, 1.50) ref -> rsi "CSE - conservative"
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; V211 cse9 [V211,T111] ( 3, 1.50) ref ->
rdx
"CSE - conservative"
; V211 cse9 [V211,T111] ( 3, 1.50) ref ->
r9
"CSE - conservative"
; V212 cse10 [V212,T2
1
] ( 3, 6 ) ref ->
rdx
"CSE - conservative"
; V212 cse10 [V212,T2
0
] ( 3, 6 ) ref ->
r9
"CSE - conservative"
; V213 cse11 [V213,T2
2
] ( 3, 6 ) ref ->
rdx
"CSE - conservative"
; V213 cse11 [V213,T2
1
] ( 3, 6 ) ref ->
r9
"CSE - conservative"
; V214 cse12 [V214,T112] ( 3, 1.50) ref ->
rdx
"CSE - conservative"
; V214 cse12 [V214,T112] ( 3, 1.50) ref ->
r9
"CSE - conservative"
; V215 cse13 [V215,T113] ( 3, 1.50) ref ->
rdx
"CSE - conservative"
; V215 cse13 [V215,T113] ( 3, 1.50) ref ->
r9
"CSE - conservative"
; V216 cse14 [V216,T114] ( 3, 1.50) ref -> rdx "CSE - conservative"
; V216 cse14 [V216,T114] ( 3, 1.50) ref -> rdx "CSE - conservative"
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; V217 cse15 [V217,
T160
] ( 3, 0.75) ref -> [rsp+2
0
H] "CSE - conservative"
; V217 cse15 [V217,
T159
] ( 3, 0.75) ref -> [rsp+2
8
H] "CSE - conservative"
; V218 cse16 [V218,T06] ( 18, 14.75) long -> [rsp+
58H
] "CSE - aggressive"
; V218 cse16 [V218,T06] ( 18, 14.75) long -> [rsp+
70H
] "CSE - aggressive"
; V219 rat0 [V219,T120] ( 3, 1.50) int -> rdx "ReplaceWithLclVar is creating a new local variable"
; TEMP_01 long -> [rsp+0x
C
0]
; TEMP_01 long -> [rsp+0x
B
0]
;
;
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; Lcl frame size =
184
; Lcl frame size =
200
G_M64600_IG01: ; gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG
G_M64600_IG01: ; gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG
push r15
push r15
push r14
push r14
push r13
push r13
push r12
push r12
push rdi
push rdi
push rsi
push rsi
push rbp
push rbp
push rbx
push rbx
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sub rsp,
184
sub rsp,
200
mov bword ptr [rsp+1
1
0H], r8
mov bword ptr [rsp+1
2
0H], r8
; GC ptr vars +{V02}
; GC ptr vars +{V02}
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mov qword ptr [rsp+1
1
8H], r9
mov qword ptr [rsp+1
2
8H], r9
mov rsi, rcx
mov rsi, rcx
;; bbWeight=1 PerfScore 10.50
;; bbWeight=1 PerfScore 10.50
G_M64600_IG02: ; gcVars=000000000000000008000000 {V02}, gcrefRegs=00000000 {}, byrefRegs=00000004 {rdx}, gcvars, byref
G_M64600_IG02: ; gcVars=000000000000000008000000 {V02}, gcrefRegs=00000000 {}, byrefRegs=00000004 {rdx}, gcvars, byref
; byrRegs +[rdx]
; byrRegs +[rdx]
mov rbx, bword ptr [rdx]
mov rbx, bword ptr [rdx]
; byrRegs +[rbx]
; byrRegs +[rbx]
mov ebp, dword ptr [rdx+8]
mov ebp, dword ptr [rdx+8]
;; bbWeight=1 PerfScore 4.00
;; bbWeight=1 PerfScore 4.00
G_M64600_IG03: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz
G_M64600_IG03: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz
; byrRegs -[rdx]
; byrRegs -[rdx]
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movzx rcx, byte ptr [rsp+1
1
8H]
movzx rcx, byte ptr [rsp+1
2
8H]
movzx r14, cx
movzx r14, cx
test r14d, r14d
test r14d, r14d
jne SHORT G_M64600_IG05
jne SHORT G_M64600_IG05
;; bbWeight=1 PerfScore 2.50
;; bbWeight=1 PerfScore 2.50
G_M64600_IG04: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz
G_M64600_IG04: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz
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cmp byte ptr [rsp+1
1
9H], 0
cmp byte ptr [rsp+1
2
9H], 0
jne SHORT G_M64600_IG05
jne SHORT G_M64600_IG05
mov r14d, 99
mov r14d, 99
;; bbWeight=0.25 PerfScore 0.56
;; bbWeight=0.25 PerfScore 0.56
G_M64600_IG05: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref
G_M64600_IG05: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref
cmp r14d, 84
cmp r14d, 84
ja G_M64600_IG41
ja G_M64600_IG41
;; bbWeight=1 PerfScore 1.25
;; bbWeight=1 PerfScore 1.25
G_M64600_IG06: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz
G_M64600_IG06: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz
cmp r14d, 71
cmp r14d, 71
je SHORT G_M64600_IG08
je SHORT G_M64600_IG08
cmp r14d, 84
cmp r14d, 84
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jne G_M64600_IG9
6
jne G_M64600_IG9
8
;; bbWeight=0.50 PerfScore 1.25
;; bbWeight=0.50 PerfScore 1.25
G_M64600_IG07: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref
G_M64600_IG07: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref
mov r14d, 99
mov r14d, 99
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;; bbWeight=0.50 PerfScore 0.
12
;; bbWeight=0.50 PerfScore 0.
13
G_M64600_IG08: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref
G_M64600_IG08: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref
mov r15d, 8
mov r15d, 8
mov rcx, rsi
mov rcx, rsi
test rcx, rcx
test rcx, rcx
jge G_M64600_IG42
jge G_M64600_IG42
;; bbWeight=1 PerfScore 1.75
;; bbWeight=1 PerfScore 1.75
G_M64600_IG09: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz
G_M64600_IG09: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz
mov rcx, rsi
mov rcx, rsi
neg rcx
neg rcx
test rcx, rcx
test rcx, rcx
jge G_M64600_IG42
jge G_M64600_IG42
mov rdx, 0xD1FFAB1E
mov rdx, 0xD1FFAB1E
cmp rcx, rdx
cmp rcx, rdx
sete cl
sete cl
movzx rcx, cl
movzx rcx, cl
mov r12, qword ptr [(reloc)]
mov r12, qword ptr [(reloc)]
mov rdx, gword ptr [r12]
mov rdx, gword ptr [r12]
; gcrRegs +[rdx]
; gcrRegs +[rdx]
mov rax, rdx
mov rax, rdx
; gcrRegs +[rax]
; gcrRegs +[rax]
test ecx, ecx
test ecx, ecx
jne SHORT G_M64600_IG11
jne SHORT G_M64600_IG11
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;; bbWeigh
;; bbWeigh
t=0.50 PerfScore 4.50
G_M64600_IG10: ; gcrefRegs=00000005 {rax rdx}, byrefRegs=00000008 {rbx}, byref
mov
Diff salvati
Testo originale
Apri file
; Assembly listing for method System.Buffers.Text.Utf8Formatter:TryFormat(System.TimeSpan,System.Span`1[System.Byte],byref,System.Buffers.StandardFormat):bool ; Emitting BLENDED_CODE for X64 CPU with SSE2 - Windows ; ReadyToRun compilation ; optimized code ; rsp based frame ; fully interruptible ; discarded IBC profile data due to mismatch in ILSize ; Final local variable assignments ; ;* V00 arg0 [V00 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op ; V01 arg1 [V01,T12] ( 4, 8 ) byref -> rdx ld-addr-op ; V02 arg2 [V02,T27] ( 5, 3 ) byref -> [rsp+110H] ; V03 arg3 [V03,T24] ( 4, 3.25) struct ( 8) [rsp+118H] do-not-enreg[SF] ld-addr-op ; V04 loc0 [V04,T13] ( 13, 8 ) ushort -> r14 ; V05 loc1 [V05,T16] ( 13, 7.50) int -> r15 ; V06 loc2 [V06,T29] ( 8, 4.50) int -> r13 ld-addr-op ; V07 loc3 [V07,T69] ( 5, 3 ) long -> r12 ; V08 loc4 [V08,T19] ( 11, 6.50) int -> [rsp+ACH] ; V09 loc5 [V09,T63] ( 5, 3.50) long -> [rsp+A0H] ; V10 loc6 [V10,T30] ( 4, 4.50) long -> [rsp+98H] ; V11 loc7 [V11,T38] ( 5, 4 ) long -> r12 ; V12 loc8 [V12,T31] ( 4, 4.50) long -> [rsp+90H] ; V13 loc9 [V13,T64] ( 5, 3.50) int -> [rsp+8CH] ; V14 loc10 [V14,T39] ( 5, 4 ) int -> [rsp+88H] ; V15 loc11 [V15,T62] ( 6, 3.50) int -> [rsp+84H] ; V16 loc12 [V16,T25] ( 9, 5 ) int -> r12 ; V17 loc13 [V17,T05] ( 31, 18.50) int -> [rsp+80H] ; V18 loc14 [V18,T65] ( 5, 3.50) long -> rcx ;* V19 loc15 [V19 ] ( 0, 0 ) long -> zero-ref ; V20 OutArgs [V20 ] ( 1, 1 ) lclBlk (32) [rsp+00H] "OutgoingArgSpace" ;* V21 tmp1 [V21 ] ( 0, 0 ) struct (16) zero-ref "dup spill" ;* V22 tmp2 [V22 ] ( 0, 0 ) struct (16) zero-ref "struct address for call/obj" ; V23 tmp3 [V23,T40] ( 4, 4 ) int -> rax "impSpillLclRefs" ;* V24 tmp4 [V24 ] ( 0, 0 ) struct (16) zero-ref "struct address for call/obj" ; V25 tmp5 [V25,T41] ( 4, 4 ) int -> rax "impSpillLclRefs" ;* V26 tmp6 [V26 ] ( 0, 0 ) struct (16) zero-ref "struct address for call/obj" ; V27 tmp7 [V27,T42] ( 4, 4 ) int -> rcx "impSpillLclRefs" ; V28 tmp8 [V28,T92] ( 2, 2 ) int -> r14 "impAppendStmt" ;* V29 tmp9 [V29 ] ( 0, 0 ) struct (16) zero-ref "struct address for call/obj" ;* V30 tmp10 [V30 ] ( 0, 0 ) struct (16) zero-ref "struct address for call/obj" ; V31 tmp11 [V31,T43] ( 4, 4 ) int -> rcx "impSpillLclRefs" ; V32 tmp12 [V32,T105] ( 3, 1.50) byref -> rcx ; V33 tmp13 [V33,T106] ( 3, 1.50) byref -> rcx ; V34 tmp14 [V34,T115] ( 3, 1.50) int -> rdx ;* V35 tmp15 [V35,T159] ( 0, 0 ) int -> zero-ref "impSpillLclRefs" ;* V36 tmp16 [V36 ] ( 0, 0 ) struct ( 8) zero-ref "dup spill" ;* V37 tmp17 [V37 ] ( 0, 0 ) struct (16) zero-ref "dup spill" ;* V38 tmp18 [V38 ] ( 0, 0 ) struct (16) zero-ref "dup spill" ; V39 tmp19 [V39,T68] ( 4, 3.25) ushort -> r14 "Inline stloc first use temp" ; V40 tmp20 [V40,T93] ( 2, 2 ) bool -> rcx "Inlining Arg" ; V41 tmp21 [V41,T121] ( 2, 1.50) ref -> rax class-hnd "Inlining Arg" ; V42 tmp22 [V42,T122] ( 2, 1.50) ref -> rdx class-hnd "Inlining Arg" ; V43 tmp23 [V43,T26] ( 6, 5 ) long -> r13 "Inlining Arg" ; V44 tmp24 [V44,T116] ( 3, 1.50) long -> r12 "Inline stloc first use temp" ;* V45 tmp25 [V45 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp" ;* V46 tmp26 [V46 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ; V47 tmp27 [V47,T28] ( 4, 5 ) int -> r9 "Inline stloc first use temp" ; V48 tmp28 [V48,T07] ( 5, 14 ) int -> r13 "Inlining Arg" ; V49 tmp29 [V49,T23] ( 3, 6 ) int -> rdx "Inline stloc first use temp" ; V50 tmp30 [V50,T50] ( 2, 4 ) bool -> rcx "Inlining Arg" ; V51 tmp31 [V51,T81] ( 2, 2.50) ref -> r9 class-hnd "Inlining Arg" ; V52 tmp32 [V52,T82] ( 2, 2.50) ref -> rdx class-hnd "Inlining Arg" ; V53 tmp33 [V53,T117] ( 3, 1.50) long -> r9 "Inline stloc first use temp" ;* V54 tmp34 [V54 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp" ;* V55 tmp35 [V55 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ; V56 tmp36 [V56,T51] ( 2, 4 ) bool -> rcx "Inlining Arg" ; V57 tmp37 [V57,T83] ( 2, 2.50) ref -> r11 class-hnd "Inlining Arg" ; V58 tmp38 [V58,T84] ( 2, 2.50) ref -> rdx class-hnd "Inlining Arg" ; V59 tmp39 [V59,T118] ( 3, 1.50) long -> r12 "Inline stloc first use temp" ;* V60 tmp40 [V60 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp" ;* V61 tmp41 [V61 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ; V62 tmp42 [V62,T52] ( 2, 4 ) bool -> rcx "Inlining Arg" ; V63 tmp43 [V63,T85] ( 2, 2.50) ref -> r9 class-hnd "Inlining Arg" ; V64 tmp44 [V64,T86] ( 2, 2.50) ref -> rdx class-hnd "Inlining Arg" ; V65 tmp45 [V65,T53] ( 2, 4 ) bool -> rcx "Inlining Arg" ; V66 tmp46 [V66,T87] ( 2, 2.50) ref -> r9 class-hnd "Inlining Arg" ; V67 tmp47 [V67,T88] ( 2, 2.50) ref -> rdx class-hnd "Inlining Arg" ; V68 tmp48 [V68,T78] ( 3, 3 ) int -> r12 "Inlining Arg" ; V69 tmp49 [V69,T119] ( 3, 1.50) int -> r9 "Inline stloc first use temp" ;* V70 tmp50 [V70 ] ( 0, 0 ) struct ( 8) zero-ref "NewObj constructor temp" ;* V71 tmp51 [V71 ] ( 0, 0 ) int -> zero-ref "Inlining Arg" ; V72 tmp52 [V72,T54] ( 2, 4 ) bool -> rdx "Inlining Arg" ; V73 tmp53 [V73,T89] ( 2, 2.50) ref -> rdi class-hnd "Inlining Arg" ; V74 tmp54 [V74,T90] ( 2, 2.50) ref -> r12 class-hnd "Inlining Arg" ; V75 tmp55 [V75,T67] ( 11, 3.25) int -> [rsp+7CH] "Inline stloc first use temp" ; V76 tmp56 [V76,T20] ( 10, 6 ) int -> r12 "Inlining Arg" ; V77 tmp57 [V77,T146] ( 2, 1 ) bool -> [rsp+78H] "Inlining Arg" ; V78 tmp58 [V78,T161] ( 2, 0.75) ref -> [rsp+50H] class-hnd "Inlining Arg" ; V79 tmp59 [V79,T162] ( 2, 0.75) ref -> r12 class-hnd "Inlining Arg" ;* V80 tmp60 [V80 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp" ;* V81 tmp61 [V81,T157] ( 0, 0 ) byref -> zero-ref "Inlining Arg" ;* V82 tmp62 [V82 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg" ;* V83 tmp63 [V83 ] ( 0, 0 ) struct ( 8) zero-ref "NewObj constructor temp" ; V84 tmp64 [V84,T94] ( 2, 2 ) bool -> [rsp+74H] "Inlining Arg" ; V85 tmp65 [V85,T123] ( 2, 1.50) ref -> [rsp+48H] class-hnd "Inlining Arg" ; V86 tmp66 [V86,T124] ( 2, 1.50) ref -> rsi class-hnd "Inlining Arg" ;* V87 tmp67 [V87 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg" ; V88 tmp68 [V88,T08] ( 7, 11 ) int -> rsi "Inline stloc first use temp" ; V89 tmp69 [V89,T02] ( 7, 19 ) int -> [rsp+70H] "Inlining Arg" ; V90 tmp70 [V90,T55] ( 2, 4 ) int -> rcx "Inline stloc first use temp" ; V91 tmp71 [V91,T95] ( 2, 2 ) bool -> rcx "Inlining Arg" ; V92 tmp72 [V92,T125] ( 2, 1.50) ref -> rax class-hnd "Inlining Arg" ; V93 tmp73 [V93,T126] ( 2, 1.50) ref -> rdx class-hnd "Inlining Arg" ;* V94 tmp74 [V94 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp" ;* V95 tmp75 [V95,T158] ( 0, 0 ) byref -> zero-ref "Inlining Arg" ;* V96 tmp76 [V96 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg" ;* V97 tmp77 [V97 ] ( 0, 0 ) struct ( 8) zero-ref "NewObj constructor temp" ; V98 tmp78 [V98,T96] ( 2, 2 ) bool -> r9 "Inlining Arg" ; V99 tmp79 [V99,T127] ( 2, 1.50) ref -> r14 class-hnd "Inlining Arg" ; V100 tmp80 [V100,T128] ( 2, 1.50) ref -> rsi class-hnd "Inlining Arg" ;* V101 tmp81 [V101 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg" ; V102 tmp82 [V102,T09] ( 7, 11 ) int -> rcx "Inline stloc first use temp" ; V103 tmp83 [V103,T03] ( 7, 19 ) int -> r12 "Inlining Arg" ; V104 tmp84 [V104,T56] ( 2, 4 ) int -> r9 "Inline stloc first use temp" ; V105 tmp85 [V105,T97] ( 2, 2 ) bool -> rcx "Inlining Arg" ; V106 tmp86 [V106,T129] ( 2, 1.50) ref -> rax class-hnd "Inlining Arg" ; V107 tmp87 [V107,T130] ( 2, 1.50) ref -> rdx class-hnd "Inlining Arg" ;* V108 tmp88 [V108 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp" ;* V109 tmp89 [V109 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg" ;* V110 tmp90 [V110 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg" ;* V111 tmp91 [V111 ] ( 0, 0 ) struct ( 8) zero-ref "NewObj constructor temp" ;* V112 tmp92 [V112 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg" ;* V113 tmp93 [V113 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp" ; V114 tmp94 [V114,T00] ( 7, 25 ) int -> r14 "Inlining Arg" ; V115 tmp95 [V115,T57] ( 2, 4 ) int -> rcx "Inline stloc first use temp" ; V116 tmp96 [V116,T14] ( 2, 8 ) bool -> rcx "Inlining Arg" ; V117 tmp97 [V117,T34] ( 2, 4.50) ref -> rax class-hnd "Inlining Arg" ; V118 tmp98 [V118,T35] ( 2, 4.50) ref -> rdx class-hnd "Inlining Arg" ;* V119 tmp99 [V119 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp" ;* V120 tmp100 [V120 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg" ;* V121 tmp101 [V121 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg" ;* V122 tmp102 [V122 ] ( 0, 0 ) struct ( 8) zero-ref "NewObj constructor temp" ;* V123 tmp103 [V123 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg" ;* V124 tmp104 [V124 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp" ; V125 tmp105 [V125,T01] ( 7, 25 ) int -> r14 "Inlining Arg" ; V126 tmp106 [V126,T58] ( 2, 4 ) int -> rcx "Inline stloc first use temp" ; V127 tmp107 [V127,T15] ( 2, 8 ) bool -> rcx "Inlining Arg" ; V128 tmp108 [V128,T36] ( 2, 4.50) ref -> rax class-hnd "Inlining Arg" ; V129 tmp109 [V129,T37] ( 2, 4.50) ref -> rdx class-hnd "Inlining Arg" ;* V130 tmp110 [V130 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp" ; V131 tmp111 [V131,T91] ( 2, 2 ) byref -> rbx "Inlining Arg" ;* V132 tmp112 [V132 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg" ;* V133 tmp113 [V133 ] ( 0, 0 ) struct ( 8) zero-ref "NewObj constructor temp" ; V134 tmp114 [V134,T98] ( 2, 2 ) bool -> rcx "Inlining Arg" ; V135 tmp115 [V135,T131] ( 2, 1.50) ref -> rax class-hnd "Inlining Arg" ; V136 tmp116 [V136,T132] ( 2, 1.50) ref -> rdx class-hnd "Inlining Arg" ;* V137 tmp117 [V137 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg" ; V138 tmp118 [V138,T10] ( 7, 11 ) int -> r9 "Inline stloc first use temp" ; V139 tmp119 [V139,T04] ( 7, 19 ) int -> r14 "Inlining Arg" ; V140 tmp120 [V140,T59] ( 2, 4 ) int -> r10 "Inline stloc first use temp" ; V141 tmp121 [V141,T99] ( 2, 2 ) bool -> rcx "Inlining Arg" ; V142 tmp122 [V142,T133] ( 2, 1.50) ref -> rax class-hnd "Inlining Arg" ; V143 tmp123 [V143,T134] ( 2, 1.50) ref -> rdx class-hnd "Inlining Arg" ; V144 tmp124 [V144,T100] ( 2, 2 ) bool -> rcx "Inlining Arg" ; V145 tmp125 [V145,T135] ( 2, 1.50) ref -> rax class-hnd "Inlining Arg" ; V146 tmp126 [V146,T136] ( 2, 1.50) ref -> rdx class-hnd "Inlining Arg" ; V147 tmp127 [V147,T18] ( 7, 4.75) long -> rsi V00._ticks(offs=0x00) P-INDEP "field V00._ticks (fldOffset=0x0)" ; V148 tmp128 [V148,T11] ( 11, 9 ) byref -> rbx V201._pointer(offs=0x00) P-INDEP "field V01._pointer (fldOffset=0x0)" ; V149 tmp129 [V149,T17] ( 12, 7 ) int -> rbp V201._length(offs=0x08) P-INDEP "field V01._length (fldOffset=0x8)" ;* V150 tmp130 [V150 ] ( 0, 0 ) long -> zero-ref V21.Item1(offs=0x00) P-INDEP "field V21.Item1 (fldOffset=0x0)" ;* V151 tmp131 [V151 ] ( 0, 0 ) long -> zero-ref V21.Item2(offs=0x08) P-INDEP "field V21.Item2 (fldOffset=0x8)" ; V152 tmp132 [V152,T137] ( 2, 1 ) byref -> rsi V22._pointer(offs=0x00) P-INDEP "field V22._pointer (fldOffset=0x0)" ; V153 tmp133 [V153,T147] ( 2, 1 ) int -> r14 V22._length(offs=0x08) P-INDEP "field V22._length (fldOffset=0x8)" ; V154 tmp134 [V154,T44] ( 2, 4 ) byref -> rdi V24._pointer(offs=0x00) P-INDEP "field V24._pointer (fldOffset=0x0)" ;* V155 tmp135 [V155,T60] ( 0, 0 ) int -> zero-ref V24._length(offs=0x08) P-INDEP "field V24._length (fldOffset=0x8)" ; V156 tmp136 [V156,T45] ( 2, 4 ) byref -> rdi V26._pointer(offs=0x00) P-INDEP "field V26._pointer (fldOffset=0x0)" ;* V157 tmp137 [V157,T61] ( 0, 0 ) int -> zero-ref V26._length(offs=0x08) P-INDEP "field V26._length (fldOffset=0x8)" ; V158 tmp138 [V158,T138] ( 2, 1 ) byref -> rbx V29._pointer(offs=0x00) P-INDEP "field V29._pointer (fldOffset=0x0)" ; V159 tmp139 [V159,T148] ( 2, 1 ) int -> rcx V29._length(offs=0x08) P-INDEP "field V29._length (fldOffset=0x8)" ; V160 tmp140 [V160,T139] ( 2, 1 ) byref -> [rsp+40H] V30._pointer(offs=0x00) P-INDEP "field V30._pointer (fldOffset=0x0)" ; V161 tmp141 [V161,T149] ( 2, 1 ) int -> [rsp+6CH] V30._length(offs=0x08) P-INDEP "field V30._length (fldOffset=0x8)" ;* V162 tmp142 [V162 ] ( 0, 0 ) int -> zero-ref V36.Item1(offs=0x00) P-INDEP "field V36.Item1 (fldOffset=0x0)" ;* V163 tmp143 [V163 ] ( 0, 0 ) int -> zero-ref V36.Item2(offs=0x04) P-INDEP "field V36.Item2 (fldOffset=0x4)" ;* V164 tmp144 [V164 ] ( 0, 0 ) long -> zero-ref V37.Item1(offs=0x00) P-INDEP "field V37.Item1 (fldOffset=0x0)" ;* V165 tmp145 [V165 ] ( 0, 0 ) long -> zero-ref V37.Item2(offs=0x08) P-INDEP "field V37.Item2 (fldOffset=0x8)" ;* V166 tmp146 [V166 ] ( 0, 0 ) long -> zero-ref V38.Item1(offs=0x00) P-INDEP "field V38.Item1 (fldOffset=0x0)" ;* V167 tmp147 [V167 ] ( 0, 0 ) long -> zero-ref V38.Item2(offs=0x08) P-INDEP "field V38.Item2 (fldOffset=0x8)" ;* V168 tmp148 [V168 ] ( 0, 0 ) long -> zero-ref V45.Item1(offs=0x00) P-INDEP "field V45.Item1 (fldOffset=0x0)" ; V169 tmp149 [V169,T150] ( 2, 1 ) long -> r13 V45.Item2(offs=0x08) P-INDEP "field V45.Item2 (fldOffset=0x8)" ;* V170 tmp150 [V170 ] ( 0, 0 ) long -> zero-ref V54.Item1(offs=0x00) P-INDEP "field V54.Item1 (fldOffset=0x0)" ; V171 tmp151 [V171,T151] ( 2, 1 ) long -> r10 V54.Item2(offs=0x08) P-INDEP "field V54.Item2 (fldOffset=0x8)" ;* V172 tmp152 [V172 ] ( 0, 0 ) long -> zero-ref V60.Item1(offs=0x00) P-INDEP "field V60.Item1 (fldOffset=0x0)" ; V173 tmp153 [V173,T152] ( 2, 1 ) long -> r11 V60.Item2(offs=0x08) P-INDEP "field V60.Item2 (fldOffset=0x8)" ;* V174 tmp154 [V174 ] ( 0, 0 ) int -> zero-ref V70.Item1(offs=0x00) P-INDEP "field V70.Item1 (fldOffset=0x0)" ; V175 tmp155 [V175,T153] ( 2, 1 ) int -> rcx V70.Item2(offs=0x04) P-INDEP "field V70.Item2 (fldOffset=0x4)" ; V176 tmp156 [V176,T140] ( 2, 1 ) byref -> [rsp+38H] V80._pointer(offs=0x00) P-INDEP "field V80._pointer (fldOffset=0x0)" ; V177 tmp157 [V177,T154] ( 2, 1 ) int -> [rsp+68H] V80._length(offs=0x08) P-INDEP "field V80._length (fldOffset=0x8)" ; V178 tmp158 [V178,T141] ( 2, 1 ) byref -> rsi V83._value(offs=0x00) P-INDEP "field V83._value (fldOffset=0x0)" ; V179 tmp159 [V179,T70] ( 3, 3 ) byref -> [rsp+30H] V87._pointer(offs=0x00) P-INDEP "field V87._pointer (fldOffset=0x0)" ; V180 tmp160 [V180,T79] ( 3, 3 ) int -> [rsp+64H] V87._length(offs=0x08) P-INDEP "field V87._length (fldOffset=0x8)" ; V181 tmp161 [V181,T142] ( 2, 1 ) byref -> rsi V94._pointer(offs=0x00) P-INDEP "field V94._pointer (fldOffset=0x0)" ; V182 tmp162 [V182,T155] ( 2, 1 ) int -> r14 V94._length(offs=0x08) P-INDEP "field V94._length (fldOffset=0x8)" ; V183 tmp163 [V183,T143] ( 2, 1 ) byref -> rsi V97._value(offs=0x00) P-INDEP "field V97._value (fldOffset=0x0)" ; V184 tmp164 [V184,T71] ( 3, 3 ) byref -> rsi V101._pointer(offs=0x00) P-INDEP "field V101._pointer (fldOffset=0x0)" ; V185 tmp165 [V185,T66] ( 4, 3.50) int -> r14 V101._length(offs=0x08) P-INDEP "field V101._length (fldOffset=0x8)" ; V186 tmp166 [V186,T46] ( 2, 4 ) byref -> rdi V108._pointer(offs=0x00) P-INDEP "field V108._pointer (fldOffset=0x0)" ;* V187 tmp167 [V187,T101] ( 0, 0 ) int -> zero-ref V108._length(offs=0x08) P-INDEP "field V108._length (fldOffset=0x8)" ; V188 tmp168 [V188,T47] ( 2, 4 ) byref -> rdi V111._value(offs=0x00) P-INDEP "field V111._value (fldOffset=0x0)" ; V189 tmp169 [V189,T32] ( 3, 4.50) byref -> rdi V112._pointer(offs=0x00) P-INDEP "field V112._pointer (fldOffset=0x0)" ;* V190 tmp170 [V190,T102] ( 0, 0 ) int -> zero-ref V112._length(offs=0x08) P-INDEP "field V112._length (fldOffset=0x8)" ; V191 tmp171 [V191,T48] ( 2, 4 ) byref -> rdi V119._pointer(offs=0x00) P-INDEP "field V119._pointer (fldOffset=0x0)" ;* V192 tmp172 [V192,T103] ( 0, 0 ) int -> zero-ref V119._length(offs=0x08) P-INDEP "field V119._length (fldOffset=0x8)" ; V193 tmp173 [V193,T49] ( 2, 4 ) byref -> rdi V122._value(offs=0x00) P-INDEP "field V122._value (fldOffset=0x0)" ; V194 tmp174 [V194,T33] ( 3, 4.50) byref -> rdi V123._pointer(offs=0x00) P-INDEP "field V123._pointer (fldOffset=0x0)" ;* V195 tmp175 [V195,T104] ( 0, 0 ) int -> zero-ref V123._length(offs=0x08) P-INDEP "field V123._length (fldOffset=0x8)" ; V196 tmp176 [V196,T144] ( 2, 1 ) byref -> rbx V130._pointer(offs=0x00) P-INDEP "field V130._pointer (fldOffset=0x0)" ; V197 tmp177 [V197,T156] ( 2, 1 ) int -> rcx V130._length(offs=0x08) P-INDEP "field V130._length (fldOffset=0x8)" ; V198 tmp178 [V198,T145] ( 2, 1 ) byref -> rbx V133._value(offs=0x00) P-INDEP "field V133._value (fldOffset=0x0)" ; V199 tmp179 [V199,T72] ( 3, 3 ) byref -> rbx V137._pointer(offs=0x00) P-INDEP "field V137._pointer (fldOffset=0x0)" ; V200 tmp180 [V200,T80] ( 3, 3 ) int -> rcx V137._length(offs=0x08) P-INDEP "field V137._length (fldOffset=0x8)" ;* V201 tmp181 [V201 ] ( 0, 0 ) struct (16) zero-ref "Promoted implicit byref" ; V202 cse0 [V202,T73] ( 3, 3 ) ref -> rdx "CSE - conservative" ; V203 cse1 [V203,T74] ( 3, 3 ) ref -> rdx "CSE - conservative" ; V204 cse2 [V204,T75] ( 3, 3 ) ref -> rdx "CSE - conservative" ; V205 cse3 [V205,T76] ( 3, 3 ) ref -> rdx "CSE - conservative" ; V206 cse4 [V206,T77] ( 3, 3 ) ref -> r12 "CSE - conservative" ; V207 cse5 [V207,T107] ( 3, 1.50) ref -> rdx "CSE - conservative" ; V208 cse6 [V208,T108] ( 3, 1.50) ref -> [rsp+28H] "CSE - conservative" ; V209 cse7 [V209,T109] ( 3, 1.50) ref -> rdx "CSE - conservative" ; V210 cse8 [V210,T110] ( 3, 1.50) ref -> rsi "CSE - conservative" ; V211 cse9 [V211,T111] ( 3, 1.50) ref -> rdx "CSE - conservative" ; V212 cse10 [V212,T21] ( 3, 6 ) ref -> rdx "CSE - conservative" ; V213 cse11 [V213,T22] ( 3, 6 ) ref -> rdx "CSE - conservative" ; V214 cse12 [V214,T112] ( 3, 1.50) ref -> rdx "CSE - conservative" ; V215 cse13 [V215,T113] ( 3, 1.50) ref -> rdx "CSE - conservative" ; V216 cse14 [V216,T114] ( 3, 1.50) ref -> rdx "CSE - conservative" ; V217 cse15 [V217,T160] ( 3, 0.75) ref -> [rsp+20H] "CSE - conservative" ; V218 cse16 [V218,T06] ( 18, 14.75) long -> [rsp+58H] "CSE - aggressive" ; V219 rat0 [V219,T120] ( 3, 1.50) int -> rdx "ReplaceWithLclVar is creating a new local variable" ; TEMP_01 long -> [rsp+0xB0] ; ; Lcl frame size = 184 G_M64600_IG01: ; gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG push r15 push r14 push r13 push r12 push rdi push rsi push rbp push rbx sub rsp, 184 mov bword ptr [rsp+110H], r8 ; GC ptr vars +{V02} mov qword ptr [rsp+118H], r9 mov rsi, rcx ;; bbWeight=1 PerfScore 10.50 G_M64600_IG02: ; gcVars=000000000000000008000000 {V02}, gcrefRegs=00000000 {}, byrefRegs=00000004 {rdx}, gcvars, byref ; byrRegs +[rdx] mov rbx, bword ptr [rdx] ; byrRegs +[rbx] mov ebp, dword ptr [rdx+8] ;; bbWeight=1 PerfScore 4.00 G_M64600_IG03: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz ; byrRegs -[rdx] movzx rcx, byte ptr [rsp+118H] movzx r14, cx test r14d, r14d jne SHORT G_M64600_IG05 ;; bbWeight=1 PerfScore 2.50 G_M64600_IG04: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz cmp byte ptr [rsp+119H], 0 jne SHORT G_M64600_IG05 mov r14d, 99 ;; bbWeight=0.25 PerfScore 0.56 G_M64600_IG05: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref cmp r14d, 84 ja G_M64600_IG41 ;; bbWeight=1 PerfScore 1.25 G_M64600_IG06: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz cmp r14d, 71 je SHORT G_M64600_IG08 cmp r14d, 84 jne G_M64600_IG96 ;; bbWeight=0.50 PerfScore 1.25 G_M64600_IG07: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref mov r14d, 99 ;; bbWeight=0.50 PerfScore 0.12 G_M64600_IG08: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref mov r15d, 8 mov rcx, rsi test rcx, rcx jge G_M64600_IG42 ;; bbWeight=1 PerfScore 1.75 G_M64600_IG09: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz mov rcx, rsi neg rcx test rcx, rcx jge G_M64600_IG42 mov rdx, 0xD1FFAB1E cmp rcx, rdx sete cl movzx rcx, cl mov r12, qword ptr [(reloc)] mov rdx, gword ptr [r12] ; gcrRegs +[rdx] mov rax, rdx ; gcrRegs +[rax] test ecx, ecx jne SHORT G_M64600_IG11 ;; bbWeight=0.50 PerfScore 4.50 G_M64600_IG10: ; gcrefRegs=00000005 {rax rdx}, byrefRegs=00000008 {rbx}, byref mov rcx, rax ; gcrRegs +[rcx] call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rax rcx rdx] ; gcr arg pop 0 ;; bbWeight=0.25 PerfScore 0.81 G_M64600_IG11: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref mov r13d, 0xD1FFAB1E mov r12, 0xD1FFAB1E ;; bbWeight=0.50 PerfScore 0.25 G_M64600_IG12: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref xor eax, eax cmp r14d, 99 jne G_M64600_IG45 ;; bbWeight=1 PerfScore 1.50 G_M64600_IG13: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz test r13d, r13d je SHORT G_M64600_IG14 mov dword ptr [rsp+ACH], 7 mov eax, dword ptr [rsp+ACH] ;; bbWeight=0.50 PerfScore 1.62 G_M64600_IG14: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz cmp r13d, 0xD1FFAB1E setb cl movzx rcx, cl mov rdx, qword ptr [(reloc)] mov r8, rdx mov qword ptr [rsp+58H], r8 mov rdx, gword ptr [r8] ; gcrRegs +[rdx] mov r9, rdx ; gcrRegs +[r9] test ecx, ecx jne SHORT G_M64600_IG16 ;; bbWeight=1 PerfScore 8.25 G_M64600_IG15: ; gcrefRegs=00000204 {rdx r9}, byrefRegs=00000008 {rbx}, byref mov dword ptr [rsp+ACH], eax mov rcx, r9 ; gcrRegs +[rcx] call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rcx rdx r9] ; gcr arg pop 0 mov eax, dword ptr [rsp+ACH] ;; bbWeight=0.25 PerfScore 1.31 G_M64600_IG16: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz test eax, eax je SHORT G_M64600_IG18 ;; bbWeight=1 PerfScore 1.25 G_M64600_IG17: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref mov dword ptr [rsp+ACH], eax lea r15d, [rax+9] mov eax, dword ptr [rsp+ACH] ;; bbWeight=0.50 PerfScore 1.25 G_M64600_IG18: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz xor r9d, r9d xor r10d, r10d test r12, r12 je SHORT G_M64600_IG20 ;; bbWeight=1 PerfScore 1.75 G_M64600_IG19: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref mov dword ptr [rsp+ACH], eax mov rdx, 0xD1FFAB1E mov rax, r12 mul rdx:rax, rdx shr rdx, 5 mov r9, rdx imul r10, r9, 60 sub r12, r10 mov r10, r12 mov qword ptr [rsp+A0H], r9 mov r12, r10 mov r10, r12 mov eax, dword ptr [rsp+ACH] mov r9, qword ptr [rsp+A0H] ;; bbWeight=0.50 PerfScore 5.88 G_M64600_IG20: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz mov qword ptr [rsp+98H], r10 cmp r10, 60 setb cl movzx rcx, cl mov r8, qword ptr [rsp+58H] mov rdx, gword ptr [r8] ; gcrRegs +[rdx] mov r11, rdx ; gcrRegs +[r11] test ecx, ecx jne SHORT G_M64600_IG22 ;; bbWeight=1 PerfScore 7.00 G_M64600_IG21: ; gcrefRegs=00000804 {rdx r11}, byrefRegs=00000008 {rbx}, byref mov dword ptr [rsp+ACH], eax mov qword ptr [rsp+A0H], r9 mov rcx, r11 ; gcrRegs +[rcx] call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rcx rdx r11] ; gcr arg pop 0 mov eax, dword ptr [rsp+ACH] mov r9, qword ptr [rsp+A0H] ;; bbWeight=0.25 PerfScore 1.81 G_M64600_IG22: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz xor r12d, r12d xor r11d, r11d test r9, r9 je SHORT G_M64600_IG24 ;; bbWeight=1 PerfScore 1.75 G_M64600_IG23: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref mov dword ptr [rsp+ACH], eax mov rdx, 0xD1FFAB1E mov rax, r9 mul rdx:rax, rdx shr rdx, 5 mov r12, rdx imul r11, r12, 60 sub r9, r11 mov r11, r9 mov rax, r11 mov r11, rax mov eax, dword ptr [rsp+ACH] ;; bbWeight=0.50 PerfScore 4.88 G_M64600_IG24: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz mov qword ptr [rsp+90H], r11 cmp r11, 60 setb cl movzx rcx, cl mov r8, qword ptr [rsp+58H] mov rdx, gword ptr [r8] ; gcrRegs +[rdx] mov r9, rdx ; gcrRegs +[r9] test ecx, ecx jne SHORT G_M64600_IG26 ;; bbWeight=1 PerfScore 7.00 G_M64600_IG25: ; gcrefRegs=00000204 {rdx r9}, byrefRegs=00000008 {rbx}, byref mov dword ptr [rsp+ACH], eax mov rcx, r9 ; gcrRegs +[rcx] call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rcx rdx r9] ; gcr arg pop 0 mov eax, dword ptr [rsp+ACH] ;; bbWeight=0.25 PerfScore 1.31 G_M64600_IG26: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz mov ecx, 0xD1FFAB1E cmp r12, rcx setbe cl movzx rcx, cl mov r8, qword ptr [rsp+58H] mov rdx, gword ptr [r8] ; gcrRegs +[rdx] mov r9, rdx ; gcrRegs +[r9] test ecx, ecx jne SHORT G_M64600_IG28 ;; bbWeight=1 PerfScore 6.25 G_M64600_IG27: ; gcrefRegs=00000204 {rdx r9}, byrefRegs=00000008 {rbx}, byref mov dword ptr [rsp+ACH], eax mov rcx, r9 ; gcrRegs +[rcx] call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rcx rdx r9] ; gcr arg pop 0 mov eax, dword ptr [rsp+ACH] ;; bbWeight=0.25 PerfScore 1.31 G_M64600_IG28: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz xor r9d, r9d xor ecx, ecx test r12, r12 je SHORT G_M64600_IG30 ;; bbWeight=1 PerfScore 1.75 G_M64600_IG29: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref mov dword ptr [rsp+ACH], eax mov edx, 0xD1FFAB1E mov eax, r12d mul edx:eax, edx shr edx, 4 mov r9d, edx lea ecx, [r9+2*r9] shl ecx, 3 sub r12d, ecx mov ecx, r12d mov dword ptr [rsp+8CH], r9d mov r12d, ecx mov ecx, r12d mov eax, dword ptr [rsp+ACH] mov r9d, dword ptr [rsp+8CH] ;; bbWeight=0.50 PerfScore 6.12 G_M64600_IG30: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz mov dword ptr [rsp+88H], ecx cmp ecx, 24 setb dl movzx rdx, dl mov r8, qword ptr [rsp+58H] mov r12, gword ptr [r8] ; gcrRegs +[r12] mov rdi, r12 ; gcrRegs +[rdi] test edx, edx jne SHORT G_M64600_IG32 ;; bbWeight=1 PerfScore 7.00 G_M64600_IG31: ; gcrefRegs=00001080 {rdi r12}, byrefRegs=00000008 {rbx}, byref mov dword ptr [rsp+ACH], eax mov dword ptr [rsp+8CH], r9d mov rcx, rdi ; gcrRegs +[rcx] mov rdx, r12 ; gcrRegs +[rdx] call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rcx rdx rdi r12] ; gcr arg pop 0 mov eax, dword ptr [rsp+ACH] mov r9d, dword ptr [rsp+8CH] ;; bbWeight=0.25 PerfScore 1.88 G_M64600_IG32: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz mov edi, 2 cmp dword ptr [rsp+88H], 10 jae SHORT G_M64600_IG34 ;; bbWeight=1 PerfScore 2.25 G_M64600_IG33: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz cmp r14d, 103 jne SHORT G_M64600_IG34 mov dword ptr [rsp+84H], 1 dec r15d mov edi, dword ptr [rsp+84H] ;; bbWeight=0.50 PerfScore 1.75 G_M64600_IG34: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref xor r12d, r12d test r9d, r9d jne G_M64600_IG49 ;; bbWeight=1 PerfScore 1.50 G_M64600_IG35: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz cmp r14d, 71 jne SHORT G_M64600_IG36 add r15d, 2 mov r12d, 1 ;; bbWeight=0.50 PerfScore 0.88 G_M64600_IG36: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz test rsi, rsi jge SHORT G_M64600_IG38 ;; bbWeight=1 PerfScore 1.25 G_M64600_IG37: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref inc r15d ;; bbWeight=0.50 PerfScore 0.12 G_M64600_IG38: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref cmp ebp, r15d jge G_M64600_IG58 ;; bbWeight=1 PerfScore 1.25 G_M64600_IG39: ; gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref ; byrRegs -[rbx] xor eax, eax mov rdi, bword ptr [rsp+110H] ; byrRegs +[rdi] mov dword ptr [rdi], eax ;; bbWeight=0.50 PerfScore 1.12 G_M64600_IG40: ; , epilog, nogc, extend add rsp, 184 pop rbx pop rbp pop rsi pop rdi pop r12 pop r13 pop r14 pop r15 ret ;; bbWeight=0.50 PerfScore 2.62 G_M64600_IG41: ; gcVars=000000000000000008000000 {V02}, gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, gcvars, byref ; byrRegs -[rdi] +[rbx] cmp r14d, 99 je G_M64600_IG08 cmp r14d, 103 je G_M64600_IG08 cmp r14d, 116 jne G_M64600_IG96 jmp G_M64600_IG07 ;; bbWeight=0.50 PerfScore 2.88 G_M64600_IG42: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz mov r13, rsi test r13, r13 jge SHORT G_M64600_IG44 ;; bbWeight=0.50 PerfScore 0.75 G_M64600_IG43: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref mov r13, rsi neg r13 test r13, r13 jl G_M64600_IG97 ;; bbWeight=0.25 PerfScore 0.44 G_M64600_IG44: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref mov rdx, 0xD1FFAB1E mov rax, r13 mul rdx:rax, rdx shr rdx, 23 mov r12, rdx imul rax, r12, 0xD1FFAB1E sub r13, rax jmp G_M64600_IG12 ;; bbWeight=0.50 PerfScore 4.50 G_M64600_IG45: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz cmp r14d, 71 jne SHORT G_M64600_IG46 mov eax, 7 jmp G_M64600_IG14 ;; bbWeight=0.50 PerfScore 1.75 G_M64600_IG46: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref test r13d, r13d je G_M64600_IG14 xor r9d, r9d ;; bbWeight=0.50 PerfScore 0.75 G_M64600_IG47: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz mov edx, 0xD1FFAB1E mov eax, r13d mul edx:eax, edx shr edx, 3 lea eax, [rdx+4*rdx] add eax, eax cmp r13d, eax jne SHORT G_M64600_IG48 mov r13d, edx inc r9d jmp SHORT G_M64600_IG47 ;; bbWeight=2 PerfScore 18.00 G_M64600_IG48: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref mov eax, r9d neg eax add eax, 7 mov dword ptr [rsp+ACH], eax mov eax, dword ptr [rsp+ACH] jmp G_M64600_IG14 ;; bbWeight=0.50 PerfScore 2.38 G_M64600_IG49: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz mov dword ptr [rsp+8CH], r9d mov r12d, r9d mov edx, 1 cmp r12d, 0x186A0 jb SHORT G_M64600_IG51 ;; bbWeight=0.50 PerfScore 1.38 G_M64600_IG50: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref mov dword ptr [rsp+ACH], eax mov edx, 0xD1FFAB1E mov eax, r12d mul edx:eax, edx sub r12d, edx shr r12d, 1 add r12d, edx shr r12d, 16 mov edx, 6 mov eax, dword ptr [rsp+ACH] ;; bbWeight=0.25 PerfScore 1.94 G_M64600_IG51: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz cmp r12d, 10 jb G_M64600_IG57 cmp r12d, 100 jae SHORT G_M64600_IG52 inc edx jmp G_M64600_IG57 ;; bbWeight=0.25 PerfScore 1.19 G_M64600_IG52: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz cmp r12d, 0x3E8 jae SHORT G_M64600_IG53 add edx, 2 jmp SHORT G_M64600_IG57 ;; bbWeight=0.25 PerfScore 0.88 G_M64600_IG53: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz cmp r12d, 0x2710 jae SHORT G_M64600_IG54 add edx, 3 mov dword ptr [rsp+7CH], edx mov edx, dword ptr [rsp+7CH] jmp SHORT G_M64600_IG57 ;; bbWeight=0.25 PerfScore 1.38 G_M64600_IG54: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz cmp r12d, 0x186A0 setb r12b movzx r12, r12b mov dword ptr [rsp+78H], r12d mov r8, qword ptr [rsp+58H] mov r12, gword ptr [r8] ; gcrRegs +[r12] mov gword ptr [rsp+20H], r12 ; GC ptr vars +{V217} mov gword ptr [rsp+50H], r12 ; GC ptr vars +{V78} mov r12, gword ptr [rsp+20H] cmp dword ptr [rsp+78H], 0 jne SHORT G_M64600_IG56 ;; bbWeight=0.25 PerfScore 2.62 G_M64600_IG55: ; gcVars=000000000000000008000000 {V02 V78}, gcrefRegs=00001000 {r12}, byrefRegs=00000008 {rbx}, gcvars, byref ; GC ptr vars -{V217} mov dword ptr [rsp+ACH], eax mov dword ptr [rsp+7CH], edx mov rcx, gword ptr [rsp+50H] ; gcrRegs +[rcx] mov rdx, r12 ; gcrRegs +[rdx] ; GC ptr vars -{V78} call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rcx rdx r12] ; gcr arg pop 0 mov eax, dword ptr [rsp+ACH] mov edx, dword ptr [rsp+7CH] ;; bbWeight=0.12 PerfScore 1.03 G_M64600_IG56: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref add edx, 4 ;; bbWeight=0.25 PerfScore 0.06 G_M64600_IG57: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref mov r12d, edx lea r15d, [r15+r12+1] mov r9d, dword ptr [rsp+8CH] jmp G_M64600_IG36 ;; bbWeight=0.50 PerfScore 2.12 G_M64600_IG58: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz mov rdx, bword ptr [rsp+110H] ; byrRegs +[rdx] mov dword ptr [rdx], r15d xor edx, edx ; byrRegs -[rdx] test rsi, rsi jge SHORT G_M64600_IG59 mov edx, 1 test ebp, ebp je G_M64600_IG99 mov byte ptr [rbx], 45 ;; bbWeight=0.50 PerfScore 3.00 G_M64600_IG59: ; gcVars=000000000000000000000000 {}, gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, gcvars, byref ; GC ptr vars -{V02} test r12d, r12d jle G_M64600_IG71 mov dword ptr [rsp+80H], edx mov esi, edx mov qword ptr [rsp+B0H], rsi mov esi, r12d add rsi, qword ptr [rsp+B0H] mov qword ptr [rsp+B0H], rsi mov esi, ebp cmp qword ptr [rsp+B0H], rsi ja G_M64600_IG98 ;; bbWeight=0.50 PerfScore 4.00 G_M64600_IG60: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz mov esi, r12d not esi shr esi, 31 mov dword ptr [rsp+74H], esi mov r8, qword ptr [rsp+58H] mov rsi, gword ptr [r8] ; gcrRegs +[rsi] mov gword ptr [rsp+28H], rsi ; GC ptr vars +{V208} mov gword ptr [rsp+48H], rsi ; GC ptr vars +{V85} mov rsi, gword ptr [rsp+28H] cmp dword ptr [rsp+74H], 0 jne SHORT G_M64600_IG62 ;; bbWeight=0.50 PerfScore 5.75 G_M64600_IG61: ; gcVars=000000000000000000000000 {V85}, gcrefRegs=00000040 {rsi}, byrefRegs=00000008 {rbx}, gcvars, byref ; GC ptr vars -{V208} mov dword ptr [rsp+ACH], eax mov dword ptr [rsp+8CH], r9d mov rcx, gword ptr [rsp+48H] ; gcrRegs +[rcx] mov rdx, rsi ; gcrRegs +[rdx] ; GC ptr vars -{V85} call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rcx rdx rsi] ; gcr arg pop 0 mov eax, dword ptr [rsp+ACH] mov r9d, dword ptr [rsp+8CH] ;; bbWeight=0.25 PerfScore 2.06 G_M64600_IG62: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref mov edx, dword ptr [rsp+80H] movsxd rsi, edx add rsi, rbx ; byrRegs +[rsi] mov bword ptr [rsp+38H], rsi ; GC ptr vars +{V176} mov dword ptr [rsp+68H], r12d mov rsi, bword ptr [rsp+38H] mov bword ptr [rsp+40H], rsi ; GC ptr vars +{V160} mov esi, dword ptr [rsp+68H] ; byrRegs -[rsi] mov dword ptr [rsp+6CH], esi mov rsi, bword ptr [rsp+40H] ; byrRegs +[rsi] mov bword ptr [rsp+30H], rsi ; GC ptr vars +{V179} mov ecx, dword ptr [rsp+6CH] mov dword ptr [rsp+64H], ecx lea esi, [rcx-1] ; byrRegs -[rsi] test esi, esi mov dword ptr [rsp+ACH], eax mov dword ptr [rsp+84H], edi jle G_M64600_IG68 ;; bbWeight=0.50 PerfScore 7.62 G_M64600_IG63: ; gcVars=000000000000004000000000 {V179}, gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, gcvars, byref, isz ; GC ptr vars -{V160 V176} lea ecx, [r9+48] mov edi, 0xD1FFAB1E mov eax, r9d mul edx:eax, edi mov r9d, edx shr r9d, 3 mov edx, dword ptr [rsp+64H] cmp esi, edx jae G_M64600_IG99 movsxd rax, esi lea edi, [r9+4*r9] add edi, edi sub ecx, edi mov rdi, bword ptr [rsp+30H] ; byrRegs +[rdi] mov byte ptr [rdi+rax], cl dec esi test esi, esi mov dword ptr [rsp+64H], edx jg SHORT G_M64600_IG67 ;; bbWeight=2 PerfScore 26.50 G_M64600_IG64: ; gcVars=000000000000000000000000 {}, gcrefRegs=00000000 {}, byrefRegs=00000088 {rbx rdi}, gcvars, byref, isz ; GC ptr vars -{V179} mov dword ptr [rsp+70H], r9d cmp r9d, 10 setb cl movzx rcx, cl mov r8, qword ptr [rsp+58H] mov rdx, gword ptr [r8] ; gcrRegs +[rdx] mov rax, rdx ; gcrRegs +[rax] test ecx, ecx jne SHORT G_M64600_IG66 ;; bbWeight=0.50 PerfScore 3.50 G_M64600_IG65: ; gcrefRegs=00000005 {rax rdx}, byrefRegs=00000088 {rbx rdi}, byref mov rcx, rax ; gcrRegs +[rcx] call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rax rcx rdx] ; gcr arg pop 0 ;; bbWeight=0.25 PerfScore 0.81 G_M64600_IG66: ; gcrefRegs=00000000 {}, byrefRegs=00000088 {rbx rdi}, byref, isz mov r9d, dword ptr [rsp+70H] lea ecx, [r9+48] mov byte ptr [rdi], cl mov esi, dword ptr [rsp+80H] add esi, r12d mov ecx, esi lea esi, [rcx+1] cmp ecx, ebp jae G_M64600_IG99 movsxd rcx, ecx add rcx, rbx ; byrRegs +[rcx] cmp r14d, 99 je SHORT G_M64600_IG69 mov edx, 58 jmp SHORT G_M64600_IG70 ;; bbWeight=0.50 PerfScore 4.88 G_M64600_IG67: ; gcrefRegs=00000000 {}, byrefRegs=00000088 {rbx rdi}, byref ; byrRegs -[rcx] mov bword ptr [rsp+30H], rdi ; GC ptr vars +{V179} jmp G_M64600_IG63 ;; bbWeight=1 PerfScore 3.00 G_M64600_IG68: ; gcVars=000000000000004000000000 {V179}, gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, gcvars, byref, isz ; byrRegs -[rdi] mov rdi, bword ptr [rsp+30H] ; byrRegs +[rdi] jmp SHORT G_M64600_IG64 ;; bbWeight=0.25 PerfScore 0.75 G_M64600_IG69: ; gcVars=000000000000000000000000 {}, gcrefRegs=00000000 {}, byrefRegs=0000000A {rcx rbx}, gcvars, byref ; byrRegs -[rdi] +[rcx] ; GC ptr vars -{V179} mov edx, 46 ;; bbWeight=0.50 PerfScore 0.12 G_M64600_IG70: ; gcrefRegs=00000000 {}, byrefRegs=0000000A {rcx rbx}, byref mov byte ptr [rcx], dl mov edx, esi mov eax, dword ptr [rsp+ACH] mov edi, dword ptr [rsp+84H] ;; bbWeight=0.50 PerfScore 1.62 G_M64600_IG71: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref ; byrRegs -[rcx] mov dword ptr [rsp+80H], edx mov r9d, edx mov esi, edi add r9, rsi mov esi, ebp cmp r9, rsi ja G_M64600_IG98 ;; bbWeight=0.50 PerfScore 1.62 G_M64600_IG72: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz mov r9d, edi not r9d shr r9d, 31 mov r8, qword ptr [rsp+58H] mov rsi, gword ptr [r8] ; gcrRegs +[rsi] mov r14, rsi ; gcrRegs +[r14] test r9d, r9d jne SHORT G_M64600_IG74 ;; bbWeight=0.50 PerfScore 3.50 G_M64600_IG73: ; gcrefRegs=00004040 {rsi r14}, byrefRegs=00000008 {rbx}, byref mov dword ptr [rsp+ACH], eax mov rcx, r14 ; gcrRegs +[rcx] mov rdx, rsi ; gcrRegs +[rdx] call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rcx rdx rsi r14] ; gcr arg pop 0 mov eax, dword ptr [rsp+ACH] ;; bbWeight=0.25 PerfScore 1.38 G_M64600_IG74: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz mov edx, dword ptr [rsp+80H] movsxd rsi, edx add rsi, rbx ; byrRegs +[rsi] mov dword ptr [rsp+84H], edi mov r14d, edi mov ecx, dword ptr [rsp+88H] mov r12d, ecx lea ecx, [r14-1] test ecx, ecx mov dword ptr [rsp+ACH], eax jle SHORT G_M64600_IG76 ;; bbWeight=0.50 PerfScore 3.38 G_M64600_IG75: ; gcrefRegs=00000000 {}, byrefRegs=00000048 {rbx rsi}, byref, isz lea r9d, [r12+48] mov edi, 0xD1FFAB1E mov eax, r12d mul edx:eax, edi mov r12d, edx shr r12d, 3 cmp ecx, r14d jae G_M64600_IG99 movsxd rdx, ecx lea eax, [r12+4*r12] add eax, eax sub r9d, eax mov byte ptr [rsi+rdx], r9b dec ecx test ecx, ecx jg SHORT G_M64600_IG75 ;; bbWeight=2 PerfScore 20.50 G_M64600_IG76: ; gcrefRegs=00000000 {}, byrefRegs=00000048 {rbx rsi}, byref, isz cmp r12d, 10 setb cl movzx rcx, cl mov r8, qword ptr [rsp+58H] mov rdx, gword ptr [r8] ; gcrRegs +[rdx] mov rax, rdx ; gcrRegs +[rax] test ecx, ecx jne SHORT G_M64600_IG78 ;; bbWeight=0.50 PerfScore 3.00 G_M64600_IG77: ; gcrefRegs=00000005 {rax rdx}, byrefRegs=00000048 {rbx rsi}, byref mov rcx, rax ; gcrRegs +[rcx] call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rax rcx rdx] ; gcr arg pop 0 ;; bbWeight=0.25 PerfScore 0.81 G_M64600_IG78: ; gcrefRegs=00000000 {}, byrefRegs=00000048 {rbx rsi}, byref test r14d, r14d je G_M64600_IG99 lea eax, [r12+48] mov byte ptr [rsi], al mov esi, dword ptr [rsp+80H] ; byrRegs -[rsi] add esi, dword ptr [rsp+84H] mov eax, esi lea esi, [rax+1] cmp eax, ebp jae G_M64600_IG99 movsxd rax, eax mov byte ptr [rbx+rax], 58 mov eax, esi add rax, 2 mov edx, ebp cmp rax, rdx ja G_M64600_IG98 ;; bbWeight=0.50 PerfScore 5.00 G_M64600_IG79: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz movsxd rdi, esi add rdi, rbx ; byrRegs +[rdi] mov r11, qword ptr [rsp+90H] mov r14d, r11d lea ecx, [r14+48] mov edx, 0xD1FFAB1E mov eax, r14d mul edx:eax, edx mov r14d, edx shr r14d, 3 lea edx, [r14+4*r14] add edx, edx sub ecx, edx mov byte ptr [rdi+1], cl cmp r14d, 10 setb cl movzx rcx, cl mov r8, qword ptr [rsp+58H] mov rdx, gword ptr [r8] ; gcrRegs +[rdx] mov rax, rdx ; gcrRegs +[rax] test ecx, ecx jne SHORT G_M64600_IG81 ;; bbWeight=2 PerfScore 30.00 G_M64600_IG80: ; gcrefRegs=00000005 {rax rdx}, byrefRegs=00000088 {rbx rdi}, byref mov rcx, rax ; gcrRegs +[rcx] call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rax rcx rdx] ; gcr arg pop 0 ;; bbWeight=0.25 PerfScore 0.81 G_M64600_IG81: ; gcrefRegs=00000000 {}, byrefRegs=00000088 {rbx rdi}, byref lea eax, [r14+48] mov byte ptr [rdi], al add esi, 2 mov eax, esi lea esi, [rax+1] cmp eax, ebp jae G_M64600_IG99 movsxd rax, eax mov byte ptr [rbx+rax], 58 mov eax, esi add rax, 2 mov edx, ebp cmp rax, rdx ja G_M64600_IG98 ;; bbWeight=0.50 PerfScore 3.50 G_M64600_IG82: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz ; byrRegs -[rdi] movsxd rdi, esi add rdi, rbx ; byrRegs +[rdi] mov r10, qword ptr [rsp+98H] mov r14d, r10d lea ecx, [r14+48] mov edx, 0xD1FFAB1E mov eax, r14d mul edx:eax, edx mov r14d, edx shr r14d, 3 lea edx, [r14+4*r14] add edx, edx sub ecx, edx mov byte ptr [rdi+1], cl cmp r14d, 10 setb cl movzx rcx, cl mov r8, qword ptr [rsp+58H] mov rdx, gword ptr [r8] ; gcrRegs +[rdx] mov rax, rdx ; gcrRegs +[rax] test ecx, ecx jne SHORT G_M64600_IG84 ;; bbWeight=2 PerfScore 30.00 G_M64600_IG83: ; gcrefRegs=00000005 {rax rdx}, byrefRegs=00000088 {rbx rdi}, byref mov rcx, rax ; gcrRegs +[rcx] call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rax rcx rdx] ; gcr arg pop 0 ;; bbWeight=0.25 PerfScore 0.81 G_M64600_IG84: ; gcrefRegs=00000000 {}, byrefRegs=00000088 {rbx rdi}, byref lea ecx, [r14+48] mov byte ptr [rdi], cl add esi, 2 mov edi, dword ptr [rsp+ACH] ; byrRegs -[rdi] test edi, edi jle G_M64600_IG92 mov ecx, esi lea esi, [rcx+1] cmp ecx, ebp jae G_M64600_IG99 movsxd rcx, ecx mov byte ptr [rbx+rcx], 46 mov r14d, r13d mov ecx, esi mov edx, edi add rcx, rdx mov edx, ebp cmp rcx, rdx ja G_M64600_IG98 ;; bbWeight=0.50 PerfScore 4.88 G_M64600_IG85: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz mov ecx, edi not ecx shr ecx, 31 mov r8, qword ptr [rsp+58H] mov rdx, gword ptr [r8] ; gcrRegs +[rdx] mov rax, rdx ; gcrRegs +[rax] test ecx, ecx jne SHORT G_M64600_IG87 ;; bbWeight=0.50 PerfScore 3.50 G_M64600_IG86: ; gcrefRegs=00000005 {rax rdx}, byrefRegs=00000008 {rbx}, byref mov rcx, rax ; gcrRegs +[rcx] call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rax rcx rdx] ; gcr arg pop 0 ;; bbWeight=0.25 PerfScore 0.81 G_M64600_IG87: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz movsxd rbp, esi add rbx, rbp mov ecx, edi lea r9d, [rcx-1] test r9d, r9d jle SHORT G_M64600_IG89 ;; bbWeight=0.50 PerfScore 1.25 G_M64600_IG88: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz lea r10d, [r14+48] mov edx, 0xD1FFAB1E mov eax, r14d mul edx:eax, edx mov r14d, edx shr r14d, 3 cmp r9d, ecx jae G_M64600_IG99 movsxd rdx, r9d lea eax, [r14+4*r14] add eax, eax sub r10d, eax mov byte ptr [rbx+rdx], r10b dec r9d test r9d, r9d jg SHORT G_M64600_IG88 ;; bbWeight=2 PerfScore 20.50 G_M64600_IG89: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz cmp r14d, 10 setb cl movzx rcx, cl mov r8, qword ptr [rsp+58H] mov rdx, gword ptr [r8] ; gcrRegs +[rdx] mov rax, rdx ; gcrRegs +[rax] test ecx, ecx jne SHORT G_M64600_IG91 ;; bbWeight=0.50 PerfScore 3.00 G_M64600_IG90: ; gcrefRegs=00000005 {rax rdx}, byrefRegs=00000008 {rbx}, byref mov rcx, rax ; gcrRegs +[rcx] call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rax rcx rdx] ; gcr arg pop 0 ;; bbWeight=0.25 PerfScore 0.81 G_M64600_IG91: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref lea ecx, [r14+48] mov byte ptr [rbx], cl add esi, edi ;; bbWeight=0.50 PerfScore 0.88 G_M64600_IG92: ; gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, isz ; byrRegs -[rbx] cmp esi, r15d sete cl movzx rcx, cl mov r8, qword ptr [rsp+58H] mov rdx, gword ptr [r8] ; gcrRegs +[rdx] mov rax, rdx ; gcrRegs +[rax] test ecx, ecx jne SHORT G_M64600_IG94 ;; bbWeight=0.50 PerfScore 3.00 G_M64600_IG93: ; gcrefRegs=00000005 {rax rdx}, byrefRegs=00000000 {}, byref mov rcx, rax ; gcrRegs +[rcx] call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rax rcx rdx] ; gcr arg pop 0 ;; bbWeight=0.25 PerfScore 0.81 G_M64600_IG94: ; gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref mov eax, 1 ;; bbWeight=0.50 PerfScore 0.12 G_M64600_IG95: ; , epilog, nogc, extend add rsp, 184 pop rbx pop rbp pop rsi pop rdi pop r12 pop r13 pop r14 pop r15 ret ;; bbWeight=0.50 PerfScore 2.62 G_M64600_IG96: ; gcVars=000000000000000008000000 {V02}, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, gcvars, byref ; GC ptr vars +{V02 V27} xor eax, eax mov rdi, bword ptr [rsp+110H] ; byrRegs +[rdi] mov dword ptr [rdi], eax ; GC ptr vars -{V02 V27} call [System.ThrowHelper:ThrowFormatException_BadFormatSpecifier()] ; byrRegs -[rdi] ; gcr arg pop 0 int3 ;; bbWeight=0 PerfScore 0.00 G_M64600_IG97: ; gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref call [System.Math:ThrowAbsOverflow()] ; gcr arg pop 0 int3 ;; bbWeight=0 PerfScore 0.00 G_M64600_IG98: ; gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref call [System.ThrowHelper:ThrowArgumentOutOfRangeException()] ; gcr arg pop 0 int3 ;; bbWeight=0 PerfScore 0.00 G_M64600_IG99: ; gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref call [CORINFO_HELP_RNGCHKFAIL] ; gcr arg pop 0 int3 ;; bbWeight=0 PerfScore 0.00 ; Total bytes of code 2589, prolog size 38, PerfScore 624.18, instruction count 660, allocated bytes for code 2589 (MethodHash=b1bd03a7) for method System.Buffers.Text.Utf8Formatter:TryFormat(System.TimeSpan,System.Span`1[System.Byte],byref,System.Buffers.StandardFormat):bool ; ============================================================ Unwind Info: >> Start offset : 0x000000 (not in unwind data) >> End offset : 0xd1ffab1e (not in unwind data) Version : 1 Flags : 0x00 SizeOfProlog : 0x13 CountOfUnwindCodes: 10 FrameRegister : none (0) FrameOffset : N/A (no FrameRegister) (Value=0) UnwindCodes : CodeOffset: 0x13 UnwindOp: UWOP_ALLOC_LARGE (1) OpInfo: 0 - Scaled small Size: 23 * 8 = 184 = 0x000B8 CodeOffset: 0x0C UnwindOp: UWOP_PUSH_NONVOL (0) OpInfo: rbx (3) CodeOffset: 0x0B UnwindOp: UWOP_PUSH_NONVOL (0) OpInfo: rbp (5) CodeOffset: 0x0A UnwindOp: UWOP_PUSH_NONVOL (0) OpInfo: rsi (6) CodeOffset: 0x09 UnwindOp: UWOP_PUSH_NONVOL (0) OpInfo: rdi (7) CodeOffset: 0x08 UnwindOp: UWOP_PUSH_NONVOL (0) OpInfo: r12 (12) CodeOffset: 0x06 UnwindOp: UWOP_PUSH_NONVOL (0) OpInfo: r13 (13) CodeOffset: 0x04 UnwindOp: UWOP_PUSH_NONVOL (0) OpInfo: r14 (14) CodeOffset: 0x02 UnwindOp: UWOP_PUSH_NONVOL (0) OpInfo: r15 (15)
Testo modificato
Apri file
; Assembly listing for method System.Buffers.Text.Utf8Formatter:TryFormat(System.TimeSpan,System.Span`1[System.Byte],byref,System.Buffers.StandardFormat):bool ; Emitting BLENDED_CODE for X64 CPU with SSE2 - Windows ; ReadyToRun compilation ; optimized code ; rsp based frame ; fully interruptible ; discarded IBC profile data due to mismatch in ILSize ; Final local variable assignments ; ;* V00 arg0 [V00 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op ; V01 arg1 [V01,T12] ( 4, 8 ) byref -> rdx ld-addr-op ; V02 arg2 [V02,T27] ( 5, 3 ) byref -> [rsp+120H] ; V03 arg3 [V03,T24] ( 4, 3.25) struct ( 8) [rsp+128H] do-not-enreg[SF] ld-addr-op ; V04 loc0 [V04,T13] ( 13, 8 ) ushort -> r14 ; V05 loc1 [V05,T16] ( 13, 7.50) int -> r15 ; V06 loc2 [V06,T29] ( 8, 4.50) int -> r13 ld-addr-op ; V07 loc3 [V07,T69] ( 5, 3 ) long -> r12 ; V08 loc4 [V08,T19] ( 11, 6.50) int -> [rsp+BCH] ; V09 loc5 [V09,T63] ( 5, 3.50) long -> [rsp+B0H] ; V10 loc6 [V10,T30] ( 4, 4.50) long -> [rsp+A8H] ; V11 loc7 [V11,T38] ( 5, 4 ) long -> r12 ; V12 loc8 [V12,T31] ( 4, 4.50) long -> [rsp+A0H] ; V13 loc9 [V13,T64] ( 5, 3.50) int -> [rsp+9CH] ; V14 loc10 [V14,T39] ( 5, 4 ) int -> [rsp+98H] ; V15 loc11 [V15,T62] ( 6, 3.50) int -> [rsp+94H] ; V16 loc12 [V16,T25] ( 9, 5 ) int -> r12 ; V17 loc13 [V17,T05] ( 31, 18.50) int -> [rsp+90H] ; V18 loc14 [V18,T65] ( 5, 3.50) long -> rcx ;* V19 loc15 [V19 ] ( 0, 0 ) long -> zero-ref ; V20 OutArgs [V20 ] ( 1, 1 ) lclBlk (32) [rsp+00H] "OutgoingArgSpace" ;* V21 tmp1 [V21 ] ( 0, 0 ) struct (16) zero-ref "dup spill" ;* V22 tmp2 [V22 ] ( 0, 0 ) struct (16) zero-ref "struct address for call/obj" ; V23 tmp3 [V23,T40] ( 4, 4 ) int -> rdx "impSpillLclRefs" ;* V24 tmp4 [V24 ] ( 0, 0 ) struct (16) zero-ref "struct address for call/obj" ; V25 tmp5 [V25,T41] ( 4, 4 ) int -> rdx "impSpillLclRefs" ;* V26 tmp6 [V26 ] ( 0, 0 ) struct (16) zero-ref "struct address for call/obj" ; V27 tmp7 [V27,T42] ( 4, 4 ) int -> rdx "impSpillLclRefs" ; V28 tmp8 [V28,T92] ( 2, 2 ) int -> rsi "impAppendStmt" ;* V29 tmp9 [V29 ] ( 0, 0 ) struct (16) zero-ref "struct address for call/obj" ;* V30 tmp10 [V30 ] ( 0, 0 ) struct (16) zero-ref "struct address for call/obj" ; V31 tmp11 [V31,T43] ( 4, 4 ) int -> rdx "impSpillLclRefs" ; V32 tmp12 [V32,T105] ( 3, 1.50) byref -> rdx ; V33 tmp13 [V33,T106] ( 3, 1.50) byref -> rdx ; V34 tmp14 [V34,T115] ( 3, 1.50) int -> r9 ;* V35 tmp15 [V35,T158] ( 0, 0 ) int -> zero-ref "impSpillLclRefs" ;* V36 tmp16 [V36 ] ( 0, 0 ) struct ( 8) zero-ref "dup spill" ;* V37 tmp17 [V37 ] ( 0, 0 ) struct (16) zero-ref "dup spill" ;* V38 tmp18 [V38 ] ( 0, 0 ) struct (16) zero-ref "dup spill" ; V39 tmp19 [V39,T68] ( 4, 3.25) ushort -> r14 "Inline stloc first use temp" ; V40 tmp20 [V40,T93] ( 2, 2 ) bool -> rcx "Inlining Arg" ; V41 tmp21 [V41,T120] ( 2, 1.50) ref -> rax class-hnd "Inlining Arg" ; V42 tmp22 [V42,T121] ( 2, 1.50) ref -> rdx class-hnd "Inlining Arg" ; V43 tmp23 [V43,T26] ( 6, 5 ) long -> r13 "Inlining Arg" ; V44 tmp24 [V44,T116] ( 3, 1.50) long -> r12 "Inline stloc first use temp" ;* V45 tmp25 [V45 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp" ;* V46 tmp26 [V46 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ; V47 tmp27 [V47,T28] ( 4, 5 ) int -> rax "Inline stloc first use temp" ; V48 tmp28 [V48,T07] ( 5, 14 ) int -> r13 "Inlining Arg" ; V49 tmp29 [V49,T22] ( 3, 6 ) int -> rcx "Inline stloc first use temp" ; V50 tmp30 [V50,T50] ( 2, 4 ) bool -> rcx "Inlining Arg" ; V51 tmp31 [V51,T81] ( 2, 2.50) ref -> r9 class-hnd "Inlining Arg" ; V52 tmp32 [V52,T82] ( 2, 2.50) ref -> rdx class-hnd "Inlining Arg" ; V53 tmp33 [V53,T117] ( 3, 1.50) long -> r9 "Inline stloc first use temp" ;* V54 tmp34 [V54 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp" ;* V55 tmp35 [V55 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ; V56 tmp36 [V56,T51] ( 2, 4 ) bool -> rcx "Inlining Arg" ; V57 tmp37 [V57,T83] ( 2, 2.50) ref -> r11 class-hnd "Inlining Arg" ; V58 tmp38 [V58,T84] ( 2, 2.50) ref -> rdx class-hnd "Inlining Arg" ; V59 tmp39 [V59,T118] ( 3, 1.50) long -> r12 "Inline stloc first use temp" ;* V60 tmp40 [V60 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp" ;* V61 tmp41 [V61 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ; V62 tmp42 [V62,T52] ( 2, 4 ) bool -> rcx "Inlining Arg" ; V63 tmp43 [V63,T85] ( 2, 2.50) ref -> r9 class-hnd "Inlining Arg" ; V64 tmp44 [V64,T86] ( 2, 2.50) ref -> rdx class-hnd "Inlining Arg" ; V65 tmp45 [V65,T53] ( 2, 4 ) bool -> rcx "Inlining Arg" ; V66 tmp46 [V66,T87] ( 2, 2.50) ref -> r9 class-hnd "Inlining Arg" ; V67 tmp47 [V67,T88] ( 2, 2.50) ref -> rdx class-hnd "Inlining Arg" ; V68 tmp48 [V68,T78] ( 3, 3 ) int -> r12 "Inlining Arg" ; V69 tmp49 [V69,T119] ( 3, 1.50) int -> r9 "Inline stloc first use temp" ;* V70 tmp50 [V70 ] ( 0, 0 ) struct ( 8) zero-ref "NewObj constructor temp" ;* V71 tmp51 [V71 ] ( 0, 0 ) int -> zero-ref "Inlining Arg" ; V72 tmp52 [V72,T54] ( 2, 4 ) bool -> rcx "Inlining Arg" ; V73 tmp53 [V73,T89] ( 2, 2.50) ref -> rdi class-hnd "Inlining Arg" ; V74 tmp54 [V74,T90] ( 2, 2.50) ref -> r12 class-hnd "Inlining Arg" ; V75 tmp55 [V75,T67] ( 11, 3.25) int -> r12 "Inline stloc first use temp" ; V76 tmp56 [V76,T23] ( 9, 5.50) int -> rcx "Inlining Arg" ; V77 tmp57 [V77,T145] ( 2, 1 ) bool -> [rsp+8CH] "Inlining Arg" ; V78 tmp58 [V78,T160] ( 2, 0.75) ref -> [rsp+68H] class-hnd "Inlining Arg" ; V79 tmp59 [V79,T161] ( 2, 0.75) ref -> [rsp+60H] class-hnd "Inlining Arg" ;* V80 tmp60 [V80 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp" ;* V81 tmp61 [V81,T156] ( 0, 0 ) byref -> zero-ref "Inlining Arg" ;* V82 tmp62 [V82 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg" ;* V83 tmp63 [V83 ] ( 0, 0 ) struct ( 8) zero-ref "NewObj constructor temp" ; V84 tmp64 [V84,T94] ( 2, 2 ) bool -> [rsp+88H] "Inlining Arg" ; V85 tmp65 [V85,T122] ( 2, 1.50) ref -> [rsp+58H] class-hnd "Inlining Arg" ; V86 tmp66 [V86,T123] ( 2, 1.50) ref -> rsi class-hnd "Inlining Arg" ;* V87 tmp67 [V87 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg" ; V88 tmp68 [V88,T08] ( 7, 11 ) int -> rsi "Inline stloc first use temp" ; V89 tmp69 [V89,T02] ( 7, 19 ) int -> registers "Inlining Arg" ; V90 tmp70 [V90,T55] ( 2, 4 ) int -> rdx "Inline stloc first use temp" ; V91 tmp71 [V91,T95] ( 2, 2 ) bool -> rdx "Inlining Arg" ; V92 tmp72 [V92,T124] ( 2, 1.50) ref -> rsi class-hnd "Inlining Arg" ; V93 tmp73 [V93,T125] ( 2, 1.50) ref -> r9 class-hnd "Inlining Arg" ;* V94 tmp74 [V94 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp" ;* V95 tmp75 [V95,T157] ( 0, 0 ) byref -> zero-ref "Inlining Arg" ;* V96 tmp76 [V96 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg" ;* V97 tmp77 [V97 ] ( 0, 0 ) struct ( 8) zero-ref "NewObj constructor temp" ; V98 tmp78 [V98,T96] ( 2, 2 ) bool -> r9 "Inlining Arg" ; V99 tmp79 [V99,T126] ( 2, 1.50) ref -> r14 class-hnd "Inlining Arg" ; V100 tmp80 [V100,T127] ( 2, 1.50) ref -> rsi class-hnd "Inlining Arg" ;* V101 tmp81 [V101 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg" ; V102 tmp82 [V102,T09] ( 7, 11 ) int -> rdx "Inline stloc first use temp" ; V103 tmp83 [V103,T03] ( 7, 19 ) int -> r12 "Inlining Arg" ; V104 tmp84 [V104,T56] ( 2, 4 ) int -> r9 "Inline stloc first use temp" ; V105 tmp85 [V105,T97] ( 2, 2 ) bool -> rdx "Inlining Arg" ; V106 tmp86 [V106,T128] ( 2, 1.50) ref -> rdi class-hnd "Inlining Arg" ; V107 tmp87 [V107,T129] ( 2, 1.50) ref -> r9 class-hnd "Inlining Arg" ;* V108 tmp88 [V108 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp" ;* V109 tmp89 [V109 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg" ;* V110 tmp90 [V110 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg" ;* V111 tmp91 [V111 ] ( 0, 0 ) struct ( 8) zero-ref "NewObj constructor temp" ;* V112 tmp92 [V112 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg" ;* V113 tmp93 [V113 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp" ; V114 tmp94 [V114,T00] ( 7, 25 ) int -> rdi "Inlining Arg" ; V115 tmp95 [V115,T57] ( 2, 4 ) int -> rdx "Inline stloc first use temp" ; V116 tmp96 [V116,T14] ( 2, 8 ) bool -> rdx "Inlining Arg" ; V117 tmp97 [V117,T34] ( 2, 4.50) ref -> r11 class-hnd "Inlining Arg" ; V118 tmp98 [V118,T35] ( 2, 4.50) ref -> r9 class-hnd "Inlining Arg" ;* V119 tmp99 [V119 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp" ;* V120 tmp100 [V120 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg" ;* V121 tmp101 [V121 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg" ;* V122 tmp102 [V122 ] ( 0, 0 ) struct ( 8) zero-ref "NewObj constructor temp" ;* V123 tmp103 [V123 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg" ;* V124 tmp104 [V124 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp" ; V125 tmp105 [V125,T01] ( 7, 25 ) int -> rdi "Inlining Arg" ; V126 tmp106 [V126,T58] ( 2, 4 ) int -> rdx "Inline stloc first use temp" ; V127 tmp107 [V127,T15] ( 2, 8 ) bool -> rdx "Inlining Arg" ; V128 tmp108 [V128,T36] ( 2, 4.50) ref -> r10 class-hnd "Inlining Arg" ; V129 tmp109 [V129,T37] ( 2, 4.50) ref -> r9 class-hnd "Inlining Arg" ;* V130 tmp110 [V130 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp" ; V131 tmp111 [V131,T91] ( 2, 2 ) byref -> rbx "Inlining Arg" ;* V132 tmp112 [V132 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg" ;* V133 tmp113 [V133 ] ( 0, 0 ) struct ( 8) zero-ref "NewObj constructor temp" ; V134 tmp114 [V134,T98] ( 2, 2 ) bool -> rdx "Inlining Arg" ; V135 tmp115 [V135,T130] ( 2, 1.50) ref -> r10 class-hnd "Inlining Arg" ; V136 tmp116 [V136,T131] ( 2, 1.50) ref -> r9 class-hnd "Inlining Arg" ;* V137 tmp117 [V137 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg" ; V138 tmp118 [V138,T10] ( 7, 11 ) int -> r9 "Inline stloc first use temp" ; V139 tmp119 [V139,T04] ( 7, 19 ) int -> rsi "Inlining Arg" ; V140 tmp120 [V140,T59] ( 2, 4 ) int -> r10 "Inline stloc first use temp" ; V141 tmp121 [V141,T99] ( 2, 2 ) bool -> rdx "Inlining Arg" ; V142 tmp122 [V142,T132] ( 2, 1.50) ref -> r10 class-hnd "Inlining Arg" ; V143 tmp123 [V143,T133] ( 2, 1.50) ref -> r9 class-hnd "Inlining Arg" ; V144 tmp124 [V144,T100] ( 2, 2 ) bool -> rcx "Inlining Arg" ; V145 tmp125 [V145,T134] ( 2, 1.50) ref -> rax class-hnd "Inlining Arg" ; V146 tmp126 [V146,T135] ( 2, 1.50) ref -> rdx class-hnd "Inlining Arg" ; V147 tmp127 [V147,T18] ( 7, 4.75) long -> rsi V00._ticks(offs=0x00) P-INDEP "field V00._ticks (fldOffset=0x0)" ; V148 tmp128 [V148,T11] ( 11, 9 ) byref -> rbx V201._pointer(offs=0x00) P-INDEP "field V01._pointer (fldOffset=0x0)" ; V149 tmp129 [V149,T17] ( 12, 7 ) int -> rbp V201._length(offs=0x08) P-INDEP "field V01._length (fldOffset=0x8)" ;* V150 tmp130 [V150 ] ( 0, 0 ) long -> zero-ref V21.Item1(offs=0x00) P-INDEP "field V21.Item1 (fldOffset=0x0)" ;* V151 tmp131 [V151 ] ( 0, 0 ) long -> zero-ref V21.Item2(offs=0x08) P-INDEP "field V21.Item2 (fldOffset=0x8)" ; V152 tmp132 [V152,T136] ( 2, 1 ) byref -> rsi V22._pointer(offs=0x00) P-INDEP "field V22._pointer (fldOffset=0x0)" ; V153 tmp133 [V153,T146] ( 2, 1 ) int -> r14 V22._length(offs=0x08) P-INDEP "field V22._length (fldOffset=0x8)" ; V154 tmp134 [V154,T44] ( 2, 4 ) byref -> rsi V24._pointer(offs=0x00) P-INDEP "field V24._pointer (fldOffset=0x0)" ;* V155 tmp135 [V155,T60] ( 0, 0 ) int -> zero-ref V24._length(offs=0x08) P-INDEP "field V24._length (fldOffset=0x8)" ; V156 tmp136 [V156,T45] ( 2, 4 ) byref -> rsi V26._pointer(offs=0x00) P-INDEP "field V26._pointer (fldOffset=0x0)" ;* V157 tmp137 [V157,T61] ( 0, 0 ) int -> zero-ref V26._length(offs=0x08) P-INDEP "field V26._length (fldOffset=0x8)" ; V158 tmp138 [V158,T137] ( 2, 1 ) byref -> rdi V29._pointer(offs=0x00) P-INDEP "field V29._pointer (fldOffset=0x0)" ; V159 tmp139 [V159,T147] ( 2, 1 ) int -> rdx V29._length(offs=0x08) P-INDEP "field V29._length (fldOffset=0x8)" ; V160 tmp140 [V160,T138] ( 2, 1 ) byref -> [rsp+50H] V30._pointer(offs=0x00) P-INDEP "field V30._pointer (fldOffset=0x0)" ; V161 tmp141 [V161,T148] ( 2, 1 ) int -> [rsp+84H] V30._length(offs=0x08) P-INDEP "field V30._length (fldOffset=0x8)" ;* V162 tmp142 [V162 ] ( 0, 0 ) int -> zero-ref V36.Item1(offs=0x00) P-INDEP "field V36.Item1 (fldOffset=0x0)" ;* V163 tmp143 [V163 ] ( 0, 0 ) int -> zero-ref V36.Item2(offs=0x04) P-INDEP "field V36.Item2 (fldOffset=0x4)" ;* V164 tmp144 [V164 ] ( 0, 0 ) long -> zero-ref V37.Item1(offs=0x00) P-INDEP "field V37.Item1 (fldOffset=0x0)" ;* V165 tmp145 [V165 ] ( 0, 0 ) long -> zero-ref V37.Item2(offs=0x08) P-INDEP "field V37.Item2 (fldOffset=0x8)" ;* V166 tmp146 [V166 ] ( 0, 0 ) long -> zero-ref V38.Item1(offs=0x00) P-INDEP "field V38.Item1 (fldOffset=0x0)" ;* V167 tmp147 [V167 ] ( 0, 0 ) long -> zero-ref V38.Item2(offs=0x08) P-INDEP "field V38.Item2 (fldOffset=0x8)" ;* V168 tmp148 [V168 ] ( 0, 0 ) long -> zero-ref V45.Item1(offs=0x00) P-INDEP "field V45.Item1 (fldOffset=0x0)" ; V169 tmp149 [V169,T149] ( 2, 1 ) long -> r13 V45.Item2(offs=0x08) P-INDEP "field V45.Item2 (fldOffset=0x8)" ;* V170 tmp150 [V170 ] ( 0, 0 ) long -> zero-ref V54.Item1(offs=0x00) P-INDEP "field V54.Item1 (fldOffset=0x0)" ; V171 tmp151 [V171,T150] ( 2, 1 ) long -> r10 V54.Item2(offs=0x08) P-INDEP "field V54.Item2 (fldOffset=0x8)" ;* V172 tmp152 [V172 ] ( 0, 0 ) long -> zero-ref V60.Item1(offs=0x00) P-INDEP "field V60.Item1 (fldOffset=0x0)" ; V173 tmp153 [V173,T151] ( 2, 1 ) long -> r11 V60.Item2(offs=0x08) P-INDEP "field V60.Item2 (fldOffset=0x8)" ;* V174 tmp154 [V174 ] ( 0, 0 ) int -> zero-ref V70.Item1(offs=0x00) P-INDEP "field V70.Item1 (fldOffset=0x0)" ; V175 tmp155 [V175,T152] ( 2, 1 ) int -> rdx V70.Item2(offs=0x04) P-INDEP "field V70.Item2 (fldOffset=0x4)" ; V176 tmp156 [V176,T139] ( 2, 1 ) byref -> [rsp+48H] V80._pointer(offs=0x00) P-INDEP "field V80._pointer (fldOffset=0x0)" ; V177 tmp157 [V177,T153] ( 2, 1 ) int -> [rsp+80H] V80._length(offs=0x08) P-INDEP "field V80._length (fldOffset=0x8)" ; V178 tmp158 [V178,T140] ( 2, 1 ) byref -> rsi V83._value(offs=0x00) P-INDEP "field V83._value (fldOffset=0x0)" ; V179 tmp159 [V179,T70] ( 3, 3 ) byref -> [rsp+40H] V87._pointer(offs=0x00) P-INDEP "field V87._pointer (fldOffset=0x0)" ; V180 tmp160 [V180,T79] ( 3, 3 ) int -> [rsp+7CH] V87._length(offs=0x08) P-INDEP "field V87._length (fldOffset=0x8)" ; V181 tmp161 [V181,T141] ( 2, 1 ) byref -> rsi V94._pointer(offs=0x00) P-INDEP "field V94._pointer (fldOffset=0x0)" ; V182 tmp162 [V182,T154] ( 2, 1 ) int -> r14 V94._length(offs=0x08) P-INDEP "field V94._length (fldOffset=0x8)" ; V183 tmp163 [V183,T142] ( 2, 1 ) byref -> rsi V97._value(offs=0x00) P-INDEP "field V97._value (fldOffset=0x0)" ; V184 tmp164 [V184,T71] ( 3, 3 ) byref -> [rsp+38H] V101._pointer(offs=0x00) P-INDEP "field V101._pointer (fldOffset=0x0)" ; V185 tmp165 [V185,T66] ( 4, 3.50) int -> r14 V101._length(offs=0x08) P-INDEP "field V101._length (fldOffset=0x8)" ; V186 tmp166 [V186,T46] ( 2, 4 ) byref -> rsi V108._pointer(offs=0x00) P-INDEP "field V108._pointer (fldOffset=0x0)" ;* V187 tmp167 [V187,T101] ( 0, 0 ) int -> zero-ref V108._length(offs=0x08) P-INDEP "field V108._length (fldOffset=0x8)" ; V188 tmp168 [V188,T47] ( 2, 4 ) byref -> rsi V111._value(offs=0x00) P-INDEP "field V111._value (fldOffset=0x0)" ; V189 tmp169 [V189,T32] ( 3, 4.50) byref -> rsi V112._pointer(offs=0x00) P-INDEP "field V112._pointer (fldOffset=0x0)" ;* V190 tmp170 [V190,T102] ( 0, 0 ) int -> zero-ref V112._length(offs=0x08) P-INDEP "field V112._length (fldOffset=0x8)" ; V191 tmp171 [V191,T48] ( 2, 4 ) byref -> rsi V119._pointer(offs=0x00) P-INDEP "field V119._pointer (fldOffset=0x0)" ;* V192 tmp172 [V192,T103] ( 0, 0 ) int -> zero-ref V119._length(offs=0x08) P-INDEP "field V119._length (fldOffset=0x8)" ; V193 tmp173 [V193,T49] ( 2, 4 ) byref -> rsi V122._value(offs=0x00) P-INDEP "field V122._value (fldOffset=0x0)" ; V194 tmp174 [V194,T33] ( 3, 4.50) byref -> rsi V123._pointer(offs=0x00) P-INDEP "field V123._pointer (fldOffset=0x0)" ;* V195 tmp175 [V195,T104] ( 0, 0 ) int -> zero-ref V123._length(offs=0x08) P-INDEP "field V123._length (fldOffset=0x8)" ; V196 tmp176 [V196,T143] ( 2, 1 ) byref -> rdi V130._pointer(offs=0x00) P-INDEP "field V130._pointer (fldOffset=0x0)" ; V197 tmp177 [V197,T155] ( 2, 1 ) int -> rdx V130._length(offs=0x08) P-INDEP "field V130._length (fldOffset=0x8)" ; V198 tmp178 [V198,T144] ( 2, 1 ) byref -> rdi V133._value(offs=0x00) P-INDEP "field V133._value (fldOffset=0x0)" ; V199 tmp179 [V199,T72] ( 3, 3 ) byref -> rdi V137._pointer(offs=0x00) P-INDEP "field V137._pointer (fldOffset=0x0)" ; V200 tmp180 [V200,T80] ( 3, 3 ) int -> rdx V137._length(offs=0x08) P-INDEP "field V137._length (fldOffset=0x8)" ;* V201 tmp181 [V201 ] ( 0, 0 ) struct (16) zero-ref "Promoted implicit byref" ; V202 cse0 [V202,T73] ( 3, 3 ) ref -> rdx "CSE - conservative" ; V203 cse1 [V203,T74] ( 3, 3 ) ref -> rdx "CSE - conservative" ; V204 cse2 [V204,T75] ( 3, 3 ) ref -> rdx "CSE - conservative" ; V205 cse3 [V205,T76] ( 3, 3 ) ref -> rdx "CSE - conservative" ; V206 cse4 [V206,T77] ( 3, 3 ) ref -> r12 "CSE - conservative" ; V207 cse5 [V207,T107] ( 3, 1.50) ref -> rdx "CSE - conservative" ; V208 cse6 [V208,T108] ( 3, 1.50) ref -> [rsp+30H] "CSE - conservative" ; V209 cse7 [V209,T109] ( 3, 1.50) ref -> r9 "CSE - conservative" ; V210 cse8 [V210,T110] ( 3, 1.50) ref -> rsi "CSE - conservative" ; V211 cse9 [V211,T111] ( 3, 1.50) ref -> r9 "CSE - conservative" ; V212 cse10 [V212,T20] ( 3, 6 ) ref -> r9 "CSE - conservative" ; V213 cse11 [V213,T21] ( 3, 6 ) ref -> r9 "CSE - conservative" ; V214 cse12 [V214,T112] ( 3, 1.50) ref -> r9 "CSE - conservative" ; V215 cse13 [V215,T113] ( 3, 1.50) ref -> r9 "CSE - conservative" ; V216 cse14 [V216,T114] ( 3, 1.50) ref -> rdx "CSE - conservative" ; V217 cse15 [V217,T159] ( 3, 0.75) ref -> [rsp+28H] "CSE - conservative" ; V218 cse16 [V218,T06] ( 18, 14.75) long -> [rsp+70H] "CSE - aggressive" ; TEMP_01 long -> [rsp+0xC0] ; ; Lcl frame size = 200 G_M64600_IG01: ; gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG push r15 push r14 push r13 push r12 push rdi push rsi push rbp push rbx sub rsp, 200 mov bword ptr [rsp+120H], r8 ; GC ptr vars +{V02} mov qword ptr [rsp+128H], r9 mov rsi, rcx ;; bbWeight=1 PerfScore 10.50 G_M64600_IG02: ; gcVars=000000000000000008000000 {V02}, gcrefRegs=00000000 {}, byrefRegs=00000004 {rdx}, gcvars, byref ; byrRegs +[rdx] mov rbx, bword ptr [rdx] ; byrRegs +[rbx] mov ebp, dword ptr [rdx+8] ;; bbWeight=1 PerfScore 4.00 G_M64600_IG03: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz ; byrRegs -[rdx] movzx rcx, byte ptr [rsp+128H] movzx r14, cx test r14d, r14d jne SHORT G_M64600_IG05 ;; bbWeight=1 PerfScore 2.50 G_M64600_IG04: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz cmp byte ptr [rsp+129H], 0 jne SHORT G_M64600_IG05 mov r14d, 99 ;; bbWeight=0.25 PerfScore 0.56 G_M64600_IG05: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref cmp r14d, 84 ja G_M64600_IG41 ;; bbWeight=1 PerfScore 1.25 G_M64600_IG06: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz cmp r14d, 71 je SHORT G_M64600_IG08 cmp r14d, 84 jne G_M64600_IG98 ;; bbWeight=0.50 PerfScore 1.25 G_M64600_IG07: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref mov r14d, 99 ;; bbWeight=0.50 PerfScore 0.13 G_M64600_IG08: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref mov r15d, 8 mov rcx, rsi test rcx, rcx jge G_M64600_IG42 ;; bbWeight=1 PerfScore 1.75 G_M64600_IG09: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz mov rcx, rsi neg rcx test rcx, rcx jge G_M64600_IG42 mov rdx, 0xD1FFAB1E cmp rcx, rdx sete cl movzx rcx, cl mov r12, qword ptr [(reloc)] mov rdx, gword ptr [r12] ; gcrRegs +[rdx] mov rax, rdx ; gcrRegs +[rax] test ecx, ecx jne SHORT G_M64600_IG11 ;; bbWeight=0.50 PerfScore 4.50 G_M64600_IG10: ; gcrefRegs=00000005 {rax rdx}, byrefRegs=00000008 {rbx}, byref mov rcx, rax ; gcrRegs +[rcx] call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rax rcx rdx] ; gcr arg pop 0 ;; bbWeight=0.25 PerfScore 0.81 G_M64600_IG11: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref mov r13d, 0xD1FFAB1E mov r12, 0xD1FFAB1E ;; bbWeight=0.50 PerfScore 0.25 G_M64600_IG12: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref xor eax, eax cmp r14d, 99 jne G_M64600_IG45 ;; bbWeight=1 PerfScore 1.50 G_M64600_IG13: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz test r13d, r13d je SHORT G_M64600_IG14 mov dword ptr [rsp+BCH], 7 mov eax, dword ptr [rsp+BCH] ;; bbWeight=0.50 PerfScore 1.63 G_M64600_IG14: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz cmp r13d, 0xD1FFAB1E setb cl movzx rcx, cl mov rdx, qword ptr [(reloc)] mov r8, rdx mov qword ptr [rsp+70H], r8 mov rdx, gword ptr [r8] ; gcrRegs +[rdx] mov r9, rdx ; gcrRegs +[r9] test ecx, ecx jne SHORT G_M64600_IG16 ;; bbWeight=1 PerfScore 8.25 G_M64600_IG15: ; gcrefRegs=00000204 {rdx r9}, byrefRegs=00000008 {rbx}, byref mov dword ptr [rsp+BCH], eax mov rcx, r9 ; gcrRegs +[rcx] call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rcx rdx r9] ; gcr arg pop 0 mov eax, dword ptr [rsp+BCH] ;; bbWeight=0.25 PerfScore 1.31 G_M64600_IG16: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz test eax, eax je SHORT G_M64600_IG18 ;; bbWeight=1 PerfScore 1.25 G_M64600_IG17: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref mov dword ptr [rsp+BCH], eax lea r15d, [rax+9] mov eax, dword ptr [rsp+BCH] ;; bbWeight=0.50 PerfScore 1.25 G_M64600_IG18: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz xor r9d, r9d xor r10d, r10d test r12, r12 je SHORT G_M64600_IG20 ;; bbWeight=1 PerfScore 1.75 G_M64600_IG19: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref mov dword ptr [rsp+BCH], eax mov rdx, 0xD1FFAB1E mov rax, r12 mul rdx:rax, rdx shr rdx, 5 mov r9, rdx imul r10, r9, 60 sub r12, r10 mov r10, r12 mov qword ptr [rsp+B0H], r9 mov r12, r10 mov r10, r12 mov eax, dword ptr [rsp+BCH] mov r9, qword ptr [rsp+B0H] ;; bbWeight=0.50 PerfScore 5.88 G_M64600_IG20: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz mov qword ptr [rsp+A8H], r10 cmp r10, 60 setb cl movzx rcx, cl mov r8, qword ptr [rsp+70H] mov rdx, gword ptr [r8] ; gcrRegs +[rdx] mov r11, rdx ; gcrRegs +[r11] test ecx, ecx jne SHORT G_M64600_IG22 ;; bbWeight=1 PerfScore 7.00 G_M64600_IG21: ; gcrefRegs=00000804 {rdx r11}, byrefRegs=00000008 {rbx}, byref mov dword ptr [rsp+BCH], eax mov qword ptr [rsp+B0H], r9 mov rcx, r11 ; gcrRegs +[rcx] call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rcx rdx r11] ; gcr arg pop 0 mov eax, dword ptr [rsp+BCH] mov r9, qword ptr [rsp+B0H] ;; bbWeight=0.25 PerfScore 1.81 G_M64600_IG22: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz xor r12d, r12d xor r11d, r11d test r9, r9 je SHORT G_M64600_IG24 ;; bbWeight=1 PerfScore 1.75 G_M64600_IG23: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref mov dword ptr [rsp+BCH], eax mov rdx, 0xD1FFAB1E mov rax, r9 mul rdx:rax, rdx shr rdx, 5 mov r12, rdx imul r11, r12, 60 sub r9, r11 mov r11, r9 mov rax, r11 mov r11, rax mov eax, dword ptr [rsp+BCH] ;; bbWeight=0.50 PerfScore 4.88 G_M64600_IG24: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz mov qword ptr [rsp+A0H], r11 cmp r11, 60 setb cl movzx rcx, cl mov r8, qword ptr [rsp+70H] mov rdx, gword ptr [r8] ; gcrRegs +[rdx] mov r9, rdx ; gcrRegs +[r9] test ecx, ecx jne SHORT G_M64600_IG26 ;; bbWeight=1 PerfScore 7.00 G_M64600_IG25: ; gcrefRegs=00000204 {rdx r9}, byrefRegs=00000008 {rbx}, byref mov dword ptr [rsp+BCH], eax mov rcx, r9 ; gcrRegs +[rcx] call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rcx rdx r9] ; gcr arg pop 0 mov eax, dword ptr [rsp+BCH] ;; bbWeight=0.25 PerfScore 1.31 G_M64600_IG26: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz mov ecx, 0xD1FFAB1E cmp r12, rcx setbe cl movzx rcx, cl mov r8, qword ptr [rsp+70H] mov rdx, gword ptr [r8] ; gcrRegs +[rdx] mov r9, rdx ; gcrRegs +[r9] test ecx, ecx jne SHORT G_M64600_IG28 ;; bbWeight=1 PerfScore 6.25 G_M64600_IG27: ; gcrefRegs=00000204 {rdx r9}, byrefRegs=00000008 {rbx}, byref mov dword ptr [rsp+BCH], eax mov rcx, r9 ; gcrRegs +[rcx] call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rcx rdx r9] ; gcr arg pop 0 mov eax, dword ptr [rsp+BCH] ;; bbWeight=0.25 PerfScore 1.31 G_M64600_IG28: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz xor r9d, r9d xor edx, edx test r12, r12 je SHORT G_M64600_IG30 ;; bbWeight=1 PerfScore 1.75 G_M64600_IG29: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref mov r9d, 0xD1FFAB1E mov edx, r12d imul r9, rdx shr r9, 36 lea ecx, [r9+2*r9] shl ecx, 3 sub r12d, ecx mov edx, r12d mov dword ptr [rsp+9CH], r9d mov r9d, edx mov edx, r9d mov r9d, dword ptr [rsp+9CH] ;; bbWeight=0.50 PerfScore 5.00 G_M64600_IG30: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz mov dword ptr [rsp+98H], edx cmp edx, 24 setb cl movzx rcx, cl mov r8, qword ptr [rsp+70H] mov r12, gword ptr [r8] ; gcrRegs +[r12] mov rdi, r12 ; gcrRegs +[rdi] test ecx, ecx jne SHORT G_M64600_IG32 ;; bbWeight=1 PerfScore 7.00 G_M64600_IG31: ; gcrefRegs=00001080 {rdi r12}, byrefRegs=00000008 {rbx}, byref mov dword ptr [rsp+BCH], eax mov dword ptr [rsp+9CH], r9d mov rcx, rdi ; gcrRegs +[rcx] mov rdx, r12 ; gcrRegs +[rdx] call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rcx rdx rdi r12] ; gcr arg pop 0 mov eax, dword ptr [rsp+BCH] mov r9d, dword ptr [rsp+9CH] ;; bbWeight=0.25 PerfScore 1.88 G_M64600_IG32: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz mov edi, 2 cmp dword ptr [rsp+98H], 10 jae SHORT G_M64600_IG34 ;; bbWeight=1 PerfScore 2.25 G_M64600_IG33: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz cmp r14d, 103 jne SHORT G_M64600_IG34 mov dword ptr [rsp+94H], 1 dec r15d mov edi, dword ptr [rsp+94H] ;; bbWeight=0.50 PerfScore 1.75 G_M64600_IG34: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref xor r12d, r12d test r9d, r9d jne G_M64600_IG49 ;; bbWeight=1 PerfScore 1.50 G_M64600_IG35: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz cmp r14d, 71 jne SHORT G_M64600_IG36 add r15d, 2 mov r12d, 1 ;; bbWeight=0.50 PerfScore 0.88 G_M64600_IG36: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz test rsi, rsi jge SHORT G_M64600_IG38 ;; bbWeight=1 PerfScore 1.25 G_M64600_IG37: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref inc r15d ;; bbWeight=0.50 PerfScore 0.13 G_M64600_IG38: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref cmp ebp, r15d jge G_M64600_IG58 ;; bbWeight=1 PerfScore 1.25 G_M64600_IG39: ; gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref ; byrRegs -[rbx] xor eax, eax mov rdi, bword ptr [rsp+120H] ; byrRegs +[rdi] mov dword ptr [rdi], eax ;; bbWeight=0.50 PerfScore 1.13 G_M64600_IG40: ; , epilog, nogc, extend add rsp, 200 pop rbx pop rbp pop rsi pop rdi pop r12 pop r13 pop r14 pop r15 ret ;; bbWeight=0.50 PerfScore 2.63 G_M64600_IG41: ; gcVars=000000000000000008000000 {V02}, gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, gcvars, byref ; byrRegs -[rdi] +[rbx] cmp r14d, 99 je G_M64600_IG08 cmp r14d, 103 je G_M64600_IG08 cmp r14d, 116 jne G_M64600_IG98 jmp G_M64600_IG07 ;; bbWeight=0.50 PerfScore 2.88 G_M64600_IG42: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz mov r13, rsi test r13, r13 jge SHORT G_M64600_IG44 ;; bbWeight=0.50 PerfScore 0.75 G_M64600_IG43: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref mov r13, rsi neg r13 test r13, r13 jl G_M64600_IG99 ;; bbWeight=0.25 PerfScore 0.44 G_M64600_IG44: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref mov rdx, 0xD1FFAB1E mov rax, r13 mul rdx:rax, rdx shr rdx, 23 mov r12, rdx imul r9, r12, 0xD1FFAB1E sub r13, r9 jmp G_M64600_IG12 ;; bbWeight=0.50 PerfScore 4.50 G_M64600_IG45: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz cmp r14d, 71 jne SHORT G_M64600_IG46 mov eax, 7 jmp G_M64600_IG14 ;; bbWeight=0.50 PerfScore 1.75 G_M64600_IG46: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref test r13d, r13d je G_M64600_IG14 xor eax, eax ;; bbWeight=0.50 PerfScore 0.75 G_M64600_IG47: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz mov r8d, 0xD1FFAB1E mov ecx, r13d imul rcx, r8 shr rcx, 35 lea edx, [rcx+4*rcx] add edx, edx cmp r13d, edx jne SHORT G_M64600_IG48 mov r13d, ecx inc eax jmp SHORT G_M64600_IG47 ;; bbWeight=2 PerfScore 18.00 G_M64600_IG48: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref neg eax add eax, 7 mov dword ptr [rsp+BCH], eax mov eax, dword ptr [rsp+BCH] jmp G_M64600_IG14 ;; bbWeight=0.50 PerfScore 2.25 G_M64600_IG49: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz mov dword ptr [rsp+9CH], r9d mov ecx, r9d mov r12d, 1 cmp ecx, 0x186A0 jb SHORT G_M64600_IG51 ;; bbWeight=0.50 PerfScore 1.38 G_M64600_IG50: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref shr ecx, 5 imul rcx, rcx, 0xD1FFAB1E shr rcx, 39 mov r12d, 6 ;; bbWeight=0.25 PerfScore 1.56 G_M64600_IG51: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz cmp ecx, 10 jb G_M64600_IG57 cmp ecx, 100 jae SHORT G_M64600_IG52 inc r12d jmp SHORT G_M64600_IG57 ;; bbWeight=0.25 PerfScore 1.19 G_M64600_IG52: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz cmp ecx, 0x3E8 jae SHORT G_M64600_IG53 add r12d, 2 jmp SHORT G_M64600_IG57 ;; bbWeight=0.25 PerfScore 0.88 G_M64600_IG53: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz cmp ecx, 0x2710 jae SHORT G_M64600_IG54 add r12d, 3 jmp SHORT G_M64600_IG57 ;; bbWeight=0.25 PerfScore 0.88 G_M64600_IG54: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz cmp ecx, 0x186A0 setb cl movzx rcx, cl mov dword ptr [rsp+8CH], ecx mov r8, qword ptr [rsp+70H] mov rcx, gword ptr [r8] ; gcrRegs +[rcx] mov gword ptr [rsp+28H], rcx ; GC ptr vars +{V217} mov gword ptr [rsp+68H], rcx ; GC ptr vars +{V78} mov rcx, gword ptr [rsp+28H] mov gword ptr [rsp+60H], rcx ; GC ptr vars +{V79} cmp dword ptr [rsp+8CH], 0 jne SHORT G_M64600_IG56 ;; bbWeight=0.25 PerfScore 2.88 G_M64600_IG55: ; gcVars=000000000000000008000000 {V02 V78 V79}, gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, gcvars, byref ; gcrRegs -[rcx] ; GC ptr vars -{V217} mov dword ptr [rsp+BCH], eax mov rcx, gword ptr [rsp+68H] ; gcrRegs +[rcx] mov rdx, gword ptr [rsp+60H] ; gcrRegs +[rdx] ; GC ptr vars -{V78 V79} call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rcx rdx] ; gcr arg pop 0 mov eax, dword ptr [rsp+BCH] ;; bbWeight=0.13 PerfScore 0.88 G_M64600_IG56: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref add r12d, 4 ;; bbWeight=0.25 PerfScore 0.06 G_M64600_IG57: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref lea r15d, [r15+r12+1] mov r9d, dword ptr [rsp+9CH] jmp G_M64600_IG36 ;; bbWeight=0.50 PerfScore 2.00 G_M64600_IG58: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz mov rcx, bword ptr [rsp+120H] ; byrRegs +[rcx] mov dword ptr [rcx], r15d xor ecx, ecx ; byrRegs -[rcx] test rsi, rsi jge SHORT G_M64600_IG59 mov ecx, 1 test ebp, ebp je G_M64600_IG101 mov byte ptr [rbx], 45 ;; bbWeight=0.50 PerfScore 3.00 G_M64600_IG59: ; gcVars=000000000000000000000000 {}, gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, gcvars, byref ; GC ptr vars -{V02} test r12d, r12d jle G_M64600_IG71 mov dword ptr [rsp+90H], ecx mov esi, ecx mov qword ptr [rsp+C0H], rsi mov esi, r12d add rsi, qword ptr [rsp+C0H] mov qword ptr [rsp+C0H], rsi mov esi, ebp cmp qword ptr [rsp+C0H], rsi ja G_M64600_IG100 ;; bbWeight=0.50 PerfScore 4.00 G_M64600_IG60: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz mov esi, r12d not esi shr esi, 31 mov dword ptr [rsp+88H], esi mov r8, qword ptr [rsp+70H] mov rsi, gword ptr [r8] ; gcrRegs +[rsi] mov gword ptr [rsp+30H], rsi ; GC ptr vars +{V208} mov gword ptr [rsp+58H], rsi ; GC ptr vars +{V85} mov rsi, gword ptr [rsp+30H] cmp dword ptr [rsp+88H], 0 jne SHORT G_M64600_IG62 ;; bbWeight=0.50 PerfScore 5.75 G_M64600_IG61: ; gcVars=000000000000000000000000 {V85}, gcrefRegs=00000040 {rsi}, byrefRegs=00000008 {rbx}, gcvars, byref ; GC ptr vars -{V208} mov dword ptr [rsp+BCH], eax mov dword ptr [rsp+9CH], r9d mov rcx, gword ptr [rsp+58H] ; gcrRegs +[rcx] mov rdx, rsi ; gcrRegs +[rdx] ; GC ptr vars -{V85} call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rcx rdx rsi] ; gcr arg pop 0 mov eax, dword ptr [rsp+BCH] mov r9d, dword ptr [rsp+9CH] ;; bbWeight=0.25 PerfScore 2.06 G_M64600_IG62: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref mov ecx, dword ptr [rsp+90H] movsxd rsi, ecx add rsi, rbx ; byrRegs +[rsi] mov bword ptr [rsp+48H], rsi ; GC ptr vars +{V176} mov dword ptr [rsp+80H], r12d mov rsi, bword ptr [rsp+48H] mov bword ptr [rsp+50H], rsi ; GC ptr vars +{V160} mov esi, dword ptr [rsp+80H] ; byrRegs -[rsi] mov dword ptr [rsp+84H], esi mov rsi, bword ptr [rsp+50H] ; byrRegs +[rsi] mov bword ptr [rsp+40H], rsi ; GC ptr vars +{V179} mov edx, dword ptr [rsp+84H] mov dword ptr [rsp+7CH], edx lea esi, [rdx-1] ; byrRegs -[rsi] test esi, esi mov dword ptr [rsp+94H], edi jle G_M64600_IG68 ;; bbWeight=0.50 PerfScore 7.13 G_M64600_IG63: ; gcVars=000000000000004000000000 {V179}, gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, gcvars, byref, isz ; GC ptr vars -{V160 V176} lea edx, [r9+48] mov edi, 0xD1FFAB1E mov r9d, r9d imul r9, rdi shr r9, 35 mov edi, r9d cmp esi, dword ptr [rsp+7CH] jae G_M64600_IG101 movsxd r9, esi lea r10d, [rdi+4*rdi] add r10d, r10d sub edx, r10d mov r10, bword ptr [rsp+40H] ; byrRegs +[r10] mov byte ptr [r10+r9], dl dec esi test esi, esi jg SHORT G_M64600_IG67 ;; bbWeight=2 PerfScore 24.00 G_M64600_IG64: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz ; byrRegs -[r10] cmp edi, 10 setb dl movzx rdx, dl mov r8, qword ptr [rsp+70H] mov r9, gword ptr [r8] ; gcrRegs +[r9] mov rsi, r9 ; gcrRegs +[rsi] test edx, edx jne SHORT G_M64600_IG66 ;; bbWeight=0.50 PerfScore 3.00 G_M64600_IG65: ; gcrefRegs=00000240 {rsi r9}, byrefRegs=00000008 {rbx}, byref mov dword ptr [rsp+BCH], eax mov rcx, rsi ; gcrRegs +[rcx] mov rdx, r9 ; gcrRegs +[rdx] call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rcx rdx rsi r9] ; gcr arg pop 0 mov eax, dword ptr [rsp+BCH] ;; bbWeight=0.25 PerfScore 1.38 G_M64600_IG66: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz lea r9d, [rdi+48] mov r10, bword ptr [rsp+40H] ; byrRegs +[r10] mov byte ptr [r10], r9b mov ecx, dword ptr [rsp+90H] add ecx, r12d mov edx, ecx lea ecx, [rdx+1] cmp edx, ebp jae G_M64600_IG101 movsxd rdx, edx add rdx, rbx ; byrRegs +[rdx] cmp r14d, 99 je SHORT G_M64600_IG69 mov r9d, 58 jmp SHORT G_M64600_IG70 ;; bbWeight=0.50 PerfScore 4.88 G_M64600_IG67: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref ; byrRegs -[rdx r10] mov r9d, edi jmp G_M64600_IG63 ;; bbWeight=1 PerfScore 2.25 G_M64600_IG68: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz mov edi, r9d jmp SHORT G_M64600_IG64 ;; bbWeight=0.25 PerfScore 0.56 G_M64600_IG69: ; gcVars=000000000000000000000000 {}, gcrefRegs=00000000 {}, byrefRegs=0000000C {rdx rbx}, gcvars, byref ; byrRegs +[rdx] ; GC ptr vars -{V179} mov r9d, 46 ;; bbWeight=0.50 PerfScore 0.13 G_M64600_IG70: ; gcrefRegs=00000000 {}, byrefRegs=0000000C {rdx rbx}, byref mov byte ptr [rdx], r9b mov edi, dword ptr [rsp+94H] ;; bbWeight=0.50 PerfScore 1.00 G_M64600_IG71: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref ; byrRegs -[rdx] mov dword ptr [rsp+90H], ecx mov r9d, ecx mov esi, edi add r9, rsi mov esi, ebp cmp r9, rsi ja G_M64600_IG100 ;; bbWeight=0.50 PerfScore 1.63 G_M64600_IG72: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz mov r9d, edi not r9d shr r9d, 31 mov r8, qword ptr [rsp+70H] mov rsi, gword ptr [r8] ; gcrRegs +[rsi] mov r14, rsi ; gcrRegs +[r14] test r9d, r9d jne SHORT G_M64600_IG74 ;; bbWeight=0.50 PerfScore 3.50 G_M64600_IG73: ; gcrefRegs=00004040 {rsi r14}, byrefRegs=00000008 {rbx}, byref mov dword ptr [rsp+BCH], eax mov rcx, r14 ; gcrRegs +[rcx] mov rdx, rsi ; gcrRegs +[rdx] call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rcx rdx rsi r14] ; gcr arg pop 0 mov eax, dword ptr [rsp+BCH] ;; bbWeight=0.25 PerfScore 1.38 G_M64600_IG74: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref mov ecx, dword ptr [rsp+90H] movsxd rsi, ecx add rsi, rbx ; byrRegs +[rsi] mov dword ptr [rsp+94H], edi mov r14d, edi mov edx, dword ptr [rsp+98H] mov r12d, edx mov bword ptr [rsp+38H], rsi ; GC ptr vars +{V184} lea edx, [r14-1] test edx, edx jle G_M64600_IG97 ;; bbWeight=0.50 PerfScore 3.38 G_M64600_IG75: ; gcVars=000000000000008000000000 {V184}, gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, gcvars, byref ; byrRegs -[rsi] lea r9d, [r12+48] mov edi, 0xD1FFAB1E mov r12d, r12d imul r12, rdi shr r12, 35 cmp edx, r14d jae G_M64600_IG101 movsxd rdi, edx lea esi, [r12+4*r12] add esi, esi sub r9d, esi mov rsi, bword ptr [rsp+38H] ; byrRegs +[rsi] mov byte ptr [rsi+rdi], r9b dec edx test edx, edx jg G_M64600_IG96 ;; bbWeight=2 PerfScore 22.00 G_M64600_IG76: ; gcVars=000000000000000000000000 {}, gcrefRegs=00000000 {}, byrefRegs=00000048 {rbx rsi}, gcvars, byref, isz ; GC ptr vars -{V184} cmp r12d, 10 setb dl movzx rdx, dl mov r8, qword ptr [rsp+70H] mov r9, gword ptr [r8] ; gcrRegs +[r9] mov rdi, r9 ; gcrRegs +[rdi] test edx, edx jne SHORT G_M64600_IG78 ;; bbWeight=0.50 PerfScore 3.00 G_M64600_IG77: ; gcrefRegs=00000280 {rdi r9}, byrefRegs=00000048 {rbx rsi}, byref mov dword ptr [rsp+BCH], eax mov rcx, rdi ; gcrRegs +[rcx] mov rdx, r9 ; gcrRegs +[rdx] call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rcx rdx rdi r9] ; gcr arg pop 0 mov eax, dword ptr [rsp+BCH] ;; bbWeight=0.25 PerfScore 1.38 G_M64600_IG78: ; gcrefRegs=00000000 {}, byrefRegs=00000048 {rbx rsi}, byref test r14d, r14d je G_M64600_IG101 add r12d, 48 mov byte ptr [rsi], r12b mov ecx, dword ptr [rsp+90H] add ecx, dword ptr [rsp+94H] mov edx, ecx lea ecx, [rdx+1] cmp edx, ebp jae G_M64600_IG101 movsxd rdx, edx mov byte ptr [rbx+rdx], 58 mov edx, ecx add rdx, 2 mov r9d, ebp cmp rdx, r9 ja G_M64600_IG100 ;; bbWeight=0.50 PerfScore 4.88 G_M64600_IG79: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz ; byrRegs -[rsi] mov dword ptr [rsp+90H], ecx movsxd rsi, ecx add rsi, rbx ; byrRegs +[rsi] mov r11, qword ptr [rsp+A0H] mov edi, r11d lea edx, [rdi+48] mov r9d, 0xD1FFAB1E mov edi, edi imul rdi, r9 shr rdi, 35 lea r9d, [rdi+4*rdi] add r9d, r9d sub edx, r9d mov byte ptr [rsi+1], dl cmp edi, 10 setb dl movzx rdx, dl mov r8, qword ptr [rsp+70H] mov r9, gword ptr [r8] ; gcrRegs +[r9] mov r11, r9 ; gcrRegs +[r11] test edx, edx jne SHORT G_M64600_IG81 ;; bbWeight=2 PerfScore 31.50 G_M64600_IG80: ; gcrefRegs=00000A00 {r9 r11}, byrefRegs=00000048 {rbx rsi}, byref mov dword ptr [rsp+BCH], eax mov rcx, r11 ; gcrRegs +[rcx] mov rdx, r9 ; gcrRegs +[rdx] call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rcx rdx r9 r11] ; gcr arg pop 0 mov eax, dword ptr [rsp+BCH] ;; bbWeight=0.25 PerfScore 1.38 G_M64600_IG81: ; gcrefRegs=00000000 {}, byrefRegs=00000048 {rbx rsi}, byref add edi, 48 mov byte ptr [rsi], dil mov ecx, dword ptr [rsp+90H] add ecx, 2 mov edx, ecx lea ecx, [rdx+1] cmp edx, ebp jae G_M64600_IG101 movsxd rdx, edx mov byte ptr [rbx+rdx], 58 mov edx, ecx add rdx, 2 mov r9d, ebp cmp rdx, r9 ja G_M64600_IG100 ;; bbWeight=0.50 PerfScore 3.88 G_M64600_IG82: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz ; byrRegs -[rsi] mov dword ptr [rsp+90H], ecx movsxd rsi, ecx add rsi, rbx ; byrRegs +[rsi] mov r10, qword ptr [rsp+A8H] mov edi, r10d lea edx, [rdi+48] mov r9d, 0xD1FFAB1E mov edi, edi imul rdi, r9 shr rdi, 35 lea r9d, [rdi+4*rdi] add r9d, r9d sub edx, r9d mov byte ptr [rsi+1], dl cmp edi, 10 setb dl movzx rdx, dl mov r8, qword ptr [rsp+70H] mov r9, gword ptr [r8] ; gcrRegs +[r9] mov r10, r9 ; gcrRegs +[r10] test edx, edx jne SHORT G_M64600_IG84 ;; bbWeight=2 PerfScore 31.50 G_M64600_IG83: ; gcrefRegs=00000600 {r9 r10}, byrefRegs=00000048 {rbx rsi}, byref mov dword ptr [rsp+BCH], eax mov rcx, r10 ; gcrRegs +[rcx] mov rdx, r9 ; gcrRegs +[rdx] call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rcx rdx r9-r10] ; gcr arg pop 0 mov eax, dword ptr [rsp+BCH] ;; bbWeight=0.25 PerfScore 1.38 G_M64600_IG84: ; gcrefRegs=00000000 {}, byrefRegs=00000048 {rbx rsi}, byref add edi, 48 mov byte ptr [rsi], dil mov ecx, dword ptr [rsp+90H] add ecx, 2 test eax, eax jle G_M64600_IG92 mov edx, ecx lea ecx, [rdx+1] cmp edx, ebp jae G_M64600_IG101 movsxd rdx, edx mov byte ptr [rbx+rdx], 46 mov esi, r13d ; byrRegs -[rsi] mov dword ptr [rsp+90H], ecx mov edx, ecx mov r9d, eax add rdx, r9 mov r9d, ebp cmp rdx, r9 ja G_M64600_IG100 ;; bbWeight=0.50 PerfScore 5.25 G_M64600_IG85: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz mov dword ptr [rsp+BCH], eax mov edx, eax not edx shr edx, 31 mov r8, qword ptr [rsp+70H] mov r9, gword ptr [r8] ; gcrRegs +[r9] mov r10, r9 ; gcrRegs +[r10] test edx, edx jne SHORT G_M64600_IG87 ;; bbWeight=0.50 PerfScore 4.00 G_M64600_IG86: ; gcrefRegs=00000600 {r9 r10}, byrefRegs=00000008 {rbx}, byref mov rcx, r10 ; gcrRegs +[rcx] mov rdx, r9 ; gcrRegs +[rdx] call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rcx rdx r9-r10] ; gcr arg pop 0 ;; bbWeight=0.25 PerfScore 0.88 G_M64600_IG87: ; gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, byref, isz mov ecx, dword ptr [rsp+90H] movsxd rdi, ecx add rdi, rbx ; byrRegs +[rdi] mov eax, dword ptr [rsp+BCH] mov edx, eax lea r9d, [rdx-1] test r9d, r9d jle SHORT G_M64600_IG89 ;; bbWeight=0.50 PerfScore 2.25 G_M64600_IG88: ; gcrefRegs=00000000 {}, byrefRegs=00000080 {rdi}, byref, isz ; byrRegs -[rbx] lea r10d, [rsi+48] mov r11d, 0xD1FFAB1E mov esi, esi imul rsi, r11 shr rsi, 35 cmp r9d, edx jae G_M64600_IG101 movsxd r11, r9d lea ebx, [rsi+4*rsi] add ebx, ebx sub r10d, ebx mov byte ptr [rdi+r11], r10b dec r9d test r9d, r9d jg SHORT G_M64600_IG88 ;; bbWeight=2 PerfScore 20.00 G_M64600_IG89: ; gcrefRegs=00000000 {}, byrefRegs=00000080 {rdi}, byref, isz cmp esi, 10 setb dl movzx rdx, dl mov r8, qword ptr [rsp+70H] mov r9, gword ptr [r8] ; gcrRegs +[r9] mov r10, r9 ; gcrRegs +[r10] test edx, edx jne SHORT G_M64600_IG91 ;; bbWeight=0.50 PerfScore 3.00 G_M64600_IG90: ; gcrefRegs=00000600 {r9 r10}, byrefRegs=00000080 {rdi}, byref mov rcx, r10 ; gcrRegs +[rcx] mov rdx, r9 ; gcrRegs +[rdx] call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rcx rdx r9-r10] ; gcr arg pop 0 ;; bbWeight=0.25 PerfScore 0.88 G_M64600_IG91: ; gcrefRegs=00000000 {}, byrefRegs=00000080 {rdi}, byref add esi, 48 mov byte ptr [rdi], sil mov ecx, dword ptr [rsp+90H] add ecx, dword ptr [rsp+BCH] ;; bbWeight=0.50 PerfScore 1.63 G_M64600_IG92: ; gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, isz ; byrRegs -[rdi] cmp ecx, r15d sete cl movzx rcx, cl mov r8, qword ptr [rsp+70H] mov rdx, gword ptr [r8] ; gcrRegs +[rdx] mov rax, rdx ; gcrRegs +[rax] test ecx, ecx jne SHORT G_M64600_IG94 ;; bbWeight=0.50 PerfScore 3.00 G_M64600_IG93: ; gcrefRegs=00000005 {rax rdx}, byrefRegs=00000000 {}, byref mov rcx, rax ; gcrRegs +[rcx] call [hackishModuleName:hackishMethodName()] ; gcrRegs -[rax rcx rdx] ; gcr arg pop 0 ;; bbWeight=0.25 PerfScore 0.81 G_M64600_IG94: ; gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref mov eax, 1 ;; bbWeight=0.50 PerfScore 0.13 G_M64600_IG95: ; , epilog, nogc, extend add rsp, 200 pop rbx pop rbp pop rsi pop rdi pop r12 pop r13 pop r14 pop r15 ret ;; bbWeight=0.50 PerfScore 2.63 G_M64600_IG96: ; gcVars=000000000000000000000000 {}, gcrefRegs=00000000 {}, byrefRegs=00000048 {rbx rsi}, gcvars, byref ; byrRegs +[rbx rsi] mov bword ptr [rsp+38H], rsi ; GC ptr vars +{V184} jmp G_M64600_IG75 ;; bbWeight=1 PerfScore 3.00 G_M64600_IG97: ; gcVars=000000000000008000000000 {V184}, gcrefRegs=00000000 {}, byrefRegs=00000008 {rbx}, gcvars, byref ; byrRegs -[rsi] mov rsi, bword ptr [rsp+38H] ; byrRegs +[rsi] jmp G_M64600_IG76 ;; bbWeight=0.25 PerfScore 0.75 G_M64600_IG98: ; gcVars=000000000000000008000000 {V02}, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, gcvars, byref ; byrRegs -[rbx rsi] ; GC ptr vars -{V184} +{V02 V27} xor eax, eax mov rdi, bword ptr [rsp+120H] ; byrRegs +[rdi] mov dword ptr [rdi], eax ; GC ptr vars -{V02 V27} call [System.ThrowHelper:ThrowFormatException_BadFormatSpecifier()] ; byrRegs -[rdi] ; gcr arg pop 0 int3 ;; bbWeight=0 PerfScore 0.00 G_M64600_IG99: ; gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref call [System.Math:ThrowAbsOverflow()] ; gcr arg pop 0 int3 ;; bbWeight=0 PerfScore 0.00 G_M64600_IG100: ; gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref call [System.ThrowHelper:ThrowArgumentOutOfRangeException()] ; gcr arg pop 0 int3 ;; bbWeight=0 PerfScore 0.00 G_M64600_IG101: ; gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref call [CORINFO_HELP_RNGCHKFAIL] ; gcr arg pop 0 int3 ;; bbWeight=0 PerfScore 0.00 ; Total bytes of code 2699, prolog size 38, PerfScore 640.96, instruction count 663, allocated bytes for code 2699 (MethodHash=b1bd03a7) for method System.Buffers.Text.Utf8Formatter:TryFormat(System.TimeSpan,System.Span`1[System.Byte],byref,System.Buffers.StandardFormat):bool ; ============================================================ Unwind Info: >> Start offset : 0x000000 (not in unwind data) >> End offset : 0xd1ffab1e (not in unwind data) Version : 1 Flags : 0x00 SizeOfProlog : 0x13 CountOfUnwindCodes: 10 FrameRegister : none (0) FrameOffset : N/A (no FrameRegister) (Value=0) UnwindCodes : CodeOffset: 0x13 UnwindOp: UWOP_ALLOC_LARGE (1) OpInfo: 0 - Scaled small Size: 25 * 8 = 200 = 0x000C8 CodeOffset: 0x0C UnwindOp: UWOP_PUSH_NONVOL (0) OpInfo: rbx (3) CodeOffset: 0x0B UnwindOp: UWOP_PUSH_NONVOL (0) OpInfo: rbp (5) CodeOffset: 0x0A UnwindOp: UWOP_PUSH_NONVOL (0) OpInfo: rsi (6) CodeOffset: 0x09 UnwindOp: UWOP_PUSH_NONVOL (0) OpInfo: rdi (7) CodeOffset: 0x08 UnwindOp: UWOP_PUSH_NONVOL (0) OpInfo: r12 (12) CodeOffset: 0x06 UnwindOp: UWOP_PUSH_NONVOL (0) OpInfo: r13 (13) CodeOffset: 0x04 UnwindOp: UWOP_PUSH_NONVOL (0) OpInfo: r14 (14) CodeOffset: 0x02 UnwindOp: UWOP_PUSH_NONVOL (0) OpInfo: r15 (15)
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