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생성일 비교 결과 만료 없음
203 삭제
315 행
51 추가
169 행
Legalizing: t59: v8i32 = bitcast t58
Legalizing: t58: v4i64 = vector_shuffle<4,5,2,3> t25, t51
Trying custom legalization
Successfully custom legalized node
... replacing: t58: v4i64 = vector_shuffle<4,5,2,3> t25, t51
with: t67: v4i64 = X86ISD::BLENDI t51, t25, TargetConstant:i8<12>

Legalizing: t67: v4i64 = X86ISD::BLENDI t51, t25, TargetConstant:i8<12>
Legal node: nothing to do
Legal node: nothing to do

Legalizing: t66: i8 = TargetConstant<12>
Legalized selection DAG: %bb.0 'shuffle_v16i16_03_04_05_06_07_16_17_26_11_12_13_14_15_24_25_26:'
Legalized selection DAG: %bb.0 'shuffle_v16i16_03_04_05_06_07_16_17_26_11_12_13_14_15_24_25_26:'
SelectionDAG has 23 nodes:
SelectionDAG has 24 nodes:
t0: ch,glue = EntryToken
t0: ch,glue = EntryToken
t62: v32i8 = X86ISD::PALIGNR t60, t60, TargetConstant:i8<6>
t62: v32i8 = X86ISD::PALIGNR t60, t60, TargetConstant:i8<6>
t63: v16i16 = bitcast t62
t63: v16i16 = bitcast t62
t8: ch,glue = CopyToReg t0, Register:v16i16 $ymm0, t63
t8: ch,glue = CopyToReg t0, Register:v16i16 $ymm0, t63
t25: v4i64 = bitcast t31
t25: v4i64 = bitcast t31
t2: v16i16,ch = CopyFromReg t0, Register:v16i16 %0
t2: v16i16,ch = CopyFromReg t0, Register:v16i16 %0
t4: v16i16,ch = CopyFromReg t0, Register:v16i16 %1
t4: v16i16,ch = CopyFromReg t0, Register:v16i16 %1
t31: v16i16 = X86ISD::BLENDI t2, t4, TargetConstant:i8<7>
t31: v16i16 = X86ISD::BLENDI t2, t4, TargetConstant:i8<7>
t51: v4i64 = X86ISD::VPERMI t25, TargetConstant:i8<78>
t51: v4i64 = X86ISD::VPERMI t25, TargetConstant:i8<78>
t58: v4i64 = vector_shuffle<4,5,2,3> t25, t51
t67: v4i64 = X86ISD::BLENDI t51, t25, TargetConstant:i8<12>
t59: v8i32 = bitcast t58
t59: v8i32 = bitcast t67
t57: v16i16 = bitcast t59
t57: v16i16 = bitcast t59
t65: v16i16 = X86ISD::BLENDI t31, t57, TargetConstant:i8<4>
t65: v16i16 = X86ISD::BLENDI t31, t57, TargetConstant:i8<4>
t60: v32i8 = bitcast t65
t60: v32i8 = bitcast t65
t9: ch = X86ISD::RET_GLUE t8, TargetConstant:i32<0>, Register:v16i16 $ymm0, t8:1
t9: ch = X86ISD::RET_GLUE t8, TargetConstant:i32<0>, Register:v16i16 $ymm0, t8:1






Legalizing: t65: v16i16 = X86ISD::BLENDI t31, t57, TargetConstant:i8<4>
Legalizing: t67: v4i64 = X86ISD::BLENDI t51, t25, TargetConstant:i8<12>
Legal node: nothing to do

Combining: t65: v16i16 = X86ISD::BLENDI t31, t57, TargetConstant:i8<4>

Replacing.2 t51: v4i64 = X86ISD::VPERMI t25, TargetConstant:i8<78>

With: t71: v4i64 = insert_subvector undef:v4i64, t68, Constant:i64<0>


Legalizing: t71: v4i64 = insert_subvector undef:v4i64, t68, Constant:i64<0>
Legal node: nothing to do

Combining: t71: v4i64 = insert_subvector undef:v4i64, t68, Constant:i64<0>

Legalizing: t70: i64 = Constant<0>
Legal node: nothing to do

Combining: t70: i64 = Constant<0>

Legalizing: t68: v2i64 = extract_subvector t25, Constant:i64<2>
Legal node: nothing to do

Combining: t68: v2i64 = extract_subvector t25, Constant:i64<2>
... into: t75: v2i64 = bitcast t74

Legalizing: t75: v2i64 = bitcast t74
Legal node: nothing to do

Combining: t75: v2i64 = bitcast t74

Legalizing: t74: v8i16 = extract_subvector t31, Constant:i64<8>
Legal node: nothing to do

Combining: t74: v8i16 = extract_subvector t31, Constant:i64<8>

Legalizing: t73: i64 = Constant<8>
Legal node: nothing to do

Combining: t73: i64 = Constant<8>

Legalizing: t71: v4i64 = insert_subvector undef:v4i64, t75, Constant:i64<0>
Legal node: nothing to do

Combining: t71: v4i64 = insert_subvector undef:v4i64, t75, Constant:i64<0>
... into: t78: v4i64 = bitcast t77

Legalizing: t74: v8i16 = extract_subvector t31, Constant:i64<8>
Legal node: nothing to do

Combining: t74: v8i16 = extract_subvector t31, Constant:i64<8>

Legalizing: t70: i64 = Constant<0>
Legal node: nothing to do

Combining: t70: i64 = Constant<0>

Legalizing: t78: v4i64 = bitcast t77
Legal node: nothing to do

Combining: t78: v4i64 = bitcast t77

Legalizing: t77: v16i16 = insert_subvector undef:v16i16, t74, Constant:i64<0>
Legal node: nothing to do

Combining: t77: v16i16 = insert_subvector undef:v16i16, t74, Constant:i64<0>

Legalizing: t76: v16i16 = undef
Legal node: nothing to do

Combining: t76: v16i16 = undef

Legalizing: t65: v16i16 = X86ISD::BLENDI t31, t57, TargetConstant:i8<4>
Legal node: nothing to do

Combining: t65: v16i16 = X86ISD::BLENDI t31, t57, TargetConstant:i8<4>

Replacing.2 t58: v4i64 = vector_shuffle<4,5,2,3> t25, t78

With: t81: v4i64 = vector_shuffle<4,5,2,3> t80, t78


Legalizing: t78: v4i64 = bitcast t77
Legal node: nothing to do

Combining: t78: v4i64 = bitcast t77

Legalizing: t81: v4i64 = vector_shuffle<4,5,2,3> t80, t78
Trying custom legalization
Successfully custom legalized node
... replacing: t81: v4i64 = vector_shuffle<4,5,2,3> t80, t78
with: t83: v4i64 = X86ISD::BLENDI t78, t80, TargetConstant:i8<12>

Legalizing: t80: v4i64 = bitcast t4
Legal node: nothing to do

Combining: t80: v4i64 = bitcast t4

Legalizing: t78: v4i64 = bitcast t77
Legal node: nothing to do

Combining: t78: v4i64 = bitcast t77

Legalizing: t83: v4i64 = X86ISD::BLENDI t78, t80, TargetConstant:i8<12>
Legal node: nothing to do

Combining: t83: v4i64 = X86ISD::BLENDI t78, t80, TargetConstant:i8<12>
... into: t86: v4i64 = X86ISD::VPERM2X128 t84, t80, TargetConstant:i8<49>

Legalizing: t80: v4i64 = bitcast t4
Legal node: nothing to do

Combining: t80: v4i64 = bitcast t4

Legalizing: t86: v4i64 = X86ISD::VPERM2X128 t84, t80, TargetConstant:i8<49>
Legal node: nothing to do

Combining: t86: v4i64 = X86ISD::VPERM2X128 t84, t80, TargetConstant:i8<49>
... into: t88: v4i64 = bitcast t87

Legalizing: t88: v4i64 = bitcast t87
Legal node: nothing to do

Combining: t88: v4i64 = bitcast t87

Legalizing: t87: v16i16 = X86ISD::VPERM2X128 t31, t4, TargetConstant:i8<49>
Legal node: nothing to do

Combining: t87: v16i16 = X86ISD::VPERM2X128 t31, t4, TargetConstant:i8<49>

Legalizing: t85: i8 = TargetConstant<49>

Combining: t85: i8 = TargetConstant<49>

Legalizing: t65: v16i16 = X86ISD::BLENDI t31, t57, TargetConstant:i8<4>
Legal node: nothing to do

Combining: t65: v16i16 = X86ISD::BLENDI t31, t57, TargetConstant:i8<4>

Replacing.2 t87: v16i16 = X86ISD::VPERM2X128 t31, t4, TargetConstant:i8<49>

With: t93: v16i16 = bitcast t92


Legalizing: t93: v16i16 = bitcast t92
Legal node: nothing to do

Combining: t93: v16i16 = bitcast t92

Legalizing: t92: v4i64 = X86ISD::VPERMI t90, TargetConstant:i8<-18>
Legal node: nothing to do

Combining: t92: v4i64 = X86ISD::VPERMI t90, TargetConstant:i8<-18>

Legalizing: t91: i8 = TargetConstant<-18>

Combining: t91: i8 = TargetConstant<-18>

Legalizing: t90: v4i64 = bitcast t4
Legal node: nothing to do
Legal node: nothing to do


Combining: t90: v4i64 = bitcast t4
Combining: t67: v4i64 = X86ISD::BLENDI t51, t25, TargetConstant:i8<12>
... into: t70: v4i64 = X86ISD::VPERMI t25, TargetConstant:i8<-18>


Legalizing: t88: v4i64 = bitcast t93
Legalizing: t70: v4i64 = X86ISD::VPERMI t25, TargetConstant:i8<-18>
Legal node: nothing to do
Legal node: nothing to do


Combining: t88: v4i64 = bitcast t93
Combining: t70: v4i64 = X86ISD::VPERMI t25, TargetConstant:i8<-18>
... into: t92: v4i64 = X86ISD::VPERMI t90, TargetConstant:i8<-18>


Legalizing: t92: v4i64 = X86ISD::VPERMI t90, TargetConstant:i8<-18>
Legalizing: t69: i8 = TargetConstant<-18>
Legal node: nothing to do


Combining: t92: v4i64 = X86ISD::VPERMI t90, TargetConstant:i8<-18>
Combining: t69: i8 = TargetConstant<-18>


Legalizing: t65: v16i16 = X86ISD::BLENDI t31, t57, TargetConstant:i8<4>
Legalizing: t65: v16i16 = X86ISD::BLENDI t31, t57, TargetConstant:i8<4>
Legal node: nothing to do
Legal node: nothing to do


Combining: t65: v16i16 = X86ISD::BLENDI t31, t57, TargetConstant:i8<4>
Combining: t65: v16i16 = X86ISD::BLENDI t31, t57, TargetConstant:i8<4>


Legalizing: t64: i8 = TargetConstant<4>
Legalizing: t64: i8 = TargetConstant<4>


Combining: t64: i8 = TargetConstant<4>
Combining: t64: i8 = TargetConstant<4>


Legalizing: t63: v16i16 = bitcast t62
Legalizing: t63: v16i16 = bitcast t62
Legal node: nothing to do
Legal node: nothing to do


Combining: t63: v16i16 = bitcast t62
Combining: t63: v16i16 = bitcast t62


Legalizing: t62: v32i8 = X86ISD::PALIGNR t60, t60, TargetConstant:i8<6>
Legalizing: t62: v32i8 = X86ISD::PALIGNR t60, t60, TargetConstant:i8<6>
Legal node: nothing to do
Legal node: nothing to do


Combining: t62: v32i8 = X86ISD::PALIGNR t60, t60, TargetConstant:i8<6>
Combining: t62: v32i8 = X86ISD::PALIGNR t60, t60, TargetConstant:i8<6>


Legalizing: t61: i8 = TargetConstant<6>
Legalizing: t61: i8 = TargetConstant<6>


Combining: t61: i8 = TargetConstant<6>
Combining: t61: i8 = TargetConstant<6>


Legalizing: t60: v32i8 = bitcast t65
Legalizing: t60: v32i8 = bitcast t65
Legal node: nothing to do
Legal node: nothing to do


Combining: t60: v32i8 = bitcast t65
Combining: t60: v32i8 = bitcast t65


Legalizing: t59: v8i32 = bitcast t92
Legalizing: t59: v8i32 = bitcast t70
Legal node: nothing to do
Legal node: nothing to do


Combining: t59: v8i32 = bitcast t92
Combining: t59: v8i32 = bitcast t70


Legalizing: t57: v16i16 = bitcast t59
Legalizing: t57: v16i16 = bitcast t59
Legal node: nothing to do
Legal node: nothing to do


Combining: t57: v16i16 = bitcast t59
Combining: t57: v16i16 = bitcast t59
... into: t98: v16i16 = bitcast t92
... into: t74: v16i16 = bitcast t70


Legalizing: t92: v4i64 = X86ISD::VPERMI t90, TargetConstant:i8<-18>
Legalizing: t70: v4i64 = X86ISD::VPERMI t25, TargetConstant:i8<-18>
Legal node: nothing to do
Legal node: nothing to do


Combining: t92: v4i64 = X86ISD::VPERMI t90, TargetConstant:i8<-18>
Combining: t70: v4i64 = X86ISD::VPERMI t25, TargetConstant:i8<-18>


Legalizing: t98: v16i16 = bitcast t92
Legalizing: t74: v16i16 = bitcast t70
Legal node: nothing to do
Legal node: nothing to do


Combining: t98: v16i16 = bitcast t92
Combining: t74: v16i16 = bitcast t70


Legalizing: t65: v16i16 = X86ISD::BLENDI t31, t98, TargetConstant:i8<4>
Legalizing: t65: v16i16 = X86ISD::BLENDI t31, t74, TargetConstant:i8<4>
Legal node: nothing to do
Legal node: nothing to do


Combining: t65: v16i16 = X86ISD::BLENDI t31, t98, TargetConstant:i8<4>
Combining: t65: v16i16 = X86ISD::BLENDI t31, t74, TargetConstant:i8<4>


Legalizing: t31: v16i16 = X86ISD::BLENDI t2, t4, TargetConstant:i8<7>
Legalizing: t31: v16i16 = X86ISD::BLENDI t2, t4, TargetConstant:i8<7>
Legal node: nothing to do
Legal node: nothing to do


Combining: t31: v16i16 = X86ISD::BLENDI t2, t4, TargetConstant:i8<7>
Combining: t31: v16i16 = X86ISD::BLENDI t2, t4, TargetConstant:i8<7>


Legalizing: t30: i8 = TargetConstant<7>
Legalizing: t30: i8 = TargetConstant<7>


Combining: t30: i8 = TargetConstant<7>
Combining: t30: i8 = TargetConstant<7>


Legalizing: t25: v4i64 = bitcast t31
Legal node: nothing to do

Combining: t25: v4i64 = bitcast t31

Legalizing: t9: ch = X86ISD::RET_GLUE t8, TargetConstant:i32<0>, Register:v16i16 $ymm0, t8:1
Legalizing: t9: ch = X86ISD::RET_GLUE t8, TargetConstant:i32<0>, Register:v16i16 $ymm0, t8:1
Legal node: nothing to do
Legal node: nothing to do


Combining: t9: ch = X86ISD::RET_GLUE t8, TargetConstant:i32<0>, Register:v16i16 $ymm0, t8:1
Combining: t9: ch = X86ISD::RET_GLUE t8, TargetConstant:i32<0>, Register:v16i16 $ymm0, t8:1


Legalizing: t8: ch,glue = CopyToReg t0, Register:v16i16 $ymm0, t63
Legalizing: t8: ch,glue = CopyToReg t0, Register:v16i16 $ymm0, t63
Legal node: nothing to do
Legal node: nothing to do


Combining: t8: ch,glue = CopyToReg t0, Register:v16i16 $ymm0, t63
Combining: t8: ch,glue = CopyToReg t0, Register:v16i16 $ymm0, t63


Legalizing: t4: v16i16,ch = CopyFromReg t0, Register:v16i16 %1
Legalizing: t4: v16i16,ch = CopyFromReg t0, Register:v16i16 %1
Legal node: nothing to do
Legal node: nothing to do


Combining: t4: v16i16,ch = CopyFromReg t0, Register:v16i16 %1
Combining: t4: v16i16,ch = CopyFromReg t0, Register:v16i16 %1


Legalizing: t2: v16i16,ch = CopyFromReg t0, Register:v16i16 %0
Legalizing: t2: v16i16,ch = CopyFromReg t0, Register:v16i16 %0
Legal node: nothing to do
Legal node: nothing to do


Combining: t2: v16i16,ch = CopyFromReg t0, Register:v16i16 %0
Combining: t2: v16i16,ch = CopyFromReg t0, Register:v16i16 %0


Legalizing: t7: v16i16 = Register $ymm0
Legalizing: t7: v16i16 = Register $ymm0


Combining: t7: v16i16 = Register $ymm0
Combining: t7: v16i16 = Register $ymm0


Legalizing: t6: i32 = TargetConstant<0>
Legalizing: t6: i32 = TargetConstant<0>


Combining: t6: i32 = TargetConstant<0>
Combining: t6: i32 = TargetConstant<0>


Legalizing: t3: v16i16 = Register %1
Legalizing: t3: v16i16 = Register %1


Combining: t3: v16i16 = Register %1
Combining: t3: v16i16 = Register %1


Legalizing: t1: v16i16 = Register %0
Legalizing: t1: v16i16 = Register %0


Combining: t1: v16i16 = Register %0
Combining: t1: v16i16 = Register %0


Legalizing: t0: ch,glue = EntryToken
Legalizing: t0: ch,glue = EntryToken
Legal node: nothing to do
Legal node: nothing to do


Combining: t0: ch,glue = EntryToken
Combining: t0: ch,glue = EntryToken
Optimized legalized selection DAG: %bb.0 'shuffle_v16i16_03_04_05_06_07_16_17_26_11_12_13_14_15_24_25_26:'
Optimized legalized selection DAG: %bb.0 'shuffle_v16i16_03_04_05_06_07_16_17_26_11_12_13_14_15_24_25_26:'
SelectionDAG has 21 nodes:
SelectionDAG has 21 nodes:
t0: ch,glue = EntryToken
t0: ch,glue = EntryToken
t4: v16i16,ch = CopyFromReg t0, Register:v16i16 %1
t62: v32i8 = X86ISD::PALIGNR t60, t60, TargetConstant:i8<6>
t62: v32i8 = X86ISD::PALIGNR t60, t60, TargetConstant:i8<6>
t63: v16i16 = bitcast t62
t63: v16i16 = bitcast t62
t8: ch,glue = CopyToReg t0, Register:v16i16 $ymm0, t63
t8: ch,glue = CopyToReg t0, Register:v16i16 $ymm0, t63
t2: v16i16,ch = CopyFromReg t0, Register:v16i16 %0
t2: v16i16,ch = CopyFromReg t0, Register:v16i16 %0
t4: v16i16,ch = CopyFromReg t0, Register:v16i16 %1
t31: v16i16 = X86ISD::BLENDI t2, t4, TargetConstant:i8<7>
t31: v16i16 = X86ISD::BLENDI t2, t4, TargetConstant:i8<7>
t90: v4i64 = bitcast t4
t25: v4i64 = bitcast t31
t92: v4i64 = X86ISD::VPERMI t90, TargetConstant:i8<-18>
t70: v4i64 = X86ISD::VPERMI t25, TargetConstant:i8<-18>
t98: v16i16 = bitcast t92
t74: v16i16 = bitcast t70
t65: v16i16 = X86ISD::BLENDI t31, t98, TargetConstant:i8<4>
t65: v16i16 = X86ISD::BLENDI t31, t74, TargetConstant:i8<4>
t60: v32i8 = bitcast t65
t60: v32i8 = bitcast t65
t9: ch = X86ISD::RET_GLUE t8, TargetConstant:i32<0>, Register:v16i16 $ymm0, t8:1
t9: ch = X86ISD::RET_GLUE t8, TargetConstant:i32<0>, Register:v16i16 $ymm0, t8:1


저장된 비교 결과