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// Driver implementation for HopeRF RFM69W/RFM69HW, Semtech SX1231/1231H used for
// Driver implementation for HopeRF RFM69W/RFM69HW, Semtech SX1231/1231H used for
// compatibility with the frequency hopped, spread spectrum signals from a Davis Instrument
// compatibility with the frequency hopped, spread spectrum signals from a Davis Instrument
// wireless Integrated Sensor Suite (ISS)
// wireless Integrated Sensor Suite (ISS)
//
//
// This is part of the DavisRFM69 library from https://github.com/dekay/DavisRFM69
// This is part of the DavisRFM69 library from https://github.com/dekay/DavisRFM69
// (C) DeKay 2014 dekaymail@gmail.com
// (C) DeKay 2014 dekaymail@gmail.com
//
//
// As I consider this to be a derived work for now from the RFM69W library from LowPowerLab,
// As I consider this to be a derived work for now from the RFM69W library from LowPowerLab,
// it is released under the same Creative Commons Attrib Share-Alike License
// it is released under the same Creative Commons Attrib Share-Alike License
// You are free to use/extend this library but please abide with the CC-BY-SA license:
// You are free to use/extend this library but please abide with the CC-BY-SA license:
// http://creativecommons.org/licenses/by-sa/3.0/
// http://creativecommons.org/licenses/by-sa/3.0/
#include <DavisRFM69.h>
#include <DavisRFM69.h>
#include <../RFM69/RFM69registers.h>
#include <RFM69registers.h>
#include <SPI.h>
#include <SPI.h>
volatile byte DavisRFM69::DATA[DAVIS_PACKET_LEN];
volatile byte DavisRFM69::DATA[DAVIS_PACKET_LEN];
volatile byte DavisRFM69::_mode; // current transceiver state
volatile byte DavisRFM69::_mode; // current transceiver state
volatile bool DavisRFM69::_packetReceived = false;
volatile bool DavisRFM69::_packetReceived = false;
volatile byte DavisRFM69::CHANNEL = 0;
volatile byte DavisRFM69::CHANNEL = 0;
volatile int DavisRFM69::RSSI; // RSSI measured immediately after payload reception
volatile int DavisRFM69::RSSI; // RSSI measured immediately after payload reception
DavisRFM69* DavisRFM69::selfPointer;
DavisRFM69* DavisRFM69::selfPointer;
void DavisRFM69::initialize()
bool DavisRFM69::initialize()
{
{
const byte CONFIG[][2] =
const byte CONFIG[][2] =
{
{
/* 0x01 */ { REG_OPMODE, RF_OPMODE_SEQUENCER_ON | RF_OPMODE_LISTEN_OFF | RF_OPMODE_STANDBY },
/* 0x01 */ { REG_OPMODE, RF_OPMODE_SEQUENCER_ON | RF_OPMODE_LISTEN_OFF | RF_OPMODE_STANDBY },
/* 0x02 */ { REG_DATAMODUL, RF_DATAMODUL_DATAMODE_PACKET | RF_DATAMODUL_MODULATIONTYPE_FSK | RF_DATAMODUL_MODULATIONSHAPING_10 }, // Davis uses Gaussian shaping with BT=0.5
/* 0x02 */ { REG_DATAMODUL, RF_DATAMODUL_DATAMODE_PACKET | RF_DATAMODUL_MODULATIONTYPE_FSK | RF_DATAMODUL_MODULATIONSHAPING_10 }, // Davis uses Gaussian shaping with BT=0.5
/* 0x03 */ { REG_BITRATEMSB, RF_BITRATEMSB_19200}, // Davis uses a datarate of 19.2 KBPS
/* 0x03 */ { REG_BITRATEMSB, RF_BITRATEMSB_19200}, // Davis uses a datarate of 19.2 KBPS
/* 0x04 */ { REG_BITRATELSB, RF_BITRATELSB_19200},
/* 0x04 */ { REG_BITRATELSB, RF_BITRATELSB_19200},
/* 0x05 */ { REG_FDEVMSB, RF_FDEVMSB_4800}, // Davis uses a deviation of 4.8 kHz
/* 0x05 */ { REG_FDEVMSB, RF_FDEVMSB_4800}, // Davis uses a deviation of 4.8 kHz
/* 0x06 */ { REG_FDEVLSB, RF_FDEVLSB_4800},
/* 0x06 */ { REG_FDEVLSB, RF_FDEVLSB_4800},
/* 0x07 to 0x09 are REG_FRFMSB to LSB. No sense setting them here. Done in main routine.
/* 0x07 to 0x09 are REG_FRFMSB to LSB. No sense setting them here. Done in main routine.
/* 0x0B */ { REG_AFCCTRL, RF_AFCLOWBETA_OFF }, // TODO: Should use LOWBETA_ON, but having trouble getting it working
/* 0x0B */ { REG_AFCCTRL, RF_AFCLOWBETA_OFF }, // TODO: Should use LOWBETA_ON, but having trouble getting it working
// looks like PA1 and PA2 are not implemented on RFM69W, hence the max output power is 13dBm
// looks like PA1 and PA2 are not implemented on RFM69W, hence the max output power is 13dBm
// +17dBm and +20dBm are possible on RFM69HW
// +17dBm and +20dBm are possible on RFM69HW
// +13dBm formula: Pout=-18+OutputPower (with PA0 or PA1**)
// +13dBm formula: Pout=-18+OutputPower (with PA0 or PA1**)
// +17dBm formula: Pout=-14+OutputPower (with PA1 and PA2)**
// +17dBm formula: Pout=-14+OutputPower (with PA1 and PA2)**
// +20dBpaym formula: Pout=-11+OutputPower (with PA1 and PA2)** and high power PA settings (section 3.3.7 in datasheet)
// +20dBpaym formula: Pout=-11+OutputPower (with PA1 and PA2)** and high power PA settings (section 3.3.7 in datasheet)
///* 0x11 */ { REG_PALEVEL, RF_PALEVEL_PA0_ON | RF_PALEVEL_PA1_OFF | RF_PALEVEL_PA2_OFF | RF_PALEVEL_OUTPUTPOWER_11111},
///* 0x11 */ { REG_PALEVEL, RF_PALEVEL_PA0_ON | RF_PALEVEL_PA1_OFF | RF_PALEVEL_PA2_OFF | RF_PALEVEL_OUTPUTPOWER_11111},
///* 0x13 */ { REG_OCP, RF_OCP_ON | RF_OCP_TRIM_95 }, //over current protection (default is 95mA)
///* 0x13 */ { REG_OCP, RF_OCP_ON | RF_OCP_TRIM_95 }, //over current protection (default is 95mA)
/* 0x18 */ { REG_LNA, RF_LNA_ZIN_50 | RF_LNA_GAINSELECT_AUTO}, // Not sure which is correct!
/* 0x18 */ { REG_LNA, RF_LNA_ZIN_50 | RF_LNA_GAINSELECT_AUTO}, // Not sure which is correct!
// RXBW defaults are { REG_RXBW, RF_RXBW_DCCFREQ_010 | RF_RXBW_MANT_24 | RF_RXBW_EXP_5} (RxBw: 10.4khz)
// RXBW defaults are { REG_RXBW, RF_RXBW_DCCFREQ_010 | RF_RXBW_MANT_24 | RF_RXBW_EXP_5} (RxBw: 10.4khz)
/* 0x19 */ { REG_RXBW, RF_RXBW_DCCFREQ_010 | RF_RXBW_MANT_20 | RF_RXBW_EXP_4 }, // Use 25 kHz BW (BitRate < 2 * RxBw)
/* 0x19 */ { REG_RXBW, RF_RXBW_DCCFREQ_010 | RF_RXBW_MANT_20 | RF_RXBW_EXP_4 }, // Use 25 kHz BW (BitRate < 2 * RxBw)
/* 0x1A */ { REG_AFCBW, RF_RXBW_DCCFREQ_010 | RF_RXBW_MANT_20 | RF_RXBW_EXP_3 }, // Use double the bandwidth during AFC as reception
/* 0x1A */ { REG_AFCBW, RF_RXBW_DCCFREQ_010 | RF_RXBW_MANT_20 | RF_RXBW_EXP_3 }, // Use double the bandwidth during AFC as reception
/* 0x1B - 0x1D These registers are for OOK. Not used */
/* 0x1B - 0x1D These registers are for OOK. Not used */
/* 0x1E */ { REG_AFCFEI, RF_AFCFEI_AFCAUTOCLEAR_ON | RF_AFCFEI_AFCAUTO_ON },
/* 0x1E */ { REG_AFCFEI, RF_AFCFEI_AFCAUTOCLEAR_ON | RF_AFCFEI_AFCAUTO_ON },
/* 0x1F & 0x20 AFC MSB and LSB values, respectively */
/* 0x1F & 0x20 AFC MSB and LSB values, respectively */
/* 0x21 & 0x22 FEI MSB and LSB values, respectively */
/* 0x21 & 0x22 FEI MSB and LSB values, respectively */
/* 0x23 & 0x24 RSSI MSB and LSB values, respectively */
/* 0x23 & 0x24 RSSI MSB and LSB values, respectively */
/* 0x25 */ { REG_DIOMAPPING1, RF_DIOMAPPING1_DIO0_01 }, //DIO0 is the only IRQ we're using
/* 0x25 */ { REG_DIOMAPPING1, RF_DIOMAPPING1_DIO0_01 }, //DIO0 is the only IRQ we're using
/* 0x26 RegDioMapping2 */
/* 0x26 RegDioMapping2 */
/* 0x27 RegIRQFlags1 */
/* 0x27 RegIRQFlags1 */
/* 0x28 */ { REG_IRQFLAGS2, RF_IRQFLAGS2_FIFOOVERRUN }, // Reset the FIFOs. Fixes a problem I had with bad first packet.
/* 0x28 */ { REG_IRQFLAGS2, RF_IRQFLAGS2_FIFOOVERRUN }, // Reset the FIFOs. Fixes a problem I had with bad first packet.
/* 0x29 */ { REG_RSSITHRESH, 170 }, //must be set to dBm = (-Sensitivity / 2) - default is 0xE4=228 so -114dBm
/* 0x29 */ { REG_RSSITHRESH, 170 }, //must be set to dBm = (-Sensitivity / 2) - default is 0xE4=228 so -114dBm
/* 0x2a & 0x2b RegRxTimeout1 and 2, respectively */
/* 0x2a & 0x2b RegRxTimeout1 and 2, respectively */
/* 0x2c RegPreambleMsb - use zero default */
/* 0x2c RegPreambleMsb - use zero default */
/* 0x2d */ { REG_PREAMBLELSB, 4 }, // Davis has four preamble bytes 0xAAAAAAAA
/* 0x2d */ { REG_PREAMBLELSB, 4 }, // Davis has four preamble bytes 0xAAAAAAAA
/* 0x2e */ { REG_SYNCCONFIG, RF_SYNC_ON | RF_SYNC_FIFOFILL_AUTO | RF_SYNC_SIZE_2 | RF_SYNC_TOL_2 }, // Allow a couple erros in the sync word
/* 0x2e */ { REG_SYNCCONFIG, RF_SYNC_ON | RF_SYNC_FIFOFILL_AUTO | RF_SYNC_SIZE_2 | RF_SYNC_TOL_2 }, // Allow a couple erros in the sync word
/* 0x2f */ { REG_SYNCVALUE1, 0xcb }, // Davis ISS first sync byte. http://madscientistlabs.blogspot.ca/2012/03/first-you-get-sugar.html
/* 0x2f */ { REG_SYNCVALUE1, 0xcb }, // Davis ISS first sync byte. http://madscientistlabs.blogspot.ca/2012/03/first-you-get-sugar.html
/* 0x30 */ { REG_SYNCVALUE2, 0x89 }, // Davis ISS second sync byte.
/* 0x30 */ { REG_SYNCVALUE2, 0x89 }, // Davis ISS second sync byte.
/* 0x31 - 0x36 REG_SYNCVALUE3 - 8 not used */
/* 0x31 - 0x36 REG_SYNCVALUE3 - 8 not used */
/* 0x37 */ { REG_PACKETCONFIG1, RF_PACKET1_FORMAT_FIXED | RF_PACKET1_DCFREE_OFF | RF_PACKET1_CRC_OFF | RF_PACKET1_CRCAUTOCLEAR_OFF | RF_PACKET1_ADRSFILTERING_OFF }, // Fixed packet length and we'll check our own CRC
/* 0x37 */ { REG_PACKETCONFIG1, RF_PACKET1_FORMAT_FIXED | RF_PACKET1_DCFREE_OFF | RF_PACKET1_CRC_OFF | RF_PACKET1_CRCAUTOCLEAR_OFF | RF_PACKET1_ADRSFILTERING_OFF }, // Fixed packet length and we'll check our own CRC
/* 0x38 */ { REG_PAYLOADLENGTH, DAVIS_PACKET_LEN }, // Davis sends 8 bytes of payload, including CRC that we check manually.
/* 0x38 */ { REG_PAYLOADLENGTH, DAVIS_PACKET_LEN }, // Davis sends 8 bytes of payload, including CRC that we check manually.
//* 0x39 */ { REG_NODEADRS, nodeID }, // Turned off because we're not using address filtering
//* 0x39 */ { REG_NODEADRS, nodeID }, // Turned off because we're not using address filtering
//* 0x3a */ { REG_BROADCASTADRS, RF_BROADCASTADDRESS_VALUE }, // Not using this
//* 0x3a */ { REG_BROADCASTADRS, RF_BROADCASTADDRESS_VALUE }, // Not using this
/* 0x3b REG_AUTOMODES - Automatic modes are not used in this implementation. */
/* 0x3b REG_AUTOMODES - Automatic modes are not used in this implementation. */
/* 0x3c */ { REG_FIFOTHRESH, RF_FIFOTHRESH_TXSTART_FIFOTHRESH | 0x07 }, // TX on FIFO having more than seven bytes
/* 0x3c */ { REG_FIFOTHRESH, RF_FIFOTHRESH_TXSTART_FIFOTHRESH | 0x07 }, // TX on FIFO having more than seven bytes
/* 0x3d */ { REG_PACKETCONFIG2, RF_PACKET2_RXRESTARTDELAY_2BITS | RF_PACKET2_AUTORXRESTART_ON | RF_PACKET2_AES_OFF }, //RXRESTARTDELAY must match transmitter PA ramp-down time (bitrate dependent)
/* 0x3d */ { REG_PACKETCONFIG2, RF_PACKET2_RXRESTARTDELAY_2BITS | RF_PACKET2_AUTORXRESTART_ON | RF_PACKET2_AES_OFF }, //RXRESTARTDELAY must match transmitter PA ramp-down time (bitrate dependent)
/* 0x3e - 0x4d AES Key not used in this implementation */
/* 0x3e - 0x4d AES Key not used in this implementation */
/* 0x6F */ { REG_TESTDAGC, RF_DAGC_IMPROVED_LOWBETA0 }, // // TODO: Should use LOWBETA_ON, but having trouble getting it working
/* 0x6F */ { REG_TESTDAGC, RF_DAGC_IMPROVED_LOWBETA0 }, // // TODO: Should use LOWBETA_ON, but having trouble getting it working
/* 0x71 */ { REG_TESTAFC, 0 }, // AFC Offset for low mod index systems
/* 0x71 */ { REG_TESTAFC, 0 }, // AFC Offset for low mod index systems
{255, 0}
{255, 0}
};
};
digitalWrite(_slaveSelectPin, HIGH);
pinMode(_slaveSelectPin, OUTPUT);
pinMode(_slaveSelectPin, OUTPUT);
SPI.setDataMode(SPI_MODE0);
SPI.setDataMode(SPI_MODE0);
SPI.setBitOrder(MSBFIRST);
SPI.setBitOrder(MSBFIRST);
SPI.setClockDivider(SPI_CLOCK_DIV2); //max speed, except on Due which can run at system clock speed
SPI.setClockDivider(SPI_CLOCK_DIV4); //max speed, except on Due which can run at system clock speed
SPI.begin();
SPI.begin();
do writeReg(REG_SYNCVALUE1, 0xaa); while (readReg(REG_SYNCVALUE1) != 0xaa);
do writeReg(REG_SYNCVALUE1, 0xaa); while (readReg(REG_SYNCVALUE1) != 0xaa);
do writeReg(REG_SYNCVALUE1, 0x55); while (readReg(REG_SYNCVALUE1) != 0x55);
do writeReg(REG_SYNCVALUE1, 0x55); while (readReg(REG_SYNCVALUE1) != 0x55);
for (byte i = 0; CONFIG[i][0] != 255; i++)
for (byte i = 0; CONFIG[i][0] != 255; i++)
writeReg(CONFIG[i][0], CONFIG[i][1]);
writeReg(CONFIG[i][0], CONFIG[i][1]);
setHighPower(_isRFM69HW); //called regardless if it's a RFM69W or RFM69HW
setHighPower(_isRFM69HW); //called regardless if it's a RFM69W or RFM69HW
setMode(RF69_MODE_STANDBY);
setMode(RF69_MODE_STANDBY);
while ((readReg(REG_IRQFLAGS1) & RF_IRQFLAGS1_MODEREADY) == 0x00); // Wait for ModeReady
while ((readReg(REG_IRQFLAGS1) & RF_IRQFLAGS1_MODEREADY) == 0x00); // Wait for ModeReady
attachInterrupt(0, DavisRFM69::isr0, RISING);
attachInterrupt(_interruptNum, DavisRFM69::isr0, RISING);
selfPointer = this;
selfPointer = this;
return true;
}
}
void DavisRFM69::interruptHandler() {
void DavisRFM69::interruptHandler() {
RSSI = readRSSI(); // Read up front when it is most likely the carrier is still up
RSSI = readRSSI(); // Read up front when it is most likely the carrier is still up
if (_mode == RF69_MODE_RX && (readReg(REG_IRQFLAGS2) & RF_IRQFLAGS2_PAYLOADREADY))
if (_mode == RF69_MODE_RX && (readReg(REG_IRQFLAGS2) & RF_IRQFLAGS2_PAYLOADREADY))
{
{
setMode(RF69_MODE_STANDBY);
setMode(RF69_MODE_STANDBY);
select(); // Select RFM69 module, disabling interrupts
select(); // Select RFM69 module, disabling interrupts
SPI.transfer(REG_FIFO & 0x7f);
SPI.transfer(REG_FIFO & 0x7f);
for (byte i = 0; i < DAVIS_PACKET_LEN; i++) DATA[i] = reverseBits(SPI.transfer(0));
for (byte i = 0; i < DAVIS_PACKET_LEN; i++) DATA[i] = reverseBits(SPI.transfer(0));
_packetReceived = true;
_packetReceived = true;
unselect(); // Unselect RFM69 module, enabling interrupts
unselect(); // Unselect RFM69 module, enabling interrupts
}
}
}
}
bool DavisRFM69::canSend()
bool DavisRFM69::canSend()
{
{
if (_mode == RF69_MODE_RX && readRSSI() < CSMA_LIMIT) //if signal stronger than -100dBm is detected assume channel activity
if (_mode == RF69_MODE_RX && readRSSI() < CSMA_LIMIT) //if signal stronger than -100dBm is detected assume channel activity
{
{
setMode(RF69_MODE_STANDBY);
setMode(RF69_MODE_STANDBY);
return true;
return true;
}
}
return false;
return false;
}
}
void DavisRFM69::send(const void* buffer, byte bufferSize)
void DavisRFM69::send(const void* buffer, byte bufferSize)
{
{
writeReg(REG_PACKETCONFIG2, (readReg(REG_PACKETCONFIG2) & 0xFB) | RF_PACKET2_RXRESTART); // avoid RX deadlocks
writeReg(REG_PACKETCONFIG2, (readReg(REG_PACKETCONFIG2) & 0xFB) | RF_PACKET2_RXRESTART); // avoid RX deadlocks
while (!canSend()) receiveDone();
while (!canSend()) receiveDone();
sendFrame(buffer, bufferSize);
sendFrame(buffer, bufferSize);
}
}
void DavisRFM69::sendFrame(const void* buffer, byte bufferSize)
void DavisRFM69::sendFrame(const void* buffer, byte bufferSize)
{
{
setMode(RF69_MODE_STANDBY); //turn off receiver to prevent reception while filling fifo
setMode(RF69_MODE_STANDBY); //turn off receiver to prevent reception while filling fifo
while ((readReg(REG_IRQFLAGS1) & RF_IRQFLAGS1_MODEREADY) == 0x00); // Wait for ModeReady
while ((readReg(REG_IRQFLAGS1) & RF_IRQFLAGS1_MODEREADY) == 0x00); // Wait for ModeReady
writeReg(REG_DIOMAPPING1, RF_DIOMAPPING1_DIO0_00); // DIO0 is "Packet Sent"
writeReg(REG_DIOMAPPING1, RF_DIOMAPPING1_DIO0_00); // DIO0 is "Packet Sent"
if (bufferSize > DAVIS_PACKET_LEN) bufferSize = DAVIS_PACKET_LEN;
if (bufferSize > DAVIS_PACKET_LEN) bufferSize = DAVIS_PACKET_LEN;
unsigned int crc = crc16_ccitt((volatile byte *)buffer, 6);
unsigned int crc = crc16_ccitt((volatile byte *)buffer, 6);
//write to FIFO
//write to FIFO
select();
select();
SPI.transfer(REG_FIFO | 0x80);
SPI.transfer(REG_FIFO | 0x80);
for (byte i = 0; i < bufferSize; i++)
for (byte i = 0; i < bufferSize; i++)
SPI.transfer(reverseBits(((byte*)buffer)[i]));
SPI.transfer(reverseBits(((byte*)buffer)[i]));
SPI.transfer(reverseBits(crc >> 8));
SPI.transfer(reverseBits(crc >> 8));
SPI.transfer(reverseBits(crc & 0xff));
SPI.transfer(reverseBits(crc & 0xff));
unselect();
unselect();
/* no need to wait for transmit mode to be ready since its handled by the radio */
/* no need to wait for transmit mode to be ready since its handled by the radio */
setMode(RF69_MODE_TX);
setMode(RF69_MODE_TX);
while (digitalRead(_interruptPin) == 0); //wait for DIO0 to turn HIGH signalling transmission finish
while (digitalRead(_interruptPin) == 0); //wait for DIO0 to turn HIGH signalling transmission finish
//while (readReg(REG_IRQFLAGS2) & RF_IRQFLAGS2_PACKETSENT == 0x00); // Wait for ModeReady
//while (readReg(REG_IRQFLAGS2) & RF_IRQFLAGS2_PACKETSENT == 0x00); // Wait for ModeReady
setMode(RF69_MODE_STANDBY);
setMode(RF69_MODE_STANDBY);
}
}
void DavisRFM69::setChannel(byte channel)
void DavisRFM69::setChannel(byte channel)
{
{
CHANNEL = channel;
CHANNEL = channel;
if (CHANNEL > DAVIS_FREQ_TABLE_LENGTH - 1) CHANNEL = 0;
if (CHANNEL > DAVIS_FREQ_TABLE_LENGTH - 1) CHANNEL = 0;
writeReg(REG_FRFMSB, pgm_read_byte(&FRF[CHANNEL][0]));
writeReg(REG_FRFMSB, pgm_read_byte(&FRF[CHANNEL][0]));
writeReg(REG_FRFMID, pgm_read_byte(&FRF[CHANNEL][1]));
writeReg(REG_FRFMID, pgm_read_byte(&FRF[CHANNEL][1]));
writeReg(REG_FRFLSB, pgm_read_byte(&FRF[CHANNEL][2]));
writeReg(REG_FRFLSB, pgm_read_byte(&FRF[CHANNEL][2]));
receiveBegin();
receiveBegin();
}
}
void DavisRFM69::hop()
void DavisRFM69::hop()
{
{
setChannel(++CHANNEL);
setChannel(++CHANNEL);
}
}
// The data bytes come over the air from the ISS least significant bit first. Fix them as we go. From
// The data bytes come over the air from the ISS least significant bit first. Fix them as we go. From
// http://www.ocf.berkeley.edu/~wwu/cgi-bin/yabb/YaBB.cgi?board=riddles_cs;action=display;num=1103355188
// http://www.ocf.berkeley.edu/~wwu/cgi-bin/yabb/YaBB.cgi?board=riddles_cs;action=display;num=1103355188
byte DavisRFM69::reverseBits(byte b)
byte DavisRFM69::reverseBits(byte b)
{
{
b = ((b & 0b11110000) >>4 ) | ((b & 0b00001111) << 4);
b = ((b & 0b11110000) >>4 ) | ((b & 0b00001111) << 4);
b = ((b & 0b11001100) >>2 ) | ((b & 0b00110011) << 2);
b = ((b & 0b11001100) >>2 ) | ((b & 0b00110011) << 2);
b = ((b & 0b10101010) >>1 ) | ((b & 0b01010101) << 1);
b = ((b & 0b10101010) >>1 ) | ((b & 0b01010101) << 1);
return(b);
return(b);
}
}
// Davis CRC calculation from http://www.menie.org/georges/embedded/
// Davis CRC calculation from http://www.menie.org/georges/embedded/
unsigned int DavisRFM69::crc16_ccitt(volatile byte *buf, byte len, unsigned int initCrc)
unsigned int DavisRFM69::crc16_ccitt(volatile byte *buf, byte len, unsigned int initCrc)
{
{
unsigned int crc = initCrc;
unsigned int crc = initCrc;
while( len-- ) {
while( len-- ) {
int i;
int i;
crc ^= *(char *)buf++ << 8;
crc ^= *(char *)buf++ << 8;
for( i = 0; i < 8; ++i ) {
for( i = 0; i < 8; ++i ) {
if( crc & 0x8000 )
if( crc & 0x8000 )
crc = (crc << 1) ^ 0x1021;
crc = (crc << 1) ^ 0x1021;
else
else
crc = crc << 1;
crc = crc << 1;
}
}
}
}
return crc;
return crc;
}
}
void DavisRFM69::setFrequency(uint32_t FRF)
void DavisRFM69::setFrequency(uint32_t FRF)
{
{
writeReg(REG_FRFMSB, FRF >> 16);
writeReg(REG_FRFMSB, FRF >> 16);
writeReg(REG_FRFMID, FRF >> 8);
writeReg(REG_FRFMID, FRF >> 8);
writeReg(REG_FRFLSB, FRF);
writeReg(REG_FRFLSB, FRF);
}
}
void DavisRFM69::setMode(byte newMode)
void DavisRFM69::setMode(byte newMode)
{
{
//Serial.println(newMode);
//Serial.println(newMode);
if (newMode == _mode) return;
if (newMode == _mode) return;
switch (newMode) {
switch (newMode) {
case RF69_MODE_TX:
case RF69_MODE_TX:
writeReg(REG_OPMODE, (readReg(REG_OPMODE) & 0xE3) | RF_OPMODE_TRANSMITTER);
writeReg(REG_OPMODE, (readReg(REG_OPMODE) & 0xE3) | RF_OPMODE_TRANSMITTER);
if (_isRFM69HW) setHighPowerRegs(true);
if (_isRFM69HW) setHighPowerRegs(true);
break;
break;
case RF69_MODE_RX:
case RF69_MODE_RX:
writeReg(REG_OPMODE, (readReg(REG_OPMODE) & 0xE3) | RF_OPMODE_RECEIVER);
writeReg(REG_OPMODE, (readReg(REG_OPMODE) & 0xE3) | RF_OPMODE_RECEIVER);
if (_isRFM69HW) setHighPowerRegs(false);
if (_isRFM69HW) setHighPowerRegs(false);
break;
break;
case RF69_MODE_SYNTH:
case RF69_MODE_SYNTH:
writeReg(REG_OPMODE, (readReg(REG_OPMODE) & 0xE3) | RF_OPMODE_SYNTHESIZER);
writeReg(REG_OPMODE, (readReg(REG_OPMODE) & 0xE3) | RF_OPMODE_SYNTHESIZER);
break;
break;
case RF69_MODE_STANDBY:
case RF69_MODE_STANDBY:
writeReg(REG_OPMODE, (readReg(REG_OPMODE) & 0xE3) | RF_OPMODE_STANDBY);
writeReg(REG_OPMODE, (readReg(REG_OPMODE) & 0xE3) | RF_OPMODE_STANDBY);
break;
break;
case RF69_MODE_SLEEP:
case RF69_MODE_SLEEP:
writeReg(REG_OPMODE, (readReg(REG_OPMODE) & 0xE3) | RF_OPMODE_SLEEP);
writeReg(REG_OPMODE, (readReg(REG_OPMODE) & 0xE3) | RF_OPMODE_SLEEP);
break;
break;
default: return;
default: return;
}
}
// we are using packet mode, so this check is not really needed
// we are using packet mode, so this check is not really needed
// but waiting for mode ready is necessary when going from sleep because the FIFO may not be immediately available from previous mode
// but waiting for mode ready is necessary when going from sleep because the FIFO may not be immediately available from previous mode
while (_mode == RF69_MODE_SLEEP && (readReg(REG_IRQFLAGS1) & RF_IRQFLAGS1_MODEREADY) == 0x00); // Wait for ModeReady
while (_mode == RF69_MODE_SLEEP && (readReg(REG_IRQFLAGS1) & RF_IRQFLAGS1_MODEREADY) == 0x00); // Wait for ModeReady
_mode = newMode;
_mode = newMode;
//Serial.print("Mode set to ");
//Serial.print("Mode set to ");
//Serial.println(_mode);
//Serial.println(_mode);
}
}
void DavisRFM69::sleep() {
void DavisRFM69::sleep() {
setMode(RF69_MODE_SLEEP);
setMode(RF69_MODE_SLEEP);
}
}
void DavisRFM69::isr0() { selfPointer->interruptHandler(); }
void DavisRFM69::isr0() { selfPointer->interruptHandler(); }
void DavisRFM69::receiveBegin() {
void DavisRFM69::receiveBegin() {
_packetReceived = false;
_packetReceived = false;
if (readReg(REG_IRQFLAGS2) & RF_IRQFLAGS2_PAYLOADREADY)
if (readReg(REG_IRQFLAGS2) & RF_IRQFLAGS2_PAYLOADREADY)
writeReg(REG_PACKETCONFIG2, (readReg(REG_PACKETCONFIG2) & 0xFB) | RF_PACKET2_RXRESTART); // avoid RX deadlocks
writeReg(REG_PACKETCONFIG2, (readReg(REG_PACKETCONFIG2) & 0xFB) | RF_PACKET2_RXRESTART); // avoid RX deadlocks
writeReg(REG_DIOMAPPING1, RF_DIOMAPPING1_DIO0_01); //set DIO0 to "PAYLOADREADY" in receive mode
writeReg(REG_DIOMAPPING1, RF_DIOMAPPING1_DIO0_01); //set DIO0 to "PAYLOADREADY" in receive mode
setMode(RF69_MODE_RX);
setMode(RF69_MODE_RX);
}
}
bool DavisRFM69::receiveDone() {
bool DavisRFM69::receiveDone() {
return _packetReceived;
return _packetReceived;
}
}
int DavisRFM69::readRSSI(bool forceTrigger) {
int DavisRFM69::readRSSI(bool forceTrigger) {
int rssi = 0;
int rssi = 0;
if (forceTrigger)
if (forceTrigger)
{
{
//RSSI trigger not needed if DAGC is in continuous mode
//RSSI trigger not needed if DAGC is in continuous mode
writeReg(REG_RSSICONFIG, RF_RSSI_START);
writeReg(REG_RSSICONFIG, RF_RSSI_START);
while ((readReg(REG_RSSICONFIG) & RF_RSSI_DONE) == 0x00); // Wait for RSSI_Ready
while ((readReg(REG_RSSICONFIG) & RF_RSSI_DONE) == 0x00); // Wait for RSSI_Ready
}
}
rssi = -readReg(REG_RSSIVALUE);
rssi = -readReg(REG_RSSIVALUE);
rssi >>= 1;
rssi >>= 1;
return rssi;
return rssi;
}
}
byte DavisRFM69::readReg(byte addr)
byte DavisRFM69::readReg(byte addr)
{
{
select();
select();
SPI.transfer(addr & 0x7F);
SPI.transfer(addr & 0x7F);
byte regval = SPI.transfer(0);
byte regval = SPI.transfer(0);
unselect();
unselect();
return regval;
return regval;
}
}
void DavisRFM69::writeReg(byte addr, byte value)
void DavisRFM69::writeReg(byte addr, byte value)
{
{
select();
select();
SPI.transfer(addr | 0x80);
SPI.transfer(addr | 0x80);
SPI.transfer(value);
SPI.transfer(value);
unselect();
unselect();
}
}
/// Select the transceiver
/// Select the transceiver
void DavisRFM69::select() {
void DavisRFM69::select() {
noInterrupts();
noInterrupts();
digitalWrite(_slaveSelectPin, LOW);
digitalWrite(_slaveSelectPin, LOW);
}
}
/// Unselect the transceiver chip
/// Unselect the transceiver chip
void DavisRFM69::unselect() {
void DavisRFM69::unselect() {
digitalWrite(_slaveSelectPin, HIGH);
digitalWrite(_slaveSelectPin, HIGH);
interrupts();
interrupts();
}
}
void DavisRFM69::setHighPower(bool onOff) {
void DavisRFM69::setHighPower(bool onOff) {
_isRFM69HW = onOff;
_isRFM69HW = onOff;
writeReg(REG_OCP, _isRFM69HW ? RF_OCP_OFF : RF_OCP_ON);
writeReg(REG_OCP, _isRFM69HW ? RF_OCP_OFF : RF_OCP_ON);
if (_isRFM69HW) //turning ON
if (_isRFM69HW) //turning ON
writeReg(REG_PALEVEL, (readReg(REG_PALEVEL) & 0x1F) | RF_PALEVEL_PA1_ON | RF_PALEVEL_PA2_ON); //enable P1 & P2 amplifier stages
writeReg(REG_PALEVEL, (readReg(REG_PALEVEL) & 0x1F) | RF_PALEVEL_PA1_ON | RF_PALEVEL_PA2_ON); //enable P1 & P2 amplifier stages
else
else
writeReg(REG_PALEVEL, RF_PALEVEL_PA0_ON | RF_PALEVEL_PA1_OFF | RF_PALEVEL_PA2_OFF | _powerLevel); //enable P0 only
writeReg(REG_PALEVEL, RF_PALEVEL_PA0_ON | RF_PALEVEL_PA1_OFF | RF_PALEVEL_PA2_OFF | _powerLevel); //enable P0 only
}
}
void DavisRFM69::setHighPowerRegs(bool onOff) {
void DavisRFM69::setHighPowerRegs(bool onOff) {
writeReg(REG_TESTPA1, onOff ? 0x5D : 0x55);
writeReg(REG_TESTPA1, onOff ? 0x5D : 0x55);
writeReg(REG_TESTPA2, onOff ? 0x7C : 0x70);
writeReg(REG_TESTPA2, onOff ? 0x7C : 0x70);
}
}
void DavisRFM69::setCS(byte newSPISlaveSelect) {
void DavisRFM69::setCS(byte newSPISlaveSelect) {
_slaveSelectPin = newSPISlaveSelect;
_slaveSelectPin = newSPISlaveSelect;
digitalWrite(_slaveSelectPin, HIGH);
pinMode(_slaveSelectPin, OUTPUT);
pinMode(_slaveSelectPin, OUTPUT);
}
}
//for debugging
//for debugging
void DavisRFM69::readAllRegs()
void DavisRFM69::readAllRegs()
{
{
byte regVal;
byte regVal;
for (byte regAddr = 1; regAddr <= 0x4F; regAddr++)
for (byte regAddr = 1; regAddr <= 0x4F; regAddr++)
{
{
select();
select();
SPI.transfer(regAddr & 0x7f); // send address + r/w bit
SPI.transfer(regAddr & 0x7f); // send address + r/w bit
regVal = SPI.transfer(0);
regVal = SPI.transfer(0);
unselect();
unselect();
Serial.print(regAddr, HEX);
Serial.print(regAddr, HEX);
Serial.print(" - ");
Serial.print(" - ");
Serial.print(regVal,HEX);
Serial.print(regVal,HEX);
Serial.print(" - ");
Serial.print(" - ");
Serial.println(regVal,BIN);
Serial.println(regVal,BIN);
}
}
unselect();
unselect();
}
}
byte DavisRFM69::readTemperature(byte calFactor) //returns centigrade
byte DavisRFM69::readTemperature(byte calFactor) //returns centigrade
{
{
setMode(RF69_MODE_STANDBY);
setMode(RF69_MODE_STANDBY);
writeReg(REG_TEMP1, RF_TEMP1_MEAS_START);
writeReg(REG_TEMP1, RF_TEMP1_MEAS_START);
while ((readReg(REG_TEMP1) & RF_TEMP1_MEAS_RUNNING)) Serial.print('*');
while ((readReg(REG_TEMP1) & RF_TEMP1_MEAS_RUNNING)) Serial.print('*');
return ~readReg(REG_TEMP2) + COURSE_TEMP_COEF + calFactor; //'complement'corrects the slope, rising temp = rising val
return ~readReg(REG_TEMP2) + COURSE_TEMP_COEF + calFactor; //'complement'corrects the slope, rising temp = rising val
} // COURSE_TEMP_COEF puts reading in the ballpark, user can add additional correction
} // COURSE_TEMP_COEF puts reading in the ballpark, user can add additional correction
void DavisRFM69::rcCalibration()
void DavisRFM69::rcCalibration()
{
{
writeReg(REG_OSC1, RF_OSC1_RCCAL_START);
writeReg(REG_OSC1, RF_OSC1_RCCAL_START);
while ((readReg(REG_OSC1) & RF_OSC1_RCCAL_DONE) == 0x00);
while ((readReg(REG_OSC1) & RF_OSC1_RCCAL_DONE) == 0x00);
}
}