Untitled Diff

Created Diff never expires
30 removals
269 lines
27 additions
268 lines
; Assembly listing for method Burgers:GetCalculated0(int,int,double,double,double,System.Double[]):System.Double[]
; Assembly listing for method Burgers:GetCalculated0(int,int,double,double,double,System.Double[]):System.Double[]
; Emitting BLENDED_CODE for X64 CPU with AVX - Unix
; Emitting BLENDED_CODE for X64 CPU with AVX - Unix
; optimized code
; optimized code
; rbp based frame
; rbp based frame
; fully interruptible
; fully interruptible
; No matching PGO data
; No matching PGO data
; Final local variable assignments
; Final local variable assignments
;
;
; V00 arg0 [V00,T13] ( 4, 7 ) int -> r14 single-def
; V00 arg0 [V00,T13] ( 4, 7 ) int -> r14 single-def
; V01 arg1 [V01,T10] ( 5, 11 ) int -> rbx single-def
; V01 arg1 [V01,T10] ( 5, 11 ) int -> rbx single-def
; V02 arg2 [V02,T19] ( 6, 27 ) double -> [rbp-30H] single-def
; V02 arg2 [V02,T19] ( 6, 27 ) double -> [rbp-30H] single-def
; V03 arg3 [V03,T20] ( 6, 27 ) double -> [rbp-38H] single-def
; V03 arg3 [V03,T20] ( 6, 27 ) double -> [rbp-38H] single-def
; V04 arg4 [V04,T29] ( 3, 3 ) double -> [rbp-40H] single-def
; V04 arg4 [V04,T29] ( 3, 3 ) double -> [rbp-40H] single-def
; V05 arg5 [V05,T15] ( 3, 3 ) ref -> r15 class-hnd single-def
; V05 arg5 [V05,T15] ( 3, 3 ) ref -> r15 class-hnd single-def
; V06 loc0 [V06,T07] ( 8, 32 ) ref -> r13 class-hnd exact single-def
; V06 loc0 [V06,T07] ( 8, 32 ) ref -> r13 class-hnd exact single-def
; V07 loc1 [V07,T11] ( 4, 13 ) int -> r15
; V07 loc1 [V07,T11] ( 4, 13 ) int -> r15
; V08 loc2 [V08,T01] ( 13, 88 ) ref -> [rbp-60H] class-hnd exact spill-single-def
; V08 loc2 [V08,T01] ( 13, 88 ) ref -> [rbp-60H] class-hnd exact spill-single-def
; V09 loc3 [V09,T00] ( 8,116 ) int -> rax
; V09 loc3 [V09,T00] ( 8,116 ) int -> rax
;# V10 OutArgs [V10 ] ( 1, 1 ) lclBlk ( 0) [rsp+00H] "OutgoingArgSpace"
;# V10 OutArgs [V10 ] ( 1, 1 ) lclBlk ( 0) [rsp+00H] "OutgoingArgSpace"
; V11 tmp1 [V11,T17] ( 2, 64 ) double -> mm0 "Strict ordering of exceptions for Array store"
; V11 tmp1 [V11,T17] ( 2, 64 ) double -> mm0 "Strict ordering of exceptions for Array store"
; V12 tmp2 [V12,T25] ( 2, 16 ) double -> mm0 "Strict ordering of exceptions for Array store"
; V12 tmp2 [V12,T25] ( 2, 16 ) double -> mm0 "Strict ordering of exceptions for Array store"
; V13 tmp3 [V13,T26] ( 2, 16 ) double -> mm0 "Strict ordering of exceptions for Array store"
; V13 tmp3 [V13,T26] ( 2, 16 ) double -> mm0 "Strict ordering of exceptions for Array store"
; V14 cse0 [V14,T22] ( 4, 25 ) double -> [rbp-48H] "CSE - aggressive"
; V14 cse0 [V14,T21] ( 4, 25 ) double -> [rbp-48H] "CSE - aggressive"
; V15 cse1 [V15,T18] ( 3, 48 ) double -> mm5 "CSE - aggressive"
; V15 cse1 [V15,T18] ( 3, 48 ) double -> mm5 "CSE - aggressive"
; V16 cse2 [V16,T23] ( 5, 20 ) double -> mm0 "CSE - aggressive"
; V16 cse2 [V16,T22] ( 6, 24 ) double -> mm0 "CSE - aggressive"
; V17 cse3 [V17,T27] ( 3, 12 ) double -> mm4 "CSE - aggressive"
; V17 cse3 [V17,T27] ( 3, 12 ) double -> mm4 "CSE - aggressive"
; V18 cse4 [V18,T28] ( 3, 12 ) double -> mm5 "CSE - aggressive"
; V18 cse4 [V18,T28] ( 3, 12 ) double -> mm5 "CSE - aggressive"
; V19 cse5 [V19,T16] ( 5, 80 ) double -> mm0 "CSE - aggressive"
; V19 cse5 [V19,T16] ( 5, 80 ) double -> mm0 "CSE - aggressive"
; V20 cse6 [V20,T24] ( 5, 20 ) double -> mm0 "CSE - aggressive"
; V20 cse6 [V20,T23] ( 5, 20 ) double -> mm0 "CSE - aggressive"
; V21 cse7 [V21,T09] ( 4, 16 ) long -> rax "CSE - aggressive"
; V21 cse7 [V21,T09] ( 4, 16 ) long -> rax "CSE - aggressive"
; V22 cse8 [V22,T02] ( 9, 72 ) int -> rdx "CSE - aggressive"
; V22 cse8 [V22,T02] ( 9, 72 ) int -> rdx "CSE - aggressive"
; V23 cse9 [V23,T06] ( 6, 36 ) int -> rdi "CSE - aggressive"
; V23 cse9 [V23,T06] ( 6, 36 ) int -> rdi "CSE - aggressive"
; V24 cse10 [V24,T21] ( 5, 26 ) double -> [rbp-50H] spill-single-def "CSE - aggressive"
; V24 cse10 [V24,T04] ( 3, 48 ) int -> r9 "CSE - aggressive"
; V25 cse11 [V25,T04] ( 3, 48 ) int -> r9 "CSE - aggressive"
; V25 cse11 [V25,T24] ( 3, 18 ) double -> [rbp-50H] spill-single-def "CSE - aggressive"
; V26 cse12 [V26,T03] ( 4, 64 ) int -> r9 "CSE - aggressive"
; V26 cse12 [V26,T03] ( 4, 64 ) int -> r9 "CSE - aggressive"
; V27 cse13 [V27,T08] ( 6, 30 ) int -> [rbp-54H] spill-single-def "CSE - aggressive"
; V27 cse13 [V27,T08] ( 6, 30 ) int -> [rbp-54H] spill-single-def "CSE - aggressive"
; V28 cse14 [V28,T12] ( 3, 12 ) int -> r8 "CSE - aggressive"
; V28 cse14 [V28,T12] ( 3, 12 ) int -> r8 "CSE - aggressive"
; V29 cse15 [V29,T05] ( 3, 48 ) long -> r8 "CSE - aggressive"
; V29 cse15 [V29,T05] ( 3, 48 ) long -> r8 "CSE - aggressive"
; V30 cse16 [V30,T14] ( 3, 6 ) long -> r12 "CSE - aggressive"
; V30 cse16 [V30,T14] ( 3, 6 ) long -> r12 "CSE - aggressive"
; V31 rat0 [V31,T30] ( 2, 4 ) double -> mm0 "argument with side effect"
; V31 rat0 [V31,T30] ( 2, 4 ) double -> mm0 "argument with side effect"
; V32 rat1 [V32,T31] ( 2, 4 ) double -> mm4 "argument with side effect"
; V32 rat1 [V32,T31] ( 2, 4 ) double -> mm4 "argument with side effect"
;
;
; Lcl frame size = 56
; Lcl frame size = 56


G_M27330_IG01: ; gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG
G_M27330_IG01: ; gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG
push rbp
push rbp
push r15
push r15
push r14
push r14
push r13
push r13
push r12
push r12
push rbx
push rbx
sub rsp, 56
sub rsp, 56
vzeroupper
vzeroupper
lea rbp, [rsp+60H]
lea rbp, [rsp+60H]
mov r14d, edi
mov r14d, edi
mov ebx, esi
mov ebx, esi
mov r15, rdx
mov r15, rdx
; gcrRegs +[r15]
; gcrRegs +[r15]
vmovsd qword ptr [rbp-30H], xmm0
vmovsd qword ptr [rbp-30H], xmm0
vmovsd qword ptr [rbp-38H], xmm1
vmovsd qword ptr [rbp-38H], xmm1
vmovsd qword ptr [rbp-40H], xmm2
vmovsd qword ptr [rbp-40H], xmm2
;; bbWeight=1 PerfScore 10.00
;; bbWeight=1 PerfScore 10.00
G_M27330_IG02: ; gcrefRegs=00008000 {r15}, byrefRegs=00000000 {}, byref
G_M27330_IG02: ; gcrefRegs=00008000 {r15}, byrefRegs=00000000 {}, byref
movsxd r12, ebx
movsxd r12, ebx
mov rsi, r12
mov rsi, r12
mov rdi, 0xD1FFAB1E ; System.Double[]
mov rdi, 0xD1FFAB1E ; System.Double[]
call CORINFO_HELP_NEWARR_1_VC
call CORINFO_HELP_NEWARR_1_VC
; gcrRegs +[rax]
; gcrRegs +[rax]
; gcr arg pop 0
; gcr arg pop 0
mov r13, rax
mov r13, rax
; gcrRegs +[r13]
; gcrRegs +[r13]
mov eax, dword ptr [r13+8]
mov eax, dword ptr [r13+8]
; gcrRegs -[rax]
; gcrRegs -[rax]
mov dword ptr [rbp-54H], eax
mov dword ptr [rbp-54H], eax
mov edx, eax
mov edx, eax
mov rdi, r15
mov rdi, r15
; gcrRegs +[rdi]
; gcrRegs +[rdi]
mov rsi, r13
mov rsi, r13
; gcrRegs +[rsi]
; gcrRegs +[rsi]
call hackishModuleName:hackishMethodName()
call hackishModuleName:hackishMethodName()
; gcrRegs -[rsi rdi r15]
; gcrRegs -[rsi rdi r15]
; gcr arg pop 0
; gcr arg pop 0
xor r15d, r15d
xor r15d, r15d
test r14d, r14d
test r14d, r14d
jle G_M27330_IG07
jle G_M27330_IG07
vmovsd xmm1, qword ptr [rbp-38H]
vmovsd xmm1, qword ptr [rbp-38H]
vmulsd xmm0, xmm1, qword ptr [rbp-40H]
vmulsd xmm0, xmm1, qword ptr [rbp-40H]
vdivsd xmm0, xmm0, qword ptr [rbp-30H]
vdivsd xmm0, xmm0, qword ptr [rbp-30H]
vmovsd xmm3, qword ptr [reloc @RWD00]
vmovsd xmm3, qword ptr [reloc @RWD00]
vmovsd qword ptr [rbp-50H], xmm3
vmovsd qword ptr [rbp-50H], xmm3
vmovaps xmm4, xmm3
vmovaps xmm4, xmm3
vmovaps xmm1, xmm4
vmovaps xmm1, xmm4
call hackishModuleName:hackishMethodName()
call hackishModuleName:hackishMethodName()
; gcr arg pop 0
; gcr arg pop 0
vmovsd qword ptr [rbp-48H], xmm0
vmovsd qword ptr [rbp-48H], xmm0
;; bbWeight=1 PerfScore 33.75
;; bbWeight=1 PerfScore 33.75
G_M27330_IG03: ; gcrefRegs=00002000 {r13}, byrefRegs=00000000 {}, byref, isz
G_M27330_IG03: ; gcrefRegs=00002000 {r13}, byrefRegs=00000000 {}, byref, isz
mov rsi, r12
mov rsi, r12
mov rdi, 0xD1FFAB1E ; System.Double[]
mov rdi, 0xD1FFAB1E ; System.Double[]
call CORINFO_HELP_NEWARR_1_VC
call CORINFO_HELP_NEWARR_1_VC
; gcrRegs +[rax]
; gcrRegs +[rax]