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作成日 差分は期限切れになりません
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*CMOS inverter https://electronics.stackexchange.com/questions/383552/measurement-of-output-impedance-of-a-cmos-inverter
*CMOS inverter https://electronics.stackexchange.com/questions/383552/measurement-of-output-impedance-of-a-cmos-inverter
.PARAM V_SUPPLY = 3.3
.PARAM V_SUPPLY = 3.3
.PARAM AC_POINTS = 10
.PARAM AC_POINTS = 10
.PARAM AC_START = 1000
.PARAM AC_START = 1000
.PARAM AC_STOP = 1E6
.PARAM AC_STOP = 1E6
VDD VDD 0 'V_SUPPLY'
VDD VDD 0 'V_SUPPLY'
VSS VSS 0 0
VSS VSS 0 0
MP OUT IN VDD VDD P1 W='9.987275E-06' L=3.500000E-07
MP OUT IN VDD VDD P1 W='9.987275E-06' L=3.500000E-07
MN OUT IN VSS VSS N1 W='9.987275E-06/2' L=3.500000E-07
MN OUT IN VSS VSS N1 W='9.987275E-06/2' L=3.500000E-07
CIN IN VSS 1E9
CIN IN VSS 1E9
Rf OUT IN 1E9
Rf OUT IN 1E9
IOUT VSS OUT AC 1
IOUT VSS OUT AC 1
.AC dec 'AC_POINTS' 'AC_START' 'AC_STOP'
.OPTION POST PROBE ACCURATE
.OPTION POST PROBE ACCURATE
.include modelcard.nmos
.include modelcard.nmos
.include modelcard.pmos
.include modelcard.pmos
.MEASURE AC Zac_power0 rms par('abs(i(vdd))*v(vdd)')
.control
.measure AC ZROUT1 rms par('v(OUT)/abs(i(VSS))')
*AC dec 'AC_POINTS' 'AC_START' 'AC_STOP'
.end
AC dec 10 1000 1E6
let ROUT=OUT/abs(i(VSS))
plot ROUT
print ROUT > ROUT.log
.endc
.END