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7 removals
22 lines
1 addition
16 lines
genLowcodeAlloca32
genLowcodeAlloca32
<option: #LowcodeVM> "Lowcode instruction generator"
<option: #LowcodeVM> "Lowcode instruction generator"
| size |
| size |


(size := backEnd availableRegisterOrNoneFor: self liveRegisters) = NoReg ifTrue:
self allocateOneRegisterForLowcodeInto: [:reg| size := reg].
[self ssAllocateRequiredReg:
(size := optStatus isReceiverResultRegLive
ifTrue: [Arg0Reg]
ifFalse: [ReceiverResultReg])].
size = ReceiverResultReg ifTrue:
[ optStatus isReceiverResultRegLive: false ].
self ssNativeTop nativePopToReg: size.
self ssNativeTop nativePopToReg: size.
self ssNativePop: 1.
self ssNativePop: 1.


self MoveAw: coInterpreter nativeStackPointerAddress R: TempReg.
self MoveAw: coInterpreter nativeStackPointerAddress R: TempReg.
self SubR: size R: TempReg.
self SubR: size R: TempReg.
self AndCq: -16 R: TempReg.
self AndCq: -16 R: TempReg.
self MoveR: TempReg R: size.
self MoveR: TempReg R: size.
self MoveR: size Aw: coInterpreter nativeStackPointerAddress.
self MoveR: size Aw: coInterpreter nativeStackPointerAddress.
self ssPushNativeRegister: size.
self ssPushNativeRegister: size.


^ 0
^ 0
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